Unified Coverage Report :: Module :: adc_ctrl_csr_assert_fpv

Module : adc_ctrl_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
96.00						96.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_adc_ctrl_csr_assert_0/adc_ctrl_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.adc_ctrl_csr_assert	96.00						96.00

---

Module Instance : tb.dut.adc_ctrl_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
96.00						96.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
96.00						96.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00	100.00	100.00			100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : adc_ctrl_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	25	25	100.00	24	96.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	25	25	100.00	24	96.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	2147483647	0	0	0
adc_chn0_filter_ctl_0_rd_A	2147483647	1561	0	0
adc_chn0_filter_ctl_1_rd_A	2147483647	1657	0	0
adc_chn0_filter_ctl_2_rd_A	2147483647	1673	0	0
adc_chn0_filter_ctl_3_rd_A	2147483647	1728	0	0
adc_chn0_filter_ctl_4_rd_A	2147483647	1789	0	0
adc_chn0_filter_ctl_5_rd_A	2147483647	1572	0	0
adc_chn0_filter_ctl_6_rd_A	2147483647	1581	0	0
adc_chn0_filter_ctl_7_rd_A	2147483647	1698	0	0
adc_chn1_filter_ctl_0_rd_A	2147483647	1899	0	0
adc_chn1_filter_ctl_1_rd_A	2147483647	1695	0	0
adc_chn1_filter_ctl_2_rd_A	2147483647	1713	0	0
adc_chn1_filter_ctl_3_rd_A	2147483647	1809	0	0
adc_chn1_filter_ctl_4_rd_A	2147483647	1583	0	0
adc_chn1_filter_ctl_5_rd_A	2147483647	1620	0	0
adc_chn1_filter_ctl_6_rd_A	2147483647	1551	0	0
adc_chn1_filter_ctl_7_rd_A	2147483647	1623	0	0
adc_en_ctl_rd_A	2147483647	1571	0	0
adc_fsm_rst_rd_A	2147483647	1346	0	0
adc_intr_ctl_rd_A	2147483647	1759	0	0
adc_lp_sample_ctl_rd_A	2147483647	1425	0	0
adc_pd_ctl_rd_A	2147483647	1684	0	0
adc_sample_ctl_rd_A	2147483647	1466	0	0
adc_wakeup_ctl_rd_A	2147483647	1448	0	0
intr_enable_rd_A	2147483647	2161	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	0	0	0

adc_chn0_filter_ctl_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1561	0	0
T6	155730	17	0	0
T7	236490	0	0	0
T8	666171	30	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	10	0	0
T14	0	24	0	0
T15	0	7	0	0
T16	0	7	0	0
T17	0	12	0	0
T18	0	26	0	0
T19	0	47	0	0
T20	0	18	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn0_filter_ctl_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1657	0	0
T6	155730	7	0	0
T7	236490	0	0	0
T8	666171	42	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	9	0	0
T14	0	19	0	0
T15	0	7	0	0
T16	0	36	0	0
T17	0	12	0	0
T18	0	24	0	0
T19	0	3	0	0
T20	0	19	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn0_filter_ctl_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1673	0	0
T6	155730	16	0	0
T7	236490	0	0	0
T8	666171	40	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	11	0	0
T14	0	26	0	0
T15	0	1	0	0
T16	0	11	0	0
T17	0	11	0	0
T18	0	36	0	0
T19	0	23	0	0
T20	0	17	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn0_filter_ctl_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1728	0	0
T6	155730	13	0	0
T7	236490	0	0	0
T8	666171	45	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	7	0	0
T14	0	15	0	0
T15	0	10	0	0
T16	0	7	0	0
T17	0	13	0	0
T18	0	29	0	0
T19	0	15	0	0
T20	0	19	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn0_filter_ctl_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1789	0	0
T6	155730	26	0	0
T7	236490	0	0	0
T8	666171	52	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	2	0	0
T14	0	32	0	0
T15	0	2	0	0
T16	0	21	0	0
T17	0	16	0	0
T18	0	38	0	0
T19	0	17	0	0
T20	0	12	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn0_filter_ctl_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1572	0	0
T6	155730	24	0	0
T7	236490	0	0	0
T8	666171	31	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	5	0	0
T14	0	28	0	0
T15	0	11	0	0
T16	0	19	0	0
T17	0	10	0	0
T18	0	38	0	0
T19	0	21	0	0
T20	0	15	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn0_filter_ctl_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1581	0	0
T6	155730	15	0	0
T7	236490	0	0	0
T8	666171	37	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	3	0	0
T14	0	10	0	0
T15	0	6	0	0
T16	0	18	0	0
T18	0	35	0	0
T19	0	15	0	0
T20	0	18	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0
T25	0	11	0	0

adc_chn0_filter_ctl_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1698	0	0
T6	155730	14	0	0
T7	236490	0	0	0
T8	666171	31	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T14	0	23	0	0
T15	0	18	0	0
T16	0	11	0	0
T17	0	8	0	0
T18	0	33	0	0
T19	0	16	0	0
T20	0	27	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0
T25	0	33	0	0

adc_chn1_filter_ctl_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1899	0	0
T6	155730	15	0	0
T7	236490	0	0	0
T8	666171	39	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	8	0	0
T14	0	21	0	0
T15	0	11	0	0
T16	0	32	0	0
T17	0	10	0	0
T18	0	32	0	0
T19	0	27	0	0
T20	0	15	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1695	0	0
T6	155730	18	0	0
T7	236490	0	0	0
T8	666171	22	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	13	0	0
T14	0	13	0	0
T15	0	16	0	0
T16	0	15	0	0
T17	0	19	0	0
T18	0	28	0	0
T19	0	15	0	0
T20	0	13	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1713	0	0
T6	155730	18	0	0
T7	236490	0	0	0
T8	666171	25	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	12	0	0
T14	0	35	0	0
T15	0	9	0	0
T16	0	32	0	0
T17	0	5	0	0
T18	0	46	0	0
T19	0	34	0	0
T20	0	15	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1809	0	0
T6	155730	19	0	0
T7	236490	0	0	0
T8	666171	19	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	14	0	0
T14	0	15	0	0
T15	0	7	0	0
T16	0	11	0	0
T17	0	15	0	0
T18	0	39	0	0
T19	0	28	0	0
T20	0	24	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1583	0	0
T6	155730	25	0	0
T7	236490	0	0	0
T8	666171	31	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	1	0	0
T14	0	21	0	0
T15	0	14	0	0
T16	0	5	0	0
T17	0	1	0	0
T18	0	43	0	0
T19	0	13	0	0
T20	0	18	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1620	0	0
T6	155730	24	0	0
T7	236490	0	0	0
T8	666171	25	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	8	0	0
T14	0	6	0	0
T15	0	18	0	0
T16	0	29	0	0
T17	0	18	0	0
T18	0	40	0	0
T19	0	24	0	0
T20	0	15	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1551	0	0
T6	155730	20	0	0
T7	236490	0	0	0
T8	666171	20	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	6	0	0
T14	0	24	0	0
T15	0	10	0	0
T16	0	23	0	0
T17	0	7	0	0
T18	0	29	0	0
T19	0	13	0	0
T20	0	15	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_chn1_filter_ctl_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1623	0	0
T6	155730	13	0	0
T7	236490	0	0	0
T8	666171	43	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	18	0	0
T14	0	21	0	0
T15	0	17	0	0
T16	0	11	0	0
T17	0	18	0	0
T18	0	15	0	0
T19	0	20	0	0
T20	0	19	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_en_ctl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1571	0	0
T6	155730	16	0	0
T7	236490	0	0	0
T8	666171	30	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	15	0	0
T14	0	15	0	0
T15	0	10	0	0
T16	0	10	0	0
T17	0	23	0	0
T18	0	26	0	0
T19	0	24	0	0
T20	0	12	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_fsm_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1346	0	0
T6	155730	19	0	0
T7	236490	0	0	0
T8	666171	30	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	10	0	0
T14	0	15	0	0
T15	0	6	0	0
T16	0	24	0	0
T17	0	12	0	0
T18	0	21	0	0
T19	0	50	0	0
T20	0	17	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_intr_ctl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1759	0	0
T6	155730	5	0	0
T7	236490	0	0	0
T8	666171	32	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	1	0	0
T14	0	23	0	0
T15	0	22	0	0
T16	0	18	0	0
T17	0	3	0	0
T18	0	26	0	0
T19	0	43	0	0
T20	0	18	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_lp_sample_ctl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1425	0	0
T6	155730	26	0	0
T7	236490	0	0	0
T8	666171	28	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	16	0	0
T14	0	5	0	0
T15	0	7	0	0
T16	0	20	0	0
T17	0	22	0	0
T18	0	43	0	0
T19	0	22	0	0
T20	0	10	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_pd_ctl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1684	0	0
T6	155730	29	0	0
T7	236490	0	0	0
T8	666171	42	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	11	0	0
T14	0	36	0	0
T15	0	7	0	0
T16	0	17	0	0
T17	0	18	0	0
T18	0	51	0	0
T19	0	20	0	0
T20	0	23	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_sample_ctl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1466	0	0
T6	155730	15	0	0
T7	236490	0	0	0
T8	666171	26	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	6	0	0
T14	0	21	0	0
T15	0	4	0	0
T16	0	31	0	0
T17	0	15	0	0
T18	0	30	0	0
T19	0	33	0	0
T20	0	23	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

adc_wakeup_ctl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	1448	0	0
T6	155730	11	0	0
T7	236490	0	0	0
T8	666171	32	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	15	0	0
T14	0	28	0	0
T15	0	11	0	0
T16	0	16	0	0
T17	0	17	0	0
T18	0	33	0	0
T19	0	15	0	0
T20	0	22	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T24	265018	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2147483647	2161	0	0
T5	375745	4	0	0
T6	155730	16	0	0
T7	236490	0	0	0
T8	666171	91	0	0
T9	676953	0	0	0
T10	124066	0	0	0
T11	318055	0	0	0
T13	0	11	0	0
T14	0	35	0	0
T15	0	15	0	0
T16	0	65	0	0
T17	0	18	0	0
T21	5991	0	0	0
T22	7153	0	0	0
T23	853383	0	0	0
T26	0	31	0	0
T27	0	13	0	0