interrupt_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
228 |
1 |
|
|
T47 |
1 |
|
T13 |
2 |
|
T131 |
1 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
239 |
1 |
|
|
T8 |
4 |
|
T11 |
9 |
|
T35 |
5 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
258 |
1 |
|
|
T9 |
15 |
|
T11 |
5 |
|
T132 |
10 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
258 |
1 |
|
|
T3 |
1 |
|
T13 |
8 |
|
T23 |
8 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T8 |
5 |
|
T9 |
27 |
|
T108 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
130 |
1 |
|
|
T213 |
1 |
|
T133 |
1 |
|
T205 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
1532 |
1 |
|
|
T5 |
33 |
|
T108 |
1 |
|
T42 |
14 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
231 |
1 |
|
|
T6 |
16 |
|
T28 |
1 |
|
T14 |
5 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
151 |
1 |
|
|
T10 |
11 |
|
T53 |
9 |
|
T36 |
5 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
152 |
1 |
|
|
T1 |
4 |
|
T38 |
1 |
|
T135 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
232 |
1 |
|
|
T6 |
6 |
|
T47 |
1 |
|
T133 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
140 |
1 |
|
|
T6 |
13 |
|
T13 |
7 |
|
T28 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
212 |
1 |
|
|
T12 |
10 |
|
T108 |
1 |
|
T14 |
2 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
124 |
1 |
|
|
T174 |
1 |
|
T132 |
21 |
|
T145 |
12 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
237 |
1 |
|
|
T11 |
3 |
|
T174 |
1 |
|
T145 |
14 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
330 |
1 |
|
|
T8 |
14 |
|
T186 |
11 |
|
T41 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
262 |
1 |
|
|
T2 |
13 |
|
T12 |
3 |
|
T39 |
5 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
183 |
1 |
|
|
T28 |
1 |
|
T29 |
1 |
|
T201 |
1 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
58 |
1 |
|
|
T227 |
15 |
|
T200 |
15 |
|
T285 |
2 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
28 |
1 |
|
|
T213 |
1 |
|
T172 |
1 |
|
T177 |
8 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17938 |
1 |
|
|
T1 |
96 |
|
T4 |
20 |
|
T7 |
142 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
182 |
1 |
|
|
T13 |
2 |
|
T171 |
13 |
|
T172 |
14 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
240 |
1 |
|
|
T35 |
1 |
|
T37 |
1 |
|
T54 |
8 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
201 |
1 |
|
|
T132 |
8 |
|
T221 |
2 |
|
T135 |
9 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
241 |
1 |
|
|
T3 |
4 |
|
T13 |
9 |
|
T23 |
6 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
77 |
1 |
|
|
T33 |
5 |
|
T246 |
12 |
|
T137 |
1 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
122 |
1 |
|
|
T213 |
9 |
|
T205 |
3 |
|
T152 |
5 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
1104 |
1 |
|
|
T30 |
8 |
|
T181 |
6 |
|
T212 |
23 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
135 |
1 |
|
|
T28 |
11 |
|
T14 |
3 |
|
T234 |
12 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
174 |
1 |
|
|
T10 |
11 |
|
T53 |
10 |
|
T36 |
1 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
156 |
1 |
|
|
T1 |
1 |
|
T135 |
12 |
|
T248 |
2 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
160 |
1 |
|
|
T133 |
2 |
|
T231 |
12 |
|
T219 |
9 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
123 |
1 |
|
|
T13 |
4 |
|
T28 |
6 |
|
T132 |
12 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
207 |
1 |
|
|
T33 |
2 |
|
T215 |
8 |
|
T189 |
4 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
110 |
1 |
|
|
T132 |
10 |
|
T268 |
2 |
|
T74 |
1 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
115 |
1 |
|
|
T41 |
1 |
|
T147 |
12 |
|
T286 |
10 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
170 |
1 |
|
|
T186 |
4 |
|
T41 |
6 |
|
T17 |
1 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
225 |
1 |
|
|
T2 |
14 |
|
T39 |
3 |
|
T171 |
10 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
144 |
1 |
|
|
T28 |
10 |
|
T260 |
4 |
|
T216 |
9 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
33 |
1 |
|
|
T200 |
12 |
|
T285 |
1 |
|
T287 |
11 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
36 |
1 |
|
|
T213 |
10 |
|
T155 |
4 |
|
T230 |
1 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
140 |
1 |
|
|
T35 |
1 |
|
T13 |
5 |
|
T26 |
2 |
interrupt_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
4 |
1 |
|
|
T282 |
3 |
|
T283 |
1 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
26 |
1 |
|
|
T171 |
15 |
|
T284 |
1 |
|
T288 |
10 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
6 |
1 |
|
|
T267 |
1 |
|
T289 |
1 |
|
T290 |
4 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
197 |
1 |
|
|
T47 |
1 |
|
T13 |
2 |
|
T214 |
15 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
206 |
1 |
|
|
T8 |
4 |
|
T11 |
9 |
|
T35 |
5 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
160 |
1 |
|
|
T9 |
15 |
|
T11 |
5 |
|
T131 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
224 |
1 |
|
|
T3 |
1 |
|
T13 |
8 |
|
T23 |
8 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
247 |
1 |
|
|
T8 |
5 |
|
T9 |
21 |
|
T108 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
188 |
1 |
|
|
T213 |
1 |
|
T142 |
1 |
|
T205 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
1525 |
1 |
|
|
T5 |
33 |
|
T9 |
6 |
|
T42 |
14 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
196 |
1 |
|
|
T6 |
16 |
|
T28 |
1 |
|
T14 |
5 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
157 |
1 |
|
|
T10 |
11 |
|
T108 |
1 |
|
T36 |
5 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
156 |
1 |
|
|
T1 |
4 |
|
T38 |
1 |
|
T178 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
208 |
1 |
|
|
T6 |
6 |
|
T47 |
1 |
|
T53 |
9 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
148 |
1 |
|
|
T6 |
13 |
|
T13 |
7 |
|
T28 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
249 |
1 |
|
|
T12 |
10 |
|
T108 |
1 |
|
T14 |
2 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
142 |
1 |
|
|
T174 |
1 |
|
T132 |
21 |
|
T41 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
215 |
1 |
|
|
T145 |
14 |
|
T243 |
17 |
|
T41 |
3 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
306 |
1 |
|
|
T8 |
14 |
|
T186 |
11 |
|
T227 |
21 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
373 |
1 |
|
|
T2 |
13 |
|
T11 |
3 |
|
T12 |
3 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
243 |
1 |
|
|
T28 |
1 |
|
T29 |
1 |
|
T201 |
1 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17923 |
1 |
|
|
T1 |
96 |
|
T4 |
20 |
|
T7 |
142 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
9 |
1 |
|
|
T283 |
9 |
|
- |
- |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
32 |
1 |
|
|
T171 |
13 |
|
T284 |
10 |
|
T288 |
9 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
16 |
1 |
|
|
T290 |
16 |
|
- |
- |
|
- |
- |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
128 |
1 |
|
|
T13 |
2 |
|
T214 |
15 |
|
T172 |
14 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
190 |
1 |
|
|
T35 |
1 |
|
T37 |
1 |
|
T54 |
8 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
154 |
1 |
|
|
T135 |
9 |
|
T216 |
21 |
|
T247 |
12 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
211 |
1 |
|
|
T3 |
4 |
|
T13 |
9 |
|
T23 |
6 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
160 |
1 |
|
|
T33 |
5 |
|
T132 |
8 |
|
T246 |
12 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
147 |
1 |
|
|
T213 |
9 |
|
T205 |
3 |
|
T152 |
5 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
1020 |
1 |
|
|
T30 |
8 |
|
T181 |
6 |
|
T212 |
23 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
145 |
1 |
|
|
T28 |
11 |
|
T14 |
3 |
|
T155 |
9 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
171 |
1 |
|
|
T10 |
11 |
|
T36 |
1 |
|
T214 |
14 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
131 |
1 |
|
|
T1 |
1 |
|
T248 |
2 |
|
T251 |
13 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
192 |
1 |
|
|
T53 |
10 |
|
T37 |
1 |
|
T54 |
8 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
132 |
1 |
|
|
T13 |
4 |
|
T28 |
6 |
|
T132 |
12 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
208 |
1 |
|
|
T33 |
2 |
|
T133 |
2 |
|
T215 |
8 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
132 |
1 |
|
|
T132 |
10 |
|
T41 |
6 |
|
T149 |
8 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
110 |
1 |
|
|
T41 |
1 |
|
T147 |
12 |
|
T286 |
10 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
178 |
1 |
|
|
T186 |
4 |
|
T17 |
1 |
|
T150 |
12 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
309 |
1 |
|
|
T2 |
14 |
|
T39 |
3 |
|
T171 |
10 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
195 |
1 |
|
|
T28 |
10 |
|
T213 |
10 |
|
T260 |
4 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
125 |
1 |
|
|
T35 |
1 |
|
T13 |
5 |
|
T26 |
2 |
wakeup_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
229 |
1 |
|
|
T47 |
1 |
|
T13 |
3 |
|
T131 |
1 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
283 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T35 |
5 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
242 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T132 |
9 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
294 |
1 |
|
|
T3 |
5 |
|
T13 |
12 |
|
T23 |
10 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
117 |
1 |
|
|
T8 |
1 |
|
T9 |
2 |
|
T108 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
160 |
1 |
|
|
T213 |
10 |
|
T133 |
1 |
|
T205 |
4 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
1438 |
1 |
|
|
T5 |
2 |
|
T108 |
1 |
|
T42 |
2 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
177 |
1 |
|
|
T6 |
1 |
|
T28 |
12 |
|
T14 |
6 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
213 |
1 |
|
|
T10 |
12 |
|
T53 |
11 |
|
T36 |
5 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
192 |
1 |
|
|
T1 |
4 |
|
T38 |
1 |
|
T135 |
13 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
199 |
1 |
|
|
T6 |
1 |
|
T47 |
1 |
|
T133 |
3 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
153 |
1 |
|
|
T6 |
1 |
|
T13 |
5 |
|
T28 |
7 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
243 |
1 |
|
|
T12 |
1 |
|
T108 |
1 |
|
T14 |
2 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
136 |
1 |
|
|
T174 |
1 |
|
T132 |
11 |
|
T145 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
146 |
1 |
|
|
T11 |
1 |
|
T174 |
1 |
|
T145 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
222 |
1 |
|
|
T8 |
1 |
|
T186 |
5 |
|
T41 |
7 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
278 |
1 |
|
|
T2 |
15 |
|
T12 |
1 |
|
T39 |
6 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
192 |
1 |
|
|
T28 |
11 |
|
T29 |
1 |
|
T201 |
1 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
40 |
1 |
|
|
T227 |
1 |
|
T200 |
13 |
|
T285 |
2 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
46 |
1 |
|
|
T213 |
11 |
|
T172 |
1 |
|
T177 |
1 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
18064 |
1 |
|
|
T1 |
96 |
|
T4 |
20 |
|
T7 |
142 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
181 |
1 |
|
|
T13 |
1 |
|
T171 |
14 |
|
T172 |
10 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
196 |
1 |
|
|
T8 |
3 |
|
T11 |
8 |
|
T35 |
1 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
217 |
1 |
|
|
T9 |
14 |
|
T11 |
4 |
|
T132 |
9 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
205 |
1 |
|
|
T13 |
5 |
|
T23 |
4 |
|
T26 |
1 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
136 |
1 |
|
|
T8 |
4 |
|
T9 |
25 |
|
T27 |
2 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
92 |
1 |
|
|
T152 |
5 |
|
T136 |
10 |
|
T291 |
8 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
1198 |
1 |
|
|
T5 |
31 |
|
T42 |
12 |
|
T134 |
9 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
189 |
1 |
|
|
T6 |
15 |
|
T14 |
2 |
|
T236 |
13 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
112 |
1 |
|
|
T10 |
10 |
|
T53 |
8 |
|
T36 |
1 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
116 |
1 |
|
|
T1 |
1 |
|
T248 |
2 |
|
T251 |
14 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
193 |
1 |
|
|
T6 |
5 |
|
T146 |
8 |
|
T231 |
13 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
110 |
1 |
|
|
T6 |
12 |
|
T13 |
6 |
|
T132 |
16 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T12 |
9 |
|
T215 |
9 |
|
T147 |
2 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
98 |
1 |
|
|
T132 |
20 |
|
T145 |
11 |
|
T268 |
2 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
206 |
1 |
|
|
T11 |
2 |
|
T145 |
13 |
|
T243 |
16 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
278 |
1 |
|
|
T8 |
13 |
|
T186 |
10 |
|
T227 |
20 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
209 |
1 |
|
|
T2 |
12 |
|
T12 |
2 |
|
T39 |
2 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
135 |
1 |
|
|
T136 |
18 |
|
T260 |
3 |
|
T237 |
17 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
51 |
1 |
|
|
T227 |
14 |
|
T200 |
14 |
|
T285 |
1 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
18 |
1 |
|
|
T177 |
7 |
|
T261 |
9 |
|
T292 |
2 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
14 |
1 |
|
|
T214 |
14 |
|
- |
- |
|
- |
- |
wakeup_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
11 |
1 |
|
|
T282 |
1 |
|
T283 |
10 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
35 |
1 |
|
|
T171 |
14 |
|
T284 |
11 |
|
T288 |
10 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
19 |
1 |
|
|
T267 |
1 |
|
T289 |
1 |
|
T290 |
17 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
164 |
1 |
|
|
T47 |
1 |
|
T13 |
3 |
|
T214 |
16 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
224 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T35 |
5 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
191 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T131 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
258 |
1 |
|
|
T3 |
5 |
|
T13 |
12 |
|
T23 |
10 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
206 |
1 |
|
|
T8 |
1 |
|
T9 |
1 |
|
T108 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
189 |
1 |
|
|
T213 |
10 |
|
T142 |
1 |
|
T205 |
4 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
1349 |
1 |
|
|
T5 |
2 |
|
T9 |
1 |
|
T42 |
2 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
190 |
1 |
|
|
T6 |
1 |
|
T28 |
12 |
|
T14 |
6 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
209 |
1 |
|
|
T10 |
12 |
|
T108 |
1 |
|
T36 |
5 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
166 |
1 |
|
|
T1 |
4 |
|
T38 |
1 |
|
T178 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
232 |
1 |
|
|
T6 |
1 |
|
T47 |
1 |
|
T53 |
11 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
160 |
1 |
|
|
T6 |
1 |
|
T13 |
5 |
|
T28 |
7 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
252 |
1 |
|
|
T12 |
1 |
|
T108 |
1 |
|
T14 |
2 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
168 |
1 |
|
|
T174 |
1 |
|
T132 |
11 |
|
T41 |
7 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
138 |
1 |
|
|
T145 |
1 |
|
T243 |
1 |
|
T41 |
2 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
218 |
1 |
|
|
T8 |
1 |
|
T186 |
5 |
|
T227 |
1 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
374 |
1 |
|
|
T2 |
15 |
|
T11 |
1 |
|
T12 |
1 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
263 |
1 |
|
|
T28 |
11 |
|
T29 |
1 |
|
T201 |
1 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
18048 |
1 |
|
|
T1 |
96 |
|
T4 |
20 |
|
T7 |
142 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
2 |
1 |
|
|
T282 |
2 |
|
- |
- |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
23 |
1 |
|
|
T171 |
14 |
|
T288 |
9 |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
3 |
1 |
|
|
T290 |
3 |
|
- |
- |
|
- |
- |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
161 |
1 |
|
|
T13 |
1 |
|
T214 |
14 |
|
T172 |
10 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
172 |
1 |
|
|
T8 |
3 |
|
T11 |
8 |
|
T35 |
1 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
123 |
1 |
|
|
T9 |
14 |
|
T11 |
4 |
|
T247 |
9 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
177 |
1 |
|
|
T13 |
5 |
|
T23 |
4 |
|
T26 |
1 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
201 |
1 |
|
|
T8 |
4 |
|
T9 |
20 |
|
T33 |
12 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
146 |
1 |
|
|
T152 |
5 |
|
T136 |
10 |
|
T231 |
10 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
1196 |
1 |
|
|
T5 |
31 |
|
T9 |
5 |
|
T42 |
12 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
151 |
1 |
|
|
T6 |
15 |
|
T14 |
2 |
|
T236 |
13 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
119 |
1 |
|
|
T10 |
10 |
|
T36 |
1 |
|
T214 |
15 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
121 |
1 |
|
|
T1 |
1 |
|
T248 |
2 |
|
T251 |
14 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
168 |
1 |
|
|
T6 |
5 |
|
T53 |
8 |
|
T37 |
1 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
120 |
1 |
|
|
T6 |
12 |
|
T13 |
6 |
|
T132 |
16 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
205 |
1 |
|
|
T12 |
9 |
|
T215 |
9 |
|
T147 |
2 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
106 |
1 |
|
|
T132 |
20 |
|
T268 |
2 |
|
T79 |
2 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
187 |
1 |
|
|
T145 |
13 |
|
T243 |
16 |
|
T41 |
2 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
266 |
1 |
|
|
T8 |
13 |
|
T186 |
10 |
|
T227 |
20 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
308 |
1 |
|
|
T2 |
12 |
|
T11 |
2 |
|
T12 |
2 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
175 |
1 |
|
|
T136 |
18 |
|
T177 |
7 |
|
T260 |
6 |