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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.70 99.07 96.67 100.00 100.00 98.83 98.33 91.02


Total test records in report: 919
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T465 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.2163278024 Aug 25 02:36:22 AM UTC 24 Aug 25 02:44:49 AM UTC 24 404875458442 ps
T268 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_clock_gating.412700906 Aug 25 02:26:19 AM UTC 24 Aug 25 02:45:01 AM UTC 24 328133615190 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_polled.2004970392 Aug 25 02:23:25 AM UTC 24 Aug 25 02:45:01 AM UTC 24 328778379808 ps
T243 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_wakeup.2368040779 Aug 25 02:22:44 AM UTC 24 Aug 25 02:45:02 AM UTC 24 356153417485 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.753954803 Aug 25 02:43:57 AM UTC 24 Aug 25 02:45:03 AM UTC 24 32388832680 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.900988980 Aug 25 02:35:18 AM UTC 24 Aug 25 02:45:03 AM UTC 24 160224700480 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.2370830970 Aug 25 02:45:04 AM UTC 24 Aug 25 02:45:18 AM UTC 24 1659980742 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.342509357 Aug 25 02:35:32 AM UTC 24 Aug 25 02:45:21 AM UTC 24 525396082395 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.2873513699 Aug 25 02:45:02 AM UTC 24 Aug 25 02:45:22 AM UTC 24 4481829025 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.2900115953 Aug 25 02:48:49 AM UTC 24 Aug 25 02:49:13 AM UTC 24 5689997244 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.3297162380 Aug 25 02:44:43 AM UTC 24 Aug 25 02:45:23 AM UTC 24 163093620815 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.471527464 Aug 25 02:45:21 AM UTC 24 Aug 25 02:45:24 AM UTC 24 504002550 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_interrupt_fixed.881194136 Aug 25 02:23:31 AM UTC 24 Aug 25 02:45:28 AM UTC 24 323343063220 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.4102916598 Aug 25 02:45:23 AM UTC 24 Aug 25 02:45:31 AM UTC 24 5859174995 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.3958617023 Aug 25 02:35:43 AM UTC 24 Aug 25 02:45:31 AM UTC 24 96834708781 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup_fixed.4197557548 Aug 25 02:35:33 AM UTC 24 Aug 25 02:45:43 AM UTC 24 612431148246 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_interrupt_fixed.3963201469 Aug 25 02:25:01 AM UTC 24 Aug 25 02:45:46 AM UTC 24 319626184494 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.768286505 Aug 25 02:38:56 AM UTC 24 Aug 25 02:45:55 AM UTC 24 399342156306 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.1032927171 Aug 25 02:45:03 AM UTC 24 Aug 25 02:46:07 AM UTC 24 30582373455 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.271967390 Aug 25 02:37:46 AM UTC 24 Aug 25 02:46:09 AM UTC 24 547252978910 ps
T158 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_interrupt.2889545547 Aug 25 02:22:48 AM UTC 24 Aug 25 02:46:21 AM UTC 24 327375105839 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled_fixed.319386506 Aug 25 02:34:37 AM UTC 24 Aug 25 02:46:21 AM UTC 24 165381113018 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.2518096435 Aug 25 02:41:27 AM UTC 24 Aug 25 02:46:26 AM UTC 24 324028012741 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.2391851866 Aug 25 02:46:08 AM UTC 24 Aug 25 02:46:27 AM UTC 24 4369999007 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_both.3918373113 Aug 25 02:24:12 AM UTC 24 Aug 25 02:46:29 AM UTC 24 330972693316 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.2476510628 Aug 25 02:46:28 AM UTC 24 Aug 25 02:46:31 AM UTC 24 407746179 ps
T249 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup.1793137091 Aug 25 02:26:18 AM UTC 24 Aug 25 02:46:31 AM UTC 24 668316381904 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.2197243944 Aug 25 02:46:30 AM UTC 24 Aug 25 02:46:38 AM UTC 24 5651805441 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.2855739045 Aug 25 02:34:42 AM UTC 24 Aug 25 02:46:52 AM UTC 24 354559581292 ps
T261 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.1117773466 Aug 25 02:45:28 AM UTC 24 Aug 25 02:46:59 AM UTC 24 159929817672 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.2681191930 Aug 25 02:43:21 AM UTC 24 Aug 25 02:47:04 AM UTC 24 202739087657 ps
T255 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.124965784 Aug 25 02:46:22 AM UTC 24 Aug 25 02:47:07 AM UTC 24 158453401774 ps
T291 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup.229967005 Aug 25 02:22:56 AM UTC 24 Aug 25 02:47:10 AM UTC 24 364698807933 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.3215072452 Aug 25 02:41:16 AM UTC 24 Aug 25 02:47:11 AM UTC 24 317359194669 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1556139153 Aug 25 02:43:58 AM UTC 24 Aug 25 02:47:19 AM UTC 24 330151876907 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.1773176778 Aug 25 02:47:12 AM UTC 24 Aug 25 02:47:22 AM UTC 24 3873541726 ps
T223 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_fsm_reset.4219065898 Aug 25 02:32:14 AM UTC 24 Aug 25 02:47:27 AM UTC 24 127687169826 ps
T282 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.3044172393 Aug 25 02:41:50 AM UTC 24 Aug 25 02:47:42 AM UTC 24 166420896396 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled_fixed.3436594677 Aug 25 02:27:56 AM UTC 24 Aug 25 02:47:47 AM UTC 24 319358498311 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.813127348 Aug 25 02:47:20 AM UTC 24 Aug 25 02:47:48 AM UTC 24 38549218706 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.1854222183 Aug 25 02:47:47 AM UTC 24 Aug 25 02:47:50 AM UTC 24 379356457 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.2322446788 Aug 25 02:45:47 AM UTC 24 Aug 25 02:47:55 AM UTC 24 166851889054 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.4011136294 Aug 25 02:47:48 AM UTC 24 Aug 25 02:47:56 AM UTC 24 6044382389 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.2601517543 Aug 25 02:47:28 AM UTC 24 Aug 25 02:47:58 AM UTC 24 3815845020 ps
T159 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.538188241 Aug 25 02:42:50 AM UTC 24 Aug 25 02:48:07 AM UTC 24 410862038968 ps
T491 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.3352921022 Aug 25 02:47:42 AM UTC 24 Aug 25 02:48:13 AM UTC 24 25978814981 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_wakeup.4060052423 Aug 25 02:22:51 AM UTC 24 Aug 25 02:48:20 AM UTC 24 383793189649 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.1373535196 Aug 25 02:45:25 AM UTC 24 Aug 25 02:48:20 AM UTC 24 166966352799 ps
T493 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.3875832741 Aug 25 02:37:49 AM UTC 24 Aug 25 02:48:27 AM UTC 24 609781193197 ps
T494 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.507186050 Aug 25 02:46:10 AM UTC 24 Aug 25 02:48:29 AM UTC 24 34818884718 ps
T253 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.2005652122 Aug 25 02:45:02 AM UTC 24 Aug 25 02:48:30 AM UTC 24 328966540767 ps
T304 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.630273882 Aug 25 02:37:57 AM UTC 24 Aug 25 02:48:43 AM UTC 24 333513674176 ps
T495 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.3227053220 Aug 25 02:48:30 AM UTC 24 Aug 25 02:48:44 AM UTC 24 39054721367 ps
T496 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.3725259194 Aug 25 02:48:28 AM UTC 24 Aug 25 02:48:46 AM UTC 24 4241598720 ps
T497 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.1114377306 Aug 25 02:48:46 AM UTC 24 Aug 25 02:48:48 AM UTC 24 341344862 ps
T283 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.3481545383 Aug 25 02:37:58 AM UTC 24 Aug 25 02:49:15 AM UTC 24 167796496153 ps
T498 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.3970617931 Aug 25 02:48:44 AM UTC 24 Aug 25 02:48:53 AM UTC 24 5807682505 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.1869543830 Aug 25 02:42:56 AM UTC 24 Aug 25 02:48:58 AM UTC 24 161981285326 ps
T264 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup.3699011197 Aug 25 02:25:01 AM UTC 24 Aug 25 02:49:28 AM UTC 24 350399872963 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.604873635 Aug 25 02:48:53 AM UTC 24 Aug 25 02:49:52 AM UTC 24 166077236004 ps
T224 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.2946051014 Aug 25 02:34:19 AM UTC 24 Aug 25 02:49:57 AM UTC 24 108497341526 ps
T500 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.2457659913 Aug 25 02:47:05 AM UTC 24 Aug 25 02:50:00 AM UTC 24 198528564484 ps
T501 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.2760510113 Aug 25 02:48:00 AM UTC 24 Aug 25 02:50:03 AM UTC 24 161970071877 ps
T225 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.67828418 Aug 25 02:37:01 AM UTC 24 Aug 25 02:50:05 AM UTC 24 109493774734 ps
T502 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.3378810991 Aug 25 02:48:14 AM UTC 24 Aug 25 02:50:06 AM UTC 24 201371079180 ps
T503 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.2037392775 Aug 25 02:44:21 AM UTC 24 Aug 25 02:50:11 AM UTC 24 333441158353 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.1306023448 Aug 25 02:35:11 AM UTC 24 Aug 25 02:50:14 AM UTC 24 425232491168 ps
T504 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.2306283807 Aug 25 02:44:25 AM UTC 24 Aug 25 02:50:16 AM UTC 24 331513417992 ps
T505 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.1198499905 Aug 25 02:50:16 AM UTC 24 Aug 25 02:50:19 AM UTC 24 281493036 ps
T506 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.4226060930 Aug 25 02:50:04 AM UTC 24 Aug 25 02:50:21 AM UTC 24 5439937486 ps
T507 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.3577097933 Aug 25 02:50:20 AM UTC 24 Aug 25 02:50:25 AM UTC 24 5673102505 ps
T508 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.1459728956 Aug 25 02:45:23 AM UTC 24 Aug 25 02:50:27 AM UTC 24 172811428086 ps
T509 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.2396224119 Aug 25 02:50:06 AM UTC 24 Aug 25 02:50:31 AM UTC 24 30543689444 ps
T510 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.2379738767 Aug 25 02:49:16 AM UTC 24 Aug 25 02:50:39 AM UTC 24 321289754853 ps
T511 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.3240256540 Aug 25 02:50:12 AM UTC 24 Aug 25 02:50:43 AM UTC 24 5256280031 ps
T512 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.3286932317 Aug 25 02:34:44 AM UTC 24 Aug 25 02:50:52 AM UTC 24 617749160127 ps
T184 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.4292181923 Aug 25 02:42:54 AM UTC 24 Aug 25 02:50:55 AM UTC 24 495396740898 ps
T229 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.841209983 Aug 25 02:38:07 AM UTC 24 Aug 25 02:51:00 AM UTC 24 127197218148 ps
T513 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.4185166406 Aug 25 02:41:11 AM UTC 24 Aug 25 02:51:01 AM UTC 24 160207218787 ps
T514 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.1026924098 Aug 25 02:51:01 AM UTC 24 Aug 25 02:51:11 AM UTC 24 4135982451 ps
T515 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.2195559160 Aug 25 02:51:02 AM UTC 24 Aug 25 02:51:12 AM UTC 24 33989602136 ps
T516 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.2299417310 Aug 25 02:50:32 AM UTC 24 Aug 25 02:51:16 AM UTC 24 165359061345 ps
T517 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.3768700601 Aug 25 02:40:09 AM UTC 24 Aug 25 02:51:20 AM UTC 24 359477190156 ps
T518 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.2231577503 Aug 25 02:51:21 AM UTC 24 Aug 25 02:51:24 AM UTC 24 501865502 ps
T269 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.2622659172 Aug 25 02:43:46 AM UTC 24 Aug 25 02:51:27 AM UTC 24 581084433046 ps
T519 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.1551090648 Aug 25 02:51:13 AM UTC 24 Aug 25 02:51:28 AM UTC 24 11899256314 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.3202298332 Aug 25 02:51:17 AM UTC 24 Aug 25 02:51:46 AM UTC 24 6555891825 ps
T520 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.4136819961 Aug 25 02:51:25 AM UTC 24 Aug 25 02:51:51 AM UTC 24 5804347708 ps
T257 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.3581394541 Aug 25 02:50:01 AM UTC 24 Aug 25 02:51:52 AM UTC 24 171867684211 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.932368151 Aug 25 02:47:50 AM UTC 24 Aug 25 02:51:58 AM UTC 24 488156186778 ps
T305 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.735291882 Aug 25 02:41:31 AM UTC 24 Aug 25 02:52:43 AM UTC 24 371413926716 ps
T521 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.1245897575 Aug 25 02:37:16 AM UTC 24 Aug 25 02:52:55 AM UTC 24 121369782666 ps
T313 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.1075125279 Aug 25 02:46:26 AM UTC 24 Aug 25 02:52:56 AM UTC 24 331299204037 ps
T522 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.3282296042 Aug 25 02:45:31 AM UTC 24 Aug 25 02:53:04 AM UTC 24 486812558702 ps
T160 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.1616866629 Aug 25 02:49:58 AM UTC 24 Aug 25 02:53:05 AM UTC 24 169451043863 ps
T523 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled_fixed.1785403256 Aug 25 02:35:57 AM UTC 24 Aug 25 02:53:12 AM UTC 24 496214757891 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt.1579758328 Aug 25 02:36:02 AM UTC 24 Aug 25 02:53:16 AM UTC 24 497953160883 ps
T524 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.1692210247 Aug 25 02:52:57 AM UTC 24 Aug 25 02:53:17 AM UTC 24 4550116069 ps
T525 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.2187377690 Aug 25 02:53:18 AM UTC 24 Aug 25 02:53:21 AM UTC 24 379898798 ps
T307 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.930644720 Aug 25 02:50:28 AM UTC 24 Aug 25 02:53:26 AM UTC 24 162704101922 ps
T526 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.954560720 Aug 25 02:53:21 AM UTC 24 Aug 25 02:53:29 AM UTC 24 5720436701 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.3407990490 Aug 25 02:53:13 AM UTC 24 Aug 25 02:53:34 AM UTC 24 4457368168 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.674060485 Aug 25 02:44:43 AM UTC 24 Aug 25 02:53:40 AM UTC 24 537918682694 ps
T527 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.2742991038 Aug 25 02:43:05 AM UTC 24 Aug 25 02:53:53 AM UTC 24 324350214873 ps
T227 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.2240284423 Aug 25 02:39:23 AM UTC 24 Aug 25 02:54:06 AM UTC 24 85611618488 ps
T314 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.2147625477 Aug 25 02:38:37 AM UTC 24 Aug 25 02:54:07 AM UTC 24 496664438380 ps
T294 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.2240634236 Aug 25 02:38:46 AM UTC 24 Aug 25 02:54:08 AM UTC 24 499449120476 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.2875461480 Aug 25 02:50:40 AM UTC 24 Aug 25 02:54:11 AM UTC 24 375631146326 ps
T528 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.177501802 Aug 25 02:53:05 AM UTC 24 Aug 25 02:54:14 AM UTC 24 34151854250 ps
T529 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.1776848400 Aug 25 02:54:12 AM UTC 24 Aug 25 02:54:28 AM UTC 24 3122477962 ps
T319 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_interrupt.2797417028 Aug 25 02:22:55 AM UTC 24 Aug 25 02:54:43 AM UTC 24 500226564679 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.2317735381 Aug 25 02:43:58 AM UTC 24 Aug 25 02:54:44 AM UTC 24 89246789883 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.3077070535 Aug 25 02:54:44 AM UTC 24 Aug 25 02:54:58 AM UTC 24 7715211167 ps
T113 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.1136173684 Aug 25 02:46:38 AM UTC 24 Aug 25 02:54:59 AM UTC 24 491988080851 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.4096451134 Aug 25 02:54:59 AM UTC 24 Aug 25 02:55:02 AM UTC 24 303991871 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.3106258470 Aug 25 02:54:59 AM UTC 24 Aug 25 02:55:14 AM UTC 24 6099837834 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.2624511422 Aug 25 02:41:00 AM UTC 24 Aug 25 02:55:19 AM UTC 24 138998898688 ps
T117 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.2048522405 Aug 25 02:39:13 AM UTC 24 Aug 25 02:55:19 AM UTC 24 508816971426 ps
T118 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.321247381 Aug 25 02:47:11 AM UTC 24 Aug 25 02:55:36 AM UTC 24 541794414067 ps
T119 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.3452185543 Aug 25 02:53:40 AM UTC 24 Aug 25 02:55:41 AM UTC 24 156013359215 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.2360693814 Aug 25 02:35:21 AM UTC 24 Aug 25 02:55:42 AM UTC 24 329555048358 ps
T121 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.3036562155 Aug 25 02:53:27 AM UTC 24 Aug 25 02:56:04 AM UTC 24 157416423496 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_both.783254139 Aug 25 02:33:44 AM UTC 24 Aug 25 02:56:14 AM UTC 24 330964089199 ps
T332 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.3306002868 Aug 25 02:47:00 AM UTC 24 Aug 25 02:56:23 AM UTC 24 538177712475 ps
T195 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.215052148 Aug 25 02:39:31 AM UTC 24 Aug 25 02:56:23 AM UTC 24 503225906737 ps
T530 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.1766533168 Aug 25 02:56:14 AM UTC 24 Aug 25 02:56:24 AM UTC 24 3971731020 ps
T320 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.1995909030 Aug 25 02:46:31 AM UTC 24 Aug 25 02:56:27 AM UTC 24 158182972070 ps
T531 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup_fixed.1214581870 Aug 25 02:29:34 AM UTC 24 Aug 25 02:56:29 AM UTC 24 413996843485 ps
T532 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.1040894204 Aug 25 02:43:10 AM UTC 24 Aug 25 02:56:33 AM UTC 24 204246550268 ps
T533 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.3413996936 Aug 25 02:56:30 AM UTC 24 Aug 25 02:56:33 AM UTC 24 343473668 ps
T228 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.666859695 Aug 25 02:46:21 AM UTC 24 Aug 25 02:56:34 AM UTC 24 105011216956 ps
T534 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.3676675299 Aug 25 02:56:33 AM UTC 24 Aug 25 02:56:37 AM UTC 24 5937521686 ps
T56 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.581532851 Aug 25 02:45:19 AM UTC 24 Aug 25 02:56:36 AM UTC 24 338981135859 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.126406248 Aug 25 02:51:28 AM UTC 24 Aug 25 02:56:36 AM UTC 24 490685820464 ps
T535 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.888083658 Aug 25 02:54:15 AM UTC 24 Aug 25 02:56:38 AM UTC 24 33929823365 ps
T536 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.687253302 Aug 25 02:56:25 AM UTC 24 Aug 25 02:56:38 AM UTC 24 1740870218 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.682197265 Aug 25 02:51:29 AM UTC 24 Aug 25 02:57:05 AM UTC 24 162623098411 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.2109818645 Aug 25 02:50:21 AM UTC 24 Aug 25 02:57:12 AM UTC 24 490676403812 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.4248336971 Aug 25 02:56:23 AM UTC 24 Aug 25 02:57:17 AM UTC 24 25979805522 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.739587201 Aug 25 02:57:13 AM UTC 24 Aug 25 02:57:25 AM UTC 24 5100686504 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.1255174051 Aug 25 02:50:27 AM UTC 24 Aug 25 02:57:40 AM UTC 24 481600485204 ps
T360 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.3848879157 Aug 25 02:57:41 AM UTC 24 Aug 25 02:58:01 AM UTC 24 8643320409 ps
T265 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.465300329 Aug 25 02:36:51 AM UTC 24 Aug 25 02:58:07 AM UTC 24 332464162371 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.474049761 Aug 25 02:55:20 AM UTC 24 Aug 25 02:58:10 AM UTC 24 166903452636 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.2692056804 Aug 25 02:58:08 AM UTC 24 Aug 25 02:58:11 AM UTC 24 519062068 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.1052258271 Aug 25 02:58:10 AM UTC 24 Aug 25 02:58:36 AM UTC 24 5921447599 ps
T544 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.2314155999 Aug 25 02:53:30 AM UTC 24 Aug 25 02:58:47 AM UTC 24 161121932563 ps
T348 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.3494996226 Aug 25 02:43:03 AM UTC 24 Aug 25 02:58:52 AM UTC 24 326054590489 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.2902255296 Aug 25 02:38:53 AM UTC 24 Aug 25 02:58:54 AM UTC 24 594752551834 ps
T545 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.1203589161 Aug 25 02:48:21 AM UTC 24 Aug 25 02:58:56 AM UTC 24 203721336418 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.1332471635 Aug 25 02:57:18 AM UTC 24 Aug 25 02:59:11 AM UTC 24 26863902481 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.828389967 Aug 25 02:55:14 AM UTC 24 Aug 25 02:59:19 AM UTC 24 478689269412 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.3231040925 Aug 25 02:56:06 AM UTC 24 Aug 25 02:59:22 AM UTC 24 240103939242 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.2286533757 Aug 25 02:59:22 AM UTC 24 Aug 25 02:59:25 AM UTC 24 5513735153 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1023043367 Aug 25 02:51:52 AM UTC 24 Aug 25 02:59:27 AM UTC 24 498568315078 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup.3794782610 Aug 25 02:33:08 AM UTC 24 Aug 25 02:59:27 AM UTC 24 392171455834 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.2549349462 Aug 25 02:45:44 AM UTC 24 Aug 25 02:59:28 AM UTC 24 389319346629 ps
T226 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.1031186551 Aug 25 02:45:03 AM UTC 24 Aug 25 02:59:33 AM UTC 24 118932739242 ps
T230 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.2081594534 Aug 25 02:47:23 AM UTC 24 Aug 25 02:59:35 AM UTC 24 97994173523 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.3392982997 Aug 25 02:59:33 AM UTC 24 Aug 25 02:59:36 AM UTC 24 339411554 ps
T57 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_stress_all.1000397180 Aug 25 02:34:25 AM UTC 24 Aug 25 02:59:40 AM UTC 24 260774507835 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.923563171 Aug 25 02:59:27 AM UTC 24 Aug 25 02:59:42 AM UTC 24 5563151277 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.3874776195 Aug 25 02:58:12 AM UTC 24 Aug 25 02:59:48 AM UTC 24 162842542028 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.2184153224 Aug 25 02:59:36 AM UTC 24 Aug 25 02:59:48 AM UTC 24 5836932769 ps
T251 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.4038673885 Aug 25 02:49:14 AM UTC 24 Aug 25 02:59:52 AM UTC 24 160301742667 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.842488360 Aug 25 02:38:44 AM UTC 24 Aug 25 02:59:52 AM UTC 24 329930709265 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.1191495756 Aug 25 02:59:26 AM UTC 24 Aug 25 02:59:54 AM UTC 24 33178099945 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.1123285456 Aug 25 02:40:11 AM UTC 24 Aug 25 02:59:56 AM UTC 24 546076536293 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.752873714 Aug 25 02:59:57 AM UTC 24 Aug 25 03:00:03 AM UTC 24 3951972262 ps
T212 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.134275038 Aug 25 02:55:03 AM UTC 24 Aug 25 03:00:28 AM UTC 24 322394864689 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.362429199 Aug 25 02:48:45 AM UTC 24 Aug 25 03:00:56 AM UTC 24 366625918039 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.3873690766 Aug 25 02:51:12 AM UTC 24 Aug 25 03:01:02 AM UTC 24 68706748459 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_both.1510754338 Aug 25 02:23:43 AM UTC 24 Aug 25 03:01:02 AM UTC 24 564178912332 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.4201223328 Aug 25 02:56:38 AM UTC 24 Aug 25 03:01:07 AM UTC 24 487656829887 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.2528089422 Aug 25 03:01:04 AM UTC 24 Aug 25 03:01:08 AM UTC 24 440582748 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.825511055 Aug 25 02:55:19 AM UTC 24 Aug 25 03:01:08 AM UTC 24 323748208601 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.821594201 Aug 25 03:00:57 AM UTC 24 Aug 25 03:01:11 AM UTC 24 2889339876 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.4261313030 Aug 25 03:01:08 AM UTC 24 Aug 25 03:01:15 AM UTC 24 6027657375 ps
T201 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.3769467830 Aug 25 02:51:53 AM UTC 24 Aug 25 03:01:32 AM UTC 24 568579257610 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.3707885365 Aug 25 02:49:29 AM UTC 24 Aug 25 03:01:42 AM UTC 24 184693019690 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.1848645705 Aug 25 02:54:45 AM UTC 24 Aug 25 03:01:48 AM UTC 24 497285985909 ps
T260 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_both.1715775881 Aug 25 02:28:28 AM UTC 24 Aug 25 03:01:48 AM UTC 24 521131935530 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.3361876072 Aug 25 02:50:56 AM UTC 24 Aug 25 03:01:50 AM UTC 24 163220581056 ps
T232 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.2662860045 Aug 25 02:42:19 AM UTC 24 Aug 25 03:01:54 AM UTC 24 135159826221 ps
T378 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.781669087 Aug 25 02:56:39 AM UTC 24 Aug 25 03:01:56 AM UTC 24 358002965024 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1077936045 Aug 25 02:50:14 AM UTC 24 Aug 25 03:01:57 AM UTC 24 193205003957 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.3932254541 Aug 25 03:01:50 AM UTC 24 Aug 25 03:02:01 AM UTC 24 4566508814 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.2622221059 Aug 25 02:50:06 AM UTC 24 Aug 25 03:02:12 AM UTC 24 79606920418 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.4072978355 Aug 25 02:59:19 AM UTC 24 Aug 25 03:02:13 AM UTC 24 161775013926 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.1147684595 Aug 25 03:01:57 AM UTC 24 Aug 25 03:02:16 AM UTC 24 16013359525 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.1090016281 Aug 25 03:02:13 AM UTC 24 Aug 25 03:02:16 AM UTC 24 396790592 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.4275797014 Aug 25 02:59:12 AM UTC 24 Aug 25 03:02:16 AM UTC 24 353818523098 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.441449035 Aug 25 03:02:14 AM UTC 24 Aug 25 03:02:19 AM UTC 24 5573711760 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.4031673266 Aug 25 02:41:08 AM UTC 24 Aug 25 03:02:28 AM UTC 24 329642125002 ps
T379 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.330526078 Aug 25 02:59:53 AM UTC 24 Aug 25 03:02:32 AM UTC 24 178994668286 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.633859013 Aug 25 02:56:27 AM UTC 24 Aug 25 03:02:46 AM UTC 24 372280556754 ps
T231 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.1030987852 Aug 25 02:40:56 AM UTC 24 Aug 25 03:02:51 AM UTC 24 142814277088 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.926131615 Aug 25 03:00:06 AM UTC 24 Aug 25 03:02:52 AM UTC 24 40826882494 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.527714244 Aug 25 03:02:53 AM UTC 24 Aug 25 03:02:59 AM UTC 24 3812121401 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.3854906676 Aug 25 03:01:33 AM UTC 24 Aug 25 03:03:05 AM UTC 24 196097751072 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.3601127462 Aug 25 02:48:31 AM UTC 24 Aug 25 03:03:08 AM UTC 24 94321185979 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.3671990552 Aug 25 02:46:32 AM UTC 24 Aug 25 03:03:14 AM UTC 24 495078447625 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.1101152189 Aug 25 02:56:36 AM UTC 24 Aug 25 03:03:14 AM UTC 24 322857566199 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.550187810 Aug 25 03:03:15 AM UTC 24 Aug 25 03:03:19 AM UTC 24 528234171 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.2703734304 Aug 25 03:03:09 AM UTC 24 Aug 25 03:03:23 AM UTC 24 10301018727 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.804308003 Aug 25 03:03:20 AM UTC 24 Aug 25 03:03:28 AM UTC 24 5891591302 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.124667021 Aug 25 03:01:12 AM UTC 24 Aug 25 03:03:29 AM UTC 24 163052744951 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.3232451349 Aug 25 02:36:09 AM UTC 24 Aug 25 03:03:36 AM UTC 24 403318451580 ps
T213 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.3438851167 Aug 25 02:54:09 AM UTC 24 Aug 25 03:03:47 AM UTC 24 540463125999 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.332854846 Aug 25 02:39:43 AM UTC 24 Aug 25 03:03:50 AM UTC 24 490522083544 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.725870042 Aug 25 02:39:02 AM UTC 24 Aug 25 03:04:07 AM UTC 24 361858984652 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.4278154300 Aug 25 03:02:59 AM UTC 24 Aug 25 03:04:09 AM UTC 24 42719342551 ps
T388 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.1445632335 Aug 25 02:53:06 AM UTC 24 Aug 25 03:04:23 AM UTC 24 72899414919 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.943342949 Aug 25 03:04:24 AM UTC 24 Aug 25 03:04:29 AM UTC 24 4309826519 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.1922360516 Aug 25 03:01:55 AM UTC 24 Aug 25 03:04:32 AM UTC 24 41327884820 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.1342350140 Aug 25 03:03:51 AM UTC 24 Aug 25 03:04:38 AM UTC 24 208129179305 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.2025074769 Aug 25 03:04:39 AM UTC 24 Aug 25 03:04:56 AM UTC 24 64089023162 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.1247674139 Aug 25 03:02:17 AM UTC 24 Aug 25 03:04:56 AM UTC 24 163737182709 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.2683340289 Aug 25 03:04:30 AM UTC 24 Aug 25 03:04:57 AM UTC 24 31718469980 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.555113921 Aug 25 03:04:57 AM UTC 24 Aug 25 03:04:59 AM UTC 24 496898833 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.3583144170 Aug 25 02:58:37 AM UTC 24 Aug 25 03:05:01 AM UTC 24 324094420729 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.4258291270 Aug 25 03:02:19 AM UTC 24 Aug 25 03:05:06 AM UTC 24 489995797157 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.2803071724 Aug 25 02:59:49 AM UTC 24 Aug 25 03:05:22 AM UTC 24 333580559566 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.1443692541 Aug 25 02:53:53 AM UTC 24 Aug 25 03:05:22 AM UTC 24 173612468413 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.3687666557 Aug 25 03:04:58 AM UTC 24 Aug 25 03:05:24 AM UTC 24 6032399420 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.3173414399 Aug 25 02:56:38 AM UTC 24 Aug 25 03:05:31 AM UTC 24 536532973575 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.806978897 Aug 25 02:48:58 AM UTC 24 Aug 25 03:05:36 AM UTC 24 488226827634 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.2952421393 Aug 25 02:59:41 AM UTC 24 Aug 25 03:05:52 AM UTC 24 483694429709 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.3187169807 Aug 25 03:05:53 AM UTC 24 Aug 25 03:05:58 AM UTC 24 3168128577 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.324354547 Aug 25 02:44:57 AM UTC 24 Aug 25 03:06:06 AM UTC 24 352947048785 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.3182311071 Aug 25 03:02:52 AM UTC 24 Aug 25 03:06:11 AM UTC 24 340546413703 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.3950387189 Aug 25 03:03:48 AM UTC 24 Aug 25 03:06:38 AM UTC 24 173460221441 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.2526081189 Aug 25 03:05:59 AM UTC 24 Aug 25 03:06:40 AM UTC 24 37945453203 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.1521672901 Aug 25 03:01:03 AM UTC 24 Aug 25 03:06:42 AM UTC 24 324209987207 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.2613557149 Aug 25 03:06:41 AM UTC 24 Aug 25 03:06:45 AM UTC 24 501980572 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt.3098894910 Aug 25 02:34:38 AM UTC 24 Aug 25 03:06:45 AM UTC 24 484812659864 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.2027585893 Aug 25 03:05:36 AM UTC 24 Aug 25 03:06:49 AM UTC 24 177913077181 ps
T202 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.2411708450 Aug 25 03:05:00 AM UTC 24 Aug 25 03:06:52 AM UTC 24 330249587046 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.2643574195 Aug 25 03:03:15 AM UTC 24 Aug 25 03:06:53 AM UTC 24 363439425532 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.1253546491 Aug 25 03:06:43 AM UTC 24 Aug 25 03:07:01 AM UTC 24 5971217699 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.1566440132 Aug 25 02:47:08 AM UTC 24 Aug 25 03:07:03 AM UTC 24 359383835739 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.3107657000 Aug 25 02:54:09 AM UTC 24 Aug 25 03:07:05 AM UTC 24 164999231802 ps
T308 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.806061599 Aug 25 02:37:24 AM UTC 24 Aug 25 03:07:17 AM UTC 24 489934783180 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.2169329632 Aug 25 02:54:29 AM UTC 24 Aug 25 03:07:20 AM UTC 24 116238697890 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.2303100612 Aug 25 02:41:41 AM UTC 24 Aug 25 03:07:26 AM UTC 24 342079612687 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.936767302 Aug 25 02:45:56 AM UTC 24 Aug 25 03:07:31 AM UTC 24 326899427691 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.4282918781 Aug 25 03:07:18 AM UTC 24 Aug 25 03:07:38 AM UTC 24 4772549765 ps
T376 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.3394173556 Aug 25 03:06:12 AM UTC 24 Aug 25 03:07:59 AM UTC 24 156713491199 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.1297612222 Aug 25 03:08:00 AM UTC 24 Aug 25 03:08:04 AM UTC 24 437582175 ps
T207 /workspaces/repo/scratch/os_regression_2024_08_24/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_both.1670846429 Aug 25 02:30:21 AM UTC 24 Aug 25 03:08:06 AM UTC 24 596079132276 ps
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