Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	371657	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4899416	1		T1	217		T2	20		T8	6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1307949	1		T1	179		T2	15		T8	6
values[0x0]	1865422	1		T1	114		T2	8		T8	2
values[0x1]	2097702	1		T1	134		T2	14		T8	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	167803	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	5103270	1		T1	289		T2	23		T8	7

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	21115	1		T1	3		T9	2		T22	306
valid_sources[0x01]	19907	1		T1	3		T26	1		T5	4
valid_sources[0x02]	20432	1		T1	2		T13	1		T9	4
valid_sources[0x03]	19795	1		T4	1		T9	1		T11	4
valid_sources[0x04]	19947	1		T1	1		T13	1		T9	4
valid_sources[0x05]	20362	1		T1	6		T22	26		T23	199
valid_sources[0x06]	20932	1		T1	3		T30	11		T22	329
valid_sources[0x07]	20089	1		T1	8		T13	1		T6	1
valid_sources[0x08]	20935	1		T1	2		T9	4		T11	4
valid_sources[0x09]	19506	1		T1	1		T5	3		T6	1
valid_sources[0x0a]	21663	1		T1	2		T4	4		T9	4
valid_sources[0x0b]	20332	1		T1	2		T17	4		T9	5
valid_sources[0x0c]	19575	1		T13	1		T17	1		T5	64
valid_sources[0x0d]	21417	1		T4	4		T9	1		T6	1
valid_sources[0x0e]	20855	1		T1	5		T17	88		T28	1
valid_sources[0x0f]	19498	1		T1	8		T9	12		T10	23
valid_sources[0x10]	18809	1		T1	6		T9	4		T55	8
valid_sources[0x11]	19274	1		T1	4		T55	9		T11	1
valid_sources[0x12]	21235	1		T1	2		T9	1		T22	94
valid_sources[0x13]	19824	1		T1	1		T17	5		T9	2
valid_sources[0x14]	19963	1		T2	1		T13	1		T55	7
valid_sources[0x15]	20274	1		T1	5		T17	3		T123	1
valid_sources[0x16]	19027	1		T9	10		T54	7		T22	35
valid_sources[0x17]	20970	1		T13	1		T9	1		T22	187
valid_sources[0x18]	19807	1		T1	3		T13	1		T9	5
valid_sources[0x19]	20368	1		T1	1		T11	4		T22	77
valid_sources[0x1a]	19497	1		T9	5		T6	9		T30	1
valid_sources[0x1b]	21069	1		T17	4		T5	4		T30	1
valid_sources[0x1c]	22590	1		T9	9		T5	4		T29	20
valid_sources[0x1d]	20745	1		T17	10		T55	4		T123	1
valid_sources[0x1e]	19980	1		T1	1		T9	4		T28	7
valid_sources[0x1f]	17947	1		T5	3		T123	1		T22	273
valid_sources[0x20]	19040	1		T1	1		T10	10		T55	7
valid_sources[0x21]	20640	1		T2	1		T5	1		T11	2
valid_sources[0x22]	21176	1		T9	9		T26	1		T11	3
valid_sources[0x23]	22333	1		T11	6		T22	11		T23	230
valid_sources[0x24]	19179	1		T1	2		T30	3		T31	1
valid_sources[0x25]	19363	1		T1	1		T8	1		T17	6
valid_sources[0x26]	20106	1		T9	12		T22	191		T23	202
valid_sources[0x27]	18873	1		T1	2		T2	1		T26	3
valid_sources[0x28]	20950	1		T28	9		T5	4		T20	1
valid_sources[0x29]	20835	1		T9	4		T11	11		T22	178
valid_sources[0x2a]	21356	1		T1	6		T3	2		T9	14
valid_sources[0x2b]	20834	1		T1	3		T14	12		T5	4
valid_sources[0x2c]	20312	1		T1	3		T17	5		T9	2
valid_sources[0x2d]	20371	1		T1	4		T9	2		T6	1
valid_sources[0x2e]	21382	1		T22	268		T23	203		T25	520
valid_sources[0x2f]	20292	1		T1	1		T2	1		T16	2
valid_sources[0x30]	20623	1		T17	3		T9	1		T11	2
valid_sources[0x31]	21856	1		T6	2		T20	1		T22	121
valid_sources[0x32]	18366	1		T1	3		T55	12		T22	359
valid_sources[0x33]	21278	1		T22	6		T23	213		T25	110
valid_sources[0x34]	21364	1		T7	3		T30	1		T31	1
valid_sources[0x35]	19015	1		T1	3		T9	4		T55	15
valid_sources[0x36]	19826	1		T9	7		T55	17		T22	204
valid_sources[0x37]	20493	1		T1	5		T9	2		T26	1
valid_sources[0x38]	20341	1		T1	1		T3	5		T9	2
valid_sources[0x39]	18385	1		T1	1		T17	5		T9	6
valid_sources[0x3a]	21216	1		T27	5		T11	3		T31	1
valid_sources[0x3b]	20802	1		T1	7		T9	1		T55	30
valid_sources[0x3c]	21000	1		T9	2		T11	2		T22	250
valid_sources[0x3d]	20051	1		T1	1		T9	8		T11	1
valid_sources[0x3e]	19138	1		T1	4		T17	3		T11	1
valid_sources[0x3f]	20724	1		T1	2		T9	13		T123	1
valid_sources[0x40]	21346	1		T3	4		T6	4		T22	175
valid_sources[0x41]	19765	1		T1	1		T17	3		T9	1
valid_sources[0x42]	21324	1		T4	2		T11	1		T30	14
valid_sources[0x43]	19675	1		T26	1		T10	10		T55	4
valid_sources[0x44]	20858	1		T1	4		T17	2		T9	2
valid_sources[0x45]	17933	1		T1	1		T9	3		T26	1
valid_sources[0x46]	21937	1		T1	1		T55	2		T7	2
valid_sources[0x47]	19838	1		T1	2		T26	1		T6	2
valid_sources[0x48]	19702	1		T17	1		T10	11		T28	3
valid_sources[0x49]	21574	1		T55	8		T123	1		T22	390
valid_sources[0x4a]	22221	1		T2	3		T8	1		T17	6
valid_sources[0x4b]	21457	1		T9	3		T30	8		T22	116
valid_sources[0x4c]	20989	1		T1	4		T30	3		T22	322
valid_sources[0x4d]	20279	1		T17	11		T9	3		T6	5
valid_sources[0x4e]	20911	1		T13	1		T10	8		T22	174
valid_sources[0x4f]	20170	1		T1	1		T26	1		T55	1
valid_sources[0x50]	19569	1		T1	5		T16	1		T17	30
valid_sources[0x51]	19575	1		T11	1		T22	24		T23	213
valid_sources[0x52]	20281	1		T1	2		T2	1		T17	3
valid_sources[0x53]	20032	1		T1	4		T17	1		T123	1
valid_sources[0x54]	21666	1		T26	1		T6	3		T20	2
valid_sources[0x55]	21534	1		T1	1		T9	2		T22	409
valid_sources[0x56]	21199	1		T17	10		T9	3		T55	8
valid_sources[0x57]	21062	1		T1	2		T3	2		T17	21
valid_sources[0x58]	21411	1		T1	3		T9	2		T6	1
valid_sources[0x59]	20612	1		T17	6		T22	386		T23	223
valid_sources[0x5a]	21605	1		T1	2		T16	1		T26	1
valid_sources[0x5b]	19885	1		T9	1		T30	27		T22	371
valid_sources[0x5c]	18768	1		T1	4		T10	10		T55	5
valid_sources[0x5d]	22406	1		T1	3		T6	3		T11	6
valid_sources[0x5e]	21389	1		T9	4		T55	5		T84	1
valid_sources[0x5f]	19937	1		T12	1		T13	1		T17	2
valid_sources[0x60]	21293	1		T28	2		T22	263		T23	206
valid_sources[0x61]	19861	1		T1	6		T9	4		T5	3
valid_sources[0x62]	20941	1		T2	1		T17	23		T9	2
valid_sources[0x63]	20292	1		T1	4		T9	4		T30	16
valid_sources[0x64]	22170	1		T1	3		T5	4		T6	2
valid_sources[0x65]	19577	1		T1	2		T28	19		T22	65
valid_sources[0x66]	22828	1		T1	5		T17	4		T26	1
valid_sources[0x67]	20439	1		T11	2		T22	21		T23	214
valid_sources[0x68]	22419	1		T5	7		T22	132		T23	204
valid_sources[0x69]	21072	1		T1	2		T26	1		T22	203
valid_sources[0x6a]	20808	1		T1	3		T55	30		T22	186
valid_sources[0x6b]	20431	1		T1	1		T9	1		T10	11
valid_sources[0x6c]	18211	1		T6	1		T55	15		T22	8
valid_sources[0x6d]	19404	1		T1	2		T13	1		T9	8
valid_sources[0x6e]	19322	1		T1	2		T28	2		T22	290
valid_sources[0x6f]	20323	1		T1	6		T8	1		T16	1
valid_sources[0x70]	19847	1		T1	2		T11	7		T22	181
valid_sources[0x71]	21644	1		T2	1		T9	1		T22	9
valid_sources[0x72]	19909	1		T1	2		T13	1		T17	1
valid_sources[0x73]	20286	1		T2	2		T17	1		T9	7
valid_sources[0x74]	19639	1		T1	5		T7	1		T22	42
valid_sources[0x75]	20700	1		T6	1		T22	7		T23	220
valid_sources[0x76]	19022	1		T1	1		T9	6		T22	7
valid_sources[0x77]	20461	1		T6	1		T123	1		T11	2
valid_sources[0x78]	19858	1		T31	1		T22	86		T23	209
valid_sources[0x79]	21717	1		T9	13		T55	9		T23	214
valid_sources[0x7a]	18027	1		T1	1		T5	4		T22	22
valid_sources[0x7b]	19819	1		T2	3		T9	1		T26	1
valid_sources[0x7c]	21884	1		T1	1		T11	4		T22	102
valid_sources[0x7d]	20331	1		T1	3		T6	2		T22	155
valid_sources[0x7e]	21418	1		T1	3		T22	257		T23	204
valid_sources[0x7f]	19880	1		T1	3		T17	16		T9	2
valid_sources[0x80]	20252	1		T1	3		T9	2		T28	16

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1226120

1

T1

61

T2

5

T8

4

values[0x0]

all_enables

biggest_size

1835428

1

T1

79

T2

5

T3

4

values[0x1]

all_enables

biggest_size

1837868

1

T1

77

T2

10

T8

2