Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	359666	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4749841	1		T1	8		T2	13		T3	13

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1268892	1		T1	3		T2	2		T3	2
values[0x0]	1811642	1		T1	6		T2	12		T3	8
values[0x1]	2028973	1		T1	9		T2	4		T3	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	164162	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4945345	1		T1	8		T2	13		T3	13

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	19089	1		T6	1		T7	1		T13	1
valid_sources[0x01]	20180	1		T5	1		T14	689		T16	429
valid_sources[0x02]	18935	1		T6	3		T13	6		T14	621
valid_sources[0x03]	20119	1		T6	1		T8	4		T14	641
valid_sources[0x04]	18934	1		T6	1		T9	1		T14	624
valid_sources[0x05]	20813	1		T6	2		T14	637		T16	429
valid_sources[0x06]	19360	1		T7	2		T9	1		T14	676
valid_sources[0x07]	21584	1		T6	1		T13	2		T14	646
valid_sources[0x08]	19431	1		T6	3		T14	620		T16	392
valid_sources[0x09]	20041	1		T6	3		T14	586		T16	398
valid_sources[0x0a]	19891	1		T6	1		T14	662		T16	424
valid_sources[0x0b]	19329	1		T6	2		T13	1		T14	747
valid_sources[0x0c]	18922	1		T6	1		T15	1		T13	3
valid_sources[0x0d]	18749	1		T13	2		T14	600		T16	408
valid_sources[0x0e]	19771	1		T14	621		T16	375		T17	130
valid_sources[0x0f]	20850	1		T6	1		T13	3		T14	694
valid_sources[0x10]	20995	1		T13	1		T14	678		T16	415
valid_sources[0x11]	20446	1		T6	6		T13	6		T14	657
valid_sources[0x12]	20166	1		T6	3		T14	630		T16	397
valid_sources[0x13]	20305	1		T6	1		T13	1		T14	637
valid_sources[0x14]	20445	1		T5	1		T14	587		T16	440
valid_sources[0x15]	19947	1		T13	4		T14	630		T16	414
valid_sources[0x16]	18884	1		T13	1		T14	682		T16	411
valid_sources[0x17]	19468	1		T6	1		T14	670		T16	400
valid_sources[0x18]	20799	1		T5	1		T6	1		T14	632
valid_sources[0x19]	20943	1		T14	616		T16	392		T17	42
valid_sources[0x1a]	20189	1		T13	3		T14	654		T16	434
valid_sources[0x1b]	19507	1		T6	2		T14	738		T16	448
valid_sources[0x1c]	19107	1		T6	1		T14	638		T16	424
valid_sources[0x1d]	20271	1		T11	1		T14	649		T16	412
valid_sources[0x1e]	21018	1		T14	637		T16	409		T17	220
valid_sources[0x1f]	20767	1		T13	1		T14	589		T16	417
valid_sources[0x20]	20933	1		T13	4		T14	641		T16	406
valid_sources[0x21]	22162	1		T2	2		T5	1		T6	2
valid_sources[0x22]	21300	1		T6	3		T13	1		T14	668
valid_sources[0x23]	20306	1		T6	2		T13	2		T14	602
valid_sources[0x24]	21035	1		T6	2		T13	5		T14	655
valid_sources[0x25]	20237	1		T6	2		T13	1		T14	731
valid_sources[0x26]	19928	1		T6	1		T12	18		T13	6
valid_sources[0x27]	20074	1		T6	2		T14	666		T16	395
valid_sources[0x28]	19688	1		T6	1		T14	627		T16	404
valid_sources[0x29]	20379	1		T6	4		T13	3		T14	641
valid_sources[0x2a]	19989	1		T14	590		T16	402		T17	13
valid_sources[0x2b]	21142	1		T2	1		T14	654		T16	400
valid_sources[0x2c]	19278	1		T6	3		T7	1		T15	4
valid_sources[0x2d]	20111	1		T6	2		T7	1		T11	5
valid_sources[0x2e]	18575	1		T5	1		T6	1		T14	643
valid_sources[0x2f]	20318	1		T5	1		T13	3		T14	574
valid_sources[0x30]	19558	1		T2	1		T6	2		T14	663
valid_sources[0x31]	20117	1		T6	2		T7	1		T13	2
valid_sources[0x32]	19306	1		T6	2		T9	2		T14	668
valid_sources[0x33]	21069	1		T6	1		T14	672		T16	439
valid_sources[0x34]	20062	1		T13	8		T14	655		T16	416
valid_sources[0x35]	19458	1		T6	3		T14	730		T16	419
valid_sources[0x36]	20034	1		T6	4		T13	4		T14	685
valid_sources[0x37]	19492	1		T5	1		T6	1		T14	560
valid_sources[0x38]	20360	1		T13	1		T14	633		T16	416
valid_sources[0x39]	18897	1		T6	3		T14	684		T16	415
valid_sources[0x3a]	19559	1		T6	1		T13	1		T14	701
valid_sources[0x3b]	20211	1		T13	1		T14	696		T16	394
valid_sources[0x3c]	21950	1		T13	1		T14	689		T16	416
valid_sources[0x3d]	20999	1		T6	3		T14	652		T16	392
valid_sources[0x3e]	20288	1		T14	730		T16	427		T17	101
valid_sources[0x3f]	20081	1		T6	2		T14	618		T16	400
valid_sources[0x40]	20704	1		T6	2		T9	2		T14	752
valid_sources[0x41]	20728	1		T2	1		T5	1		T14	669
valid_sources[0x42]	20062	1		T4	17		T6	2		T14	639
valid_sources[0x43]	20704	1		T14	634		T16	413		T17	6
valid_sources[0x44]	19083	1		T13	1		T14	623		T16	396
valid_sources[0x45]	19685	1		T6	2		T7	1		T14	602
valid_sources[0x46]	17864	1		T6	3		T9	1		T13	6
valid_sources[0x47]	19938	1		T6	2		T13	2		T14	588
valid_sources[0x48]	21361	1		T2	2		T13	2		T14	639
valid_sources[0x49]	21737	1		T6	2		T13	1		T14	670
valid_sources[0x4a]	19292	1		T6	1		T14	719		T16	404
valid_sources[0x4b]	21108	1		T6	4		T14	618		T16	449
valid_sources[0x4c]	19252	1		T9	1		T13	1		T14	643
valid_sources[0x4d]	19433	1		T6	1		T14	680		T16	409
valid_sources[0x4e]	20120	1		T6	2		T13	1		T14	691
valid_sources[0x4f]	19395	1		T14	609		T16	410		T17	156
valid_sources[0x50]	20070	1		T13	4		T14	619		T16	421
valid_sources[0x51]	20047	1		T6	1		T14	578		T16	410
valid_sources[0x52]	20701	1		T5	1		T6	2		T13	1
valid_sources[0x53]	17738	1		T6	2		T13	1		T14	641
valid_sources[0x54]	19994	1		T6	1		T13	4		T14	701
valid_sources[0x55]	18878	1		T6	2		T13	5		T14	635
valid_sources[0x56]	20562	1		T6	1		T14	713		T16	435
valid_sources[0x57]	20208	1		T6	2		T13	1		T14	604
valid_sources[0x58]	19425	1		T6	1		T13	1		T14	635
valid_sources[0x59]	21543	1		T6	2		T13	2		T14	615
valid_sources[0x5a]	19675	1		T14	618		T16	417		T17	590
valid_sources[0x5b]	18910	1		T6	5		T14	609		T16	410
valid_sources[0x5c]	19384	1		T6	2		T13	1		T14	619
valid_sources[0x5d]	20433	1		T5	1		T6	1		T14	710
valid_sources[0x5e]	20746	1		T2	1		T14	562		T16	411
valid_sources[0x5f]	19209	1		T6	2		T13	3		T14	715
valid_sources[0x60]	19199	1		T1	18		T6	4		T7	1
valid_sources[0x61]	20442	1		T7	1		T13	2		T14	687
valid_sources[0x62]	19301	1		T6	3		T13	1		T14	707
valid_sources[0x63]	19283	1		T6	3		T14	678		T16	408
valid_sources[0x64]	20408	1		T5	1		T13	1		T14	619
valid_sources[0x65]	20340	1		T6	1		T14	640		T16	423
valid_sources[0x66]	19240	1		T10	258		T13	1		T14	653
valid_sources[0x67]	18490	1		T6	3		T14	636		T16	411
valid_sources[0x68]	21228	1		T6	1		T14	721		T16	454
valid_sources[0x69]	18652	1		T14	751		T16	439		T44	1
valid_sources[0x6a]	20151	1		T13	2		T14	617		T16	447
valid_sources[0x6b]	20521	1		T6	2		T14	667		T16	437
valid_sources[0x6c]	21950	1		T14	632		T16	430		T17	456
valid_sources[0x6d]	20737	1		T6	1		T14	591		T16	438
valid_sources[0x6e]	18506	1		T14	617		T16	399		T17	227
valid_sources[0x6f]	19603	1		T14	720		T16	423		T17	273
valid_sources[0x70]	19525	1		T6	1		T14	653		T16	394
valid_sources[0x71]	19129	1		T14	659		T16	414		T17	278
valid_sources[0x72]	20506	1		T13	1		T14	663		T16	398
valid_sources[0x73]	19823	1		T6	3		T13	4		T14	665
valid_sources[0x74]	20542	1		T6	2		T7	1		T14	618
valid_sources[0x75]	19248	1		T2	1		T13	1		T14	649
valid_sources[0x76]	21210	1		T2	1		T6	1		T13	4
valid_sources[0x77]	21187	1		T6	1		T13	1		T14	685
valid_sources[0x78]	20704	1		T6	3		T14	718		T16	447
valid_sources[0x79]	20104	1		T6	2		T13	6		T14	636
valid_sources[0x7a]	19837	1		T6	2		T13	1		T14	668
valid_sources[0x7b]	20424	1		T13	1		T14	629		T16	397
valid_sources[0x7c]	20918	1		T6	2		T14	690		T16	448
valid_sources[0x7d]	20123	1		T14	724		T16	434		T17	165
valid_sources[0x7e]	19876	1		T6	3		T13	1		T14	691
valid_sources[0x7f]	19808	1		T6	2		T14	655		T16	424
valid_sources[0x80]	20757	1		T2	1		T6	1		T9	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1188643

1

T1

1

T2

2

T3

2

values[0x0]

all_enables

biggest_size

1781797

1

T1

3

T2

7

T3

6

values[0x1]

all_enables

biggest_size

1779401

1

T1

4

T2

4

T3

5