Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	385862	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4717897	1		T1	180		T2	15		T3	12

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1252856	1		T1	24		T2	1		T3	1
values[0x0]	1804392	1		T1	117		T2	9		T3	9
values[0x1]	2046511	1		T1	129		T2	12		T3	10

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	171597	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4932162	1		T1	199		T2	15		T3	12

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	20150	1		T1	1		T7	414		T11	668
valid_sources[0x01]	20552	1		T1	2		T7	481		T11	407
valid_sources[0x02]	20864	1		T5	2		T7	479		T11	172
valid_sources[0x03]	20789	1		T2	1		T7	635		T11	197
valid_sources[0x04]	20733	1		T7	498		T11	547		T12	222
valid_sources[0x05]	20469	1		T1	5		T7	446		T11	631
valid_sources[0x06]	20436	1		T1	4		T7	558		T11	937
valid_sources[0x07]	17920	1		T1	4		T7	483		T11	145
valid_sources[0x08]	20161	1		T1	1		T7	420		T11	601
valid_sources[0x09]	19965	1		T1	1		T7	487		T10	1
valid_sources[0x0a]	19131	1		T7	642		T11	918		T12	214
valid_sources[0x0b]	20164	1		T1	2		T3	3		T7	458
valid_sources[0x0c]	20151	1		T1	1		T5	3		T7	459
valid_sources[0x0d]	18769	1		T7	421		T11	762		T12	224
valid_sources[0x0e]	20442	1		T7	339		T11	484		T12	239
valid_sources[0x0f]	20383	1		T7	421		T11	872		T12	213
valid_sources[0x10]	19436	1		T1	1		T7	417		T10	5
valid_sources[0x11]	18937	1		T1	1		T7	373		T11	483
valid_sources[0x12]	19245	1		T7	481		T10	13		T11	774
valid_sources[0x13]	22115	1		T1	2		T3	7		T7	362
valid_sources[0x14]	20981	1		T7	441		T11	480		T12	195
valid_sources[0x15]	18285	1		T1	2		T7	443		T11	161
valid_sources[0x16]	22263	1		T7	428		T10	4		T11	634
valid_sources[0x17]	19821	1		T1	1		T7	541		T11	425
valid_sources[0x18]	21167	1		T1	7		T7	523		T11	317
valid_sources[0x19]	19960	1		T7	343		T11	489		T12	200
valid_sources[0x1a]	20159	1		T7	599		T11	392		T12	189
valid_sources[0x1b]	19497	1		T4	283		T7	402		T11	471
valid_sources[0x1c]	19521	1		T1	2		T7	420		T11	481
valid_sources[0x1d]	20195	1		T7	402		T11	170		T12	203
valid_sources[0x1e]	18500	1		T7	472		T11	34		T12	183
valid_sources[0x1f]	20754	1		T7	433		T11	671		T12	224
valid_sources[0x20]	19365	1		T7	409		T11	144		T12	196
valid_sources[0x21]	22441	1		T1	3		T7	480		T11	586
valid_sources[0x22]	21193	1		T1	5		T7	442		T11	547
valid_sources[0x23]	20184	1		T7	391		T11	538		T12	202
valid_sources[0x24]	19360	1		T1	1		T7	414		T11	731
valid_sources[0x25]	20080	1		T7	545		T10	9		T11	112
valid_sources[0x26]	20291	1		T7	485		T11	414		T12	200
valid_sources[0x27]	19647	1		T1	1		T7	441		T11	415
valid_sources[0x28]	20697	1		T7	620		T11	461		T12	218
valid_sources[0x29]	19341	1		T1	2		T7	516		T11	470
valid_sources[0x2a]	18201	1		T7	430		T11	138		T12	224
valid_sources[0x2b]	21732	1		T7	443		T11	866		T12	212
valid_sources[0x2c]	18430	1		T1	3		T7	558		T11	334
valid_sources[0x2d]	18527	1		T7	472		T11	264		T12	244
valid_sources[0x2e]	18847	1		T1	1		T7	506		T11	33
valid_sources[0x2f]	19255	1		T1	2		T2	2		T7	429
valid_sources[0x30]	18584	1		T7	428		T11	221		T12	222
valid_sources[0x31]	20478	1		T1	1		T7	433		T8	2
valid_sources[0x32]	20672	1		T7	365		T11	516		T12	222
valid_sources[0x33]	19157	1		T7	468		T11	487		T12	202
valid_sources[0x34]	20126	1		T1	4		T2	1		T7	510
valid_sources[0x35]	20432	1		T1	5		T7	450		T11	167
valid_sources[0x36]	19766	1		T1	1		T5	2		T7	405
valid_sources[0x37]	19352	1		T1	2		T7	360		T10	7
valid_sources[0x38]	19991	1		T7	405		T10	5		T11	704
valid_sources[0x39]	19750	1		T7	516		T11	767		T12	251
valid_sources[0x3a]	18777	1		T7	422		T11	275		T12	222
valid_sources[0x3b]	18794	1		T7	395		T10	1		T11	236
valid_sources[0x3c]	19588	1		T7	409		T11	294		T12	220
valid_sources[0x3d]	19420	1		T1	1		T7	471		T11	519
valid_sources[0x3e]	21996	1		T1	1		T2	1		T7	410
valid_sources[0x3f]	19192	1		T1	3		T7	672		T11	107
valid_sources[0x40]	20027	1		T1	1		T7	466		T11	766
valid_sources[0x41]	20482	1		T7	364		T8	4		T11	200
valid_sources[0x42]	19995	1		T1	3		T7	451		T11	276
valid_sources[0x43]	19640	1		T1	2		T7	428		T11	312
valid_sources[0x44]	20325	1		T7	369		T11	2		T12	230
valid_sources[0x45]	19709	1		T1	4		T7	441		T12	252
valid_sources[0x46]	21062	1		T7	390		T8	1		T11	448
valid_sources[0x47]	19667	1		T1	6		T7	454		T10	20
valid_sources[0x48]	18679	1		T7	501		T10	11		T11	523
valid_sources[0x49]	19207	1		T7	422		T11	338		T12	212
valid_sources[0x4a]	18507	1		T7	448		T10	25		T11	271
valid_sources[0x4b]	19597	1		T1	2		T7	468		T11	519
valid_sources[0x4c]	19391	1		T7	555		T11	80		T12	171
valid_sources[0x4d]	20174	1		T7	324		T11	1210		T12	200
valid_sources[0x4e]	20855	1		T1	1		T7	506		T10	5
valid_sources[0x4f]	20628	1		T1	2		T7	401		T11	664
valid_sources[0x50]	19260	1		T1	6		T7	399		T11	77
valid_sources[0x51]	22044	1		T7	587		T11	271		T12	221
valid_sources[0x52]	19385	1		T1	2		T7	493		T11	345
valid_sources[0x53]	18280	1		T7	446		T10	7		T11	311
valid_sources[0x54]	20154	1		T7	533		T11	684		T12	253
valid_sources[0x55]	20662	1		T7	513		T11	846		T12	213
valid_sources[0x56]	18836	1		T5	1		T7	480		T10	2
valid_sources[0x57]	19785	1		T7	401		T11	468		T12	214
valid_sources[0x58]	20189	1		T2	1		T7	356		T11	328
valid_sources[0x59]	19407	1		T1	1		T7	510		T11	678
valid_sources[0x5a]	21803	1		T7	543		T11	404		T12	221
valid_sources[0x5b]	19501	1		T7	410		T11	17		T12	241
valid_sources[0x5c]	19290	1		T7	371		T11	852		T12	211
valid_sources[0x5d]	19933	1		T1	1		T2	4		T7	572
valid_sources[0x5e]	20771	1		T1	4		T5	3		T7	529
valid_sources[0x5f]	20099	1		T7	410		T10	12		T11	375
valid_sources[0x60]	21394	1		T7	457		T11	557		T12	260
valid_sources[0x61]	20318	1		T7	469		T11	608		T12	219
valid_sources[0x62]	18904	1		T7	442		T11	59		T12	216
valid_sources[0x63]	21694	1		T3	1		T7	456		T8	2
valid_sources[0x64]	18943	1		T2	3		T7	429		T11	241
valid_sources[0x65]	20944	1		T7	501		T11	538		T12	185
valid_sources[0x66]	19655	1		T1	3		T5	1		T7	439
valid_sources[0x67]	18798	1		T7	500		T11	2		T12	233
valid_sources[0x68]	18853	1		T1	2		T7	432		T11	441
valid_sources[0x69]	20308	1		T7	298		T11	555		T12	231
valid_sources[0x6a]	20436	1		T7	646		T11	684		T12	166
valid_sources[0x6b]	19840	1		T7	485		T11	715		T12	208
valid_sources[0x6c]	18796	1		T7	604		T11	357		T12	194
valid_sources[0x6d]	20256	1		T1	4		T6	20		T7	416
valid_sources[0x6e]	20106	1		T1	1		T7	501		T11	310
valid_sources[0x6f]	19142	1		T1	1		T7	441		T11	63
valid_sources[0x70]	19966	1		T1	3		T7	461		T11	344
valid_sources[0x71]	21993	1		T7	529		T8	1		T11	850
valid_sources[0x72]	19908	1		T7	444		T11	759		T12	201
valid_sources[0x73]	19167	1		T7	448		T10	8		T11	194
valid_sources[0x74]	19911	1		T1	4		T7	488		T11	12
valid_sources[0x75]	19974	1		T1	1		T7	438		T11	216
valid_sources[0x76]	22460	1		T1	2		T7	420		T11	309
valid_sources[0x77]	20614	1		T1	1		T7	502		T11	279
valid_sources[0x78]	20111	1		T7	512		T11	125		T12	187
valid_sources[0x79]	19566	1		T1	2		T7	394		T8	1
valid_sources[0x7a]	20613	1		T1	8		T7	428		T11	344
valid_sources[0x7b]	19459	1		T1	2		T7	415		T11	226
valid_sources[0x7c]	20684	1		T1	1		T7	362		T10	1
valid_sources[0x7d]	19799	1		T7	401		T11	599		T12	217
valid_sources[0x7e]	19958	1		T1	2		T7	408		T11	746
valid_sources[0x7f]	21442	1		T1	1		T7	414		T10	16
valid_sources[0x80]	17907	1		T7	600		T11	653		T12	211

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1175897

1

T1

15

T2

1

T3

1

values[0x0]

all_enables

biggest_size

1772002

1

T1

79

T2

6

T3

6

values[0x1]

all_enables

biggest_size

1769998

1

T1

86

T2

8

T3

5