Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	385149	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4712296	1		T1	177821		T2	60193		T3	18

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1251795	1		T1	47389		T2	15810		T3	1
values[0x0]	1801703	1		T1	67807		T2	23199		T3	14
values[0x1]	2043947	1		T1	77438		T2	26246		T3	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	171597	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4925848	1		T1	186354		T2	62970		T3	20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	21615	1		T1	769		T2	248		T5	309
valid_sources[0x01]	20152	1		T1	752		T2	219		T5	315
valid_sources[0x02]	21296	1		T1	732		T2	271		T5	307
valid_sources[0x03]	18920	1		T1	760		T2	263		T5	321
valid_sources[0x04]	19617	1		T1	705		T2	290		T5	303
valid_sources[0x05]	18479	1		T1	782		T2	229		T5	291
valid_sources[0x06]	20290	1		T1	789		T2	256		T5	287
valid_sources[0x07]	19639	1		T1	753		T2	267		T5	322
valid_sources[0x08]	19782	1		T1	767		T2	259		T5	280
valid_sources[0x09]	20303	1		T1	720		T2	258		T5	275
valid_sources[0x0a]	20509	1		T1	748		T2	245		T5	314
valid_sources[0x0b]	19754	1		T1	727		T2	239		T5	309
valid_sources[0x0c]	19858	1		T1	742		T2	263		T5	266
valid_sources[0x0d]	20020	1		T1	701		T2	249		T5	333
valid_sources[0x0e]	19351	1		T1	732		T2	227		T5	309
valid_sources[0x0f]	20642	1		T1	691		T2	230		T5	276
valid_sources[0x10]	20460	1		T1	779		T2	246		T5	336
valid_sources[0x11]	21442	1		T1	727		T2	261		T5	294
valid_sources[0x12]	20603	1		T1	788		T2	259		T5	260
valid_sources[0x13]	18559	1		T1	709		T2	259		T5	316
valid_sources[0x14]	18536	1		T1	821		T2	271		T5	232
valid_sources[0x15]	21128	1		T1	765		T2	246		T5	290
valid_sources[0x16]	19746	1		T1	798		T2	262		T5	248
valid_sources[0x17]	20207	1		T1	711		T2	292		T5	298
valid_sources[0x18]	19160	1		T1	744		T2	266		T5	288
valid_sources[0x19]	19479	1		T1	726		T2	295		T5	317
valid_sources[0x1a]	19715	1		T1	725		T2	228		T5	310
valid_sources[0x1b]	20445	1		T1	724		T2	291		T5	279
valid_sources[0x1c]	19736	1		T1	711		T2	252		T5	308
valid_sources[0x1d]	18342	1		T1	722		T2	245		T5	280
valid_sources[0x1e]	19892	1		T1	783		T2	229		T5	298
valid_sources[0x1f]	18462	1		T1	749		T2	267		T5	307
valid_sources[0x20]	20461	1		T1	802		T2	239		T5	329
valid_sources[0x21]	20043	1		T1	757		T2	230		T5	337
valid_sources[0x22]	21432	1		T1	773		T2	298		T5	310
valid_sources[0x23]	22260	1		T1	794		T2	235		T5	239
valid_sources[0x24]	18229	1		T1	777		T2	273		T5	304
valid_sources[0x25]	21159	1		T1	786		T2	230		T5	302
valid_sources[0x26]	19888	1		T1	756		T2	250		T5	285
valid_sources[0x27]	18590	1		T1	798		T2	276		T5	257
valid_sources[0x28]	21862	1		T1	689		T2	261		T5	279
valid_sources[0x29]	18360	1		T1	832		T2	278		T5	330
valid_sources[0x2a]	18753	1		T1	729		T2	259		T5	277
valid_sources[0x2b]	20376	1		T1	727		T2	261		T5	265
valid_sources[0x2c]	21127	1		T1	760		T2	237		T5	251
valid_sources[0x2d]	20758	1		T1	798		T2	244		T5	328
valid_sources[0x2e]	20154	1		T1	742		T2	260		T5	282
valid_sources[0x2f]	18635	1		T1	759		T2	298		T5	355
valid_sources[0x30]	19099	1		T1	780		T2	227		T5	274
valid_sources[0x31]	19108	1		T1	806		T2	258		T5	322
valid_sources[0x32]	18211	1		T1	758		T2	224		T5	267
valid_sources[0x33]	21533	1		T1	763		T2	249		T5	263
valid_sources[0x34]	20238	1		T1	745		T2	255		T5	288
valid_sources[0x35]	21722	1		T1	753		T2	266		T5	291
valid_sources[0x36]	20703	1		T1	764		T2	262		T5	296
valid_sources[0x37]	22344	1		T1	681		T2	286		T5	279
valid_sources[0x38]	18254	1		T1	708		T2	231		T5	222
valid_sources[0x39]	19821	1		T1	726		T2	224		T5	338
valid_sources[0x3a]	20732	1		T1	717		T2	235		T5	340
valid_sources[0x3b]	19770	1		T1	752		T2	255		T5	336
valid_sources[0x3c]	18791	1		T1	751		T2	266		T5	312
valid_sources[0x3d]	19709	1		T1	737		T2	303		T5	328
valid_sources[0x3e]	18886	1		T1	697		T2	253		T5	279
valid_sources[0x3f]	18180	1		T1	773		T2	257		T5	278
valid_sources[0x40]	21215	1		T1	755		T2	265		T5	306
valid_sources[0x41]	20187	1		T1	740		T2	263		T5	273
valid_sources[0x42]	18926	1		T1	751		T2	289		T5	293
valid_sources[0x43]	19295	1		T1	745		T2	282		T5	334
valid_sources[0x44]	21939	1		T1	778		T2	240		T5	287
valid_sources[0x45]	19896	1		T1	688		T2	262		T5	343
valid_sources[0x46]	18436	1		T1	717		T2	236		T5	285
valid_sources[0x47]	18974	1		T1	758		T2	284		T5	287
valid_sources[0x48]	19493	1		T1	797		T2	252		T5	341
valid_sources[0x49]	18763	1		T1	699		T2	288		T5	273
valid_sources[0x4a]	22072	1		T1	754		T2	266		T5	340
valid_sources[0x4b]	19393	1		T1	652		T2	234		T5	257
valid_sources[0x4c]	19884	1		T1	779		T2	322		T5	286
valid_sources[0x4d]	20767	1		T1	822		T2	257		T5	274
valid_sources[0x4e]	20195	1		T1	785		T2	262		T5	281
valid_sources[0x4f]	19629	1		T1	753		T2	235		T5	295
valid_sources[0x50]	20605	1		T1	756		T2	276		T5	303
valid_sources[0x51]	19649	1		T1	777		T2	258		T5	286
valid_sources[0x52]	20125	1		T1	760		T2	199		T5	281
valid_sources[0x53]	19193	1		T1	816		T2	246		T5	281
valid_sources[0x54]	19987	1		T1	715		T2	220		T5	272
valid_sources[0x55]	20629	1		T1	754		T2	272		T5	321
valid_sources[0x56]	19426	1		T1	707		T2	274		T5	280
valid_sources[0x57]	19427	1		T1	786		T2	287		T5	291
valid_sources[0x58]	18966	1		T1	769		T2	266		T5	287
valid_sources[0x59]	18575	1		T1	745		T2	238		T5	313
valid_sources[0x5a]	17875	1		T1	862		T2	240		T5	292
valid_sources[0x5b]	19962	1		T1	804		T2	246		T5	297
valid_sources[0x5c]	20035	1		T1	788		T2	246		T5	313
valid_sources[0x5d]	21452	1		T1	672		T2	261		T5	270
valid_sources[0x5e]	20459	1		T1	780		T2	236		T5	259
valid_sources[0x5f]	21789	1		T1	723		T2	235		T5	290
valid_sources[0x60]	21178	1		T1	770		T2	270		T5	298
valid_sources[0x61]	20176	1		T1	784		T2	266		T5	319
valid_sources[0x62]	19646	1		T1	762		T2	271		T5	304
valid_sources[0x63]	20387	1		T1	789		T2	230		T5	310
valid_sources[0x64]	19405	1		T1	756		T2	238		T5	324
valid_sources[0x65]	20870	1		T1	809		T2	290		T5	333
valid_sources[0x66]	21027	1		T1	735		T2	341		T5	328
valid_sources[0x67]	20180	1		T1	765		T2	263		T5	375
valid_sources[0x68]	20811	1		T1	730		T2	257		T5	289
valid_sources[0x69]	20362	1		T1	856		T2	225		T5	327
valid_sources[0x6a]	20636	1		T1	735		T2	297		T5	264
valid_sources[0x6b]	20049	1		T1	776		T2	254		T5	318
valid_sources[0x6c]	20376	1		T1	750		T2	264		T5	324
valid_sources[0x6d]	17985	1		T1	746		T2	266		T5	306
valid_sources[0x6e]	20845	1		T1	652		T2	286		T5	332
valid_sources[0x6f]	19322	1		T1	776		T2	235		T5	298
valid_sources[0x70]	20092	1		T1	743		T2	239		T5	261
valid_sources[0x71]	19637	1		T1	739		T2	292		T5	240
valid_sources[0x72]	19079	1		T1	701		T2	259		T5	286
valid_sources[0x73]	19520	1		T1	686		T2	195		T5	293
valid_sources[0x74]	18821	1		T1	820		T2	269		T5	338
valid_sources[0x75]	19878	1		T1	710		T2	211		T5	296
valid_sources[0x76]	20925	1		T1	800		T2	273		T5	283
valid_sources[0x77]	18927	1		T1	712		T2	246		T5	341
valid_sources[0x78]	18571	1		T1	794		T2	297		T5	315
valid_sources[0x79]	18336	1		T1	740		T2	267		T5	295
valid_sources[0x7a]	20626	1		T1	693		T2	285		T5	341
valid_sources[0x7b]	19890	1		T1	693		T2	240		T5	275
valid_sources[0x7c]	20392	1		T1	838		T2	246		T5	283
valid_sources[0x7d]	19103	1		T1	755		T2	303		T5	305
valid_sources[0x7e]	19282	1		T1	765		T2	269		T5	270
valid_sources[0x7f]	20856	1		T1	740		T2	229		T5	344
valid_sources[0x80]	19639	1		T1	746		T2	264		T5	315

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1174422

1

T1

44483

T2

14775

T3

1

values[0x0]

all_enables

biggest_size

1769362

1

T1

66785

T2

22751

T3

14

values[0x1]

all_enables

biggest_size

1768512

1

T1

66553

T2

22667

T3

3