Summary for Variable cp_intr
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
2 |
0 |
2 |
100.00 |
User Defined Bins for cp_intr
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
3756 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
29 |
all_values[1] |
3756 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
29 |
Summary for Variable cp_intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_intr_en
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6127 |
1 |
|
T3 |
41 |
|
T6 |
44 |
|
T9 |
42 |
auto[1] |
1385 |
1 |
|
T1 |
2 |
|
T2 |
2 |
|
T3 |
17 |
Summary for Variable cp_intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_intr_state
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4324 |
1 |
|
T1 |
2 |
|
T2 |
1 |
|
T3 |
29 |
auto[1] |
3188 |
1 |
|
T2 |
1 |
|
T3 |
29 |
|
T4 |
1 |
Summary for Cross intr_cg_cc
Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for intr_cg_cc
Bins
cp_intr | cp_intr_en | cp_intr_state | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
auto[0] |
auto[0] |
1587 |
1 |
|
T3 |
8 |
|
T6 |
9 |
|
T9 |
10 |
all_values[0] |
auto[0] |
auto[1] |
1054 |
1 |
|
T3 |
8 |
|
T6 |
9 |
|
T9 |
9 |
all_values[0] |
auto[1] |
auto[0] |
145 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
3 |
all_values[0] |
auto[1] |
auto[1] |
970 |
1 |
|
T3 |
10 |
|
T4 |
1 |
|
T5 |
1 |
all_values[1] |
auto[0] |
auto[0] |
2458 |
1 |
|
T3 |
17 |
|
T6 |
21 |
|
T9 |
16 |
all_values[1] |
auto[0] |
auto[1] |
1028 |
1 |
|
T3 |
8 |
|
T6 |
5 |
|
T9 |
7 |
all_values[1] |
auto[1] |
auto[0] |
134 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
1 |
all_values[1] |
auto[1] |
auto[1] |
136 |
1 |
|
T2 |
1 |
|
T3 |
3 |
|
T7 |
1 |