Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	381754	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4672198	1		T1	189		T2	13		T3	12

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1242298	1		T1	27		T2	1		T3	1
values[0x0]	1785886	1		T1	110		T2	13		T3	8
values[0x1]	2025768	1		T1	126		T2	5		T3	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	169854	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4884098	1		T1	207		T2	14		T3	13

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	20889	1		T7	2		T13	279		T14	331
valid_sources[0x01]	19328	1		T13	316		T14	322		T15	458
valid_sources[0x02]	19848	1		T4	2		T7	3		T13	323
valid_sources[0x03]	18932	1		T4	3		T13	326		T14	314
valid_sources[0x04]	19750	1		T3	2		T4	4		T13	331
valid_sources[0x05]	19223	1		T4	1		T7	9		T13	324
valid_sources[0x06]	19137	1		T13	318		T14	343		T30	3
valid_sources[0x07]	18663	1		T4	4		T13	281		T14	379
valid_sources[0x08]	19885	1		T4	1		T13	302		T14	396
valid_sources[0x09]	19828	1		T4	2		T13	320		T14	307
valid_sources[0x0a]	19256	1		T4	2		T13	332		T14	344
valid_sources[0x0b]	20652	1		T4	1		T7	3		T13	277
valid_sources[0x0c]	19535	1		T4	2		T13	315		T14	221
valid_sources[0x0d]	19345	1		T4	2		T13	288		T14	271
valid_sources[0x0e]	19765	1		T13	306		T14	261		T15	498
valid_sources[0x0f]	20260	1		T3	1		T4	1		T7	7
valid_sources[0x10]	19286	1		T7	10		T9	20		T13	352
valid_sources[0x11]	18958	1		T3	2		T4	1		T7	4
valid_sources[0x12]	18427	1		T4	1		T7	1		T13	291
valid_sources[0x13]	19423	1		T7	19		T13	282		T14	341
valid_sources[0x14]	18116	1		T13	260		T14	359		T15	513
valid_sources[0x15]	19529	1		T13	292		T14	319		T15	445
valid_sources[0x16]	20078	1		T2	1		T13	293		T14	304
valid_sources[0x17]	21480	1		T4	1		T13	279		T14	311
valid_sources[0x18]	20424	1		T4	5		T8	12		T13	350
valid_sources[0x19]	19211	1		T4	3		T13	295		T14	399
valid_sources[0x1a]	19720	1		T13	287		T14	321		T15	503
valid_sources[0x1b]	20153	1		T4	1		T7	5		T13	298
valid_sources[0x1c]	19370	1		T4	2		T13	305		T14	294
valid_sources[0x1d]	19192	1		T13	291		T14	267		T30	3
valid_sources[0x1e]	19479	1		T13	312		T14	314		T15	536
valid_sources[0x1f]	19272	1		T4	3		T13	276		T14	303
valid_sources[0x20]	20248	1		T4	1		T13	294		T14	298
valid_sources[0x21]	19007	1		T4	1		T13	330		T14	254
valid_sources[0x22]	19105	1		T4	3		T13	337		T14	355
valid_sources[0x23]	20325	1		T4	2		T5	20		T13	296
valid_sources[0x24]	19399	1		T4	3		T7	2		T13	303
valid_sources[0x25]	19483	1		T4	8		T13	347		T14	330
valid_sources[0x26]	19553	1		T3	1		T13	306		T14	343
valid_sources[0x27]	19853	1		T4	1		T13	307		T14	360
valid_sources[0x28]	20447	1		T4	2		T7	2		T13	324
valid_sources[0x29]	19736	1		T4	2		T13	315		T14	308
valid_sources[0x2a]	20998	1		T4	1		T7	6		T13	345
valid_sources[0x2b]	20574	1		T4	5		T13	319		T14	307
valid_sources[0x2c]	19700	1		T13	312		T14	289		T44	1
valid_sources[0x2d]	19151	1		T4	5		T13	321		T14	324
valid_sources[0x2e]	19583	1		T3	1		T13	272		T14	306
valid_sources[0x2f]	20310	1		T4	1		T13	296		T14	351
valid_sources[0x30]	19564	1		T13	326		T14	389		T15	492
valid_sources[0x31]	18879	1		T4	3		T13	284		T14	305
valid_sources[0x32]	19249	1		T4	1		T13	308		T14	342
valid_sources[0x33]	19792	1		T13	315		T14	265		T30	1
valid_sources[0x34]	19944	1		T13	266		T14	277		T15	505
valid_sources[0x35]	20976	1		T4	4		T13	347		T14	310
valid_sources[0x36]	19391	1		T4	1		T13	322		T14	354
valid_sources[0x37]	19480	1		T7	1		T13	307		T14	276
valid_sources[0x38]	19500	1		T13	298		T14	282		T15	473
valid_sources[0x39]	18854	1		T4	1		T7	24		T13	289
valid_sources[0x3a]	20619	1		T3	1		T4	3		T13	308
valid_sources[0x3b]	19792	1		T4	4		T13	268		T14	343
valid_sources[0x3c]	18987	1		T3	1		T7	6		T13	310
valid_sources[0x3d]	19634	1		T7	7		T13	274		T14	277
valid_sources[0x3e]	18138	1		T4	3		T13	266		T14	242
valid_sources[0x3f]	18856	1		T13	316		T14	329		T15	482
valid_sources[0x40]	20143	1		T4	1		T13	327		T14	326
valid_sources[0x41]	18162	1		T7	2		T13	349		T14	291
valid_sources[0x42]	20052	1		T4	1		T7	13		T13	326
valid_sources[0x43]	19464	1		T4	3		T13	307		T14	359
valid_sources[0x44]	20806	1		T13	318		T14	304		T44	1
valid_sources[0x45]	19489	1		T13	300		T14	305		T15	464
valid_sources[0x46]	19911	1		T13	305		T14	313		T15	527
valid_sources[0x47]	19461	1		T4	2		T13	295		T14	347
valid_sources[0x48]	20386	1		T4	1		T13	289		T14	341
valid_sources[0x49]	19133	1		T13	348		T14	305		T15	503
valid_sources[0x4a]	19838	1		T3	2		T4	3		T13	285
valid_sources[0x4b]	18630	1		T4	4		T13	285		T14	283
valid_sources[0x4c]	18894	1		T4	1		T7	2		T13	287
valid_sources[0x4d]	18853	1		T4	2		T13	272		T14	267
valid_sources[0x4e]	20029	1		T13	293		T14	274		T15	545
valid_sources[0x4f]	19140	1		T4	2		T13	320		T14	304
valid_sources[0x50]	21942	1		T13	317		T14	318		T15	469
valid_sources[0x51]	19853	1		T4	4		T13	308		T14	370
valid_sources[0x52]	19002	1		T13	316		T14	276		T15	482
valid_sources[0x53]	20261	1		T4	2		T13	323		T14	348
valid_sources[0x54]	18720	1		T4	1		T13	287		T14	316
valid_sources[0x55]	20020	1		T3	1		T13	343		T14	366
valid_sources[0x56]	19530	1		T13	324		T14	278		T15	486
valid_sources[0x57]	18841	1		T13	281		T14	325		T15	493
valid_sources[0x58]	19285	1		T13	296		T14	318		T15	492
valid_sources[0x59]	18793	1		T13	310		T14	346		T15	538
valid_sources[0x5a]	18786	1		T4	4		T13	292		T14	280
valid_sources[0x5b]	19904	1		T7	12		T13	287		T14	288
valid_sources[0x5c]	20455	1		T4	3		T13	306		T14	340
valid_sources[0x5d]	19573	1		T13	267		T14	343		T15	503
valid_sources[0x5e]	19651	1		T4	2		T13	293		T14	331
valid_sources[0x5f]	18959	1		T3	1		T13	325		T14	296
valid_sources[0x60]	19396	1		T2	1		T13	266		T14	348
valid_sources[0x61]	17856	1		T4	3		T7	7		T13	285
valid_sources[0x62]	19726	1		T4	2		T13	304		T14	383
valid_sources[0x63]	19066	1		T13	305		T14	326		T30	2
valid_sources[0x64]	19876	1		T4	2		T13	280		T14	230
valid_sources[0x65]	19389	1		T4	1		T13	339		T14	310
valid_sources[0x66]	18143	1		T13	331		T14	291		T15	540
valid_sources[0x67]	19447	1		T13	281		T14	322		T15	509
valid_sources[0x68]	18982	1		T4	1		T13	280		T14	262
valid_sources[0x69]	20771	1		T7	12		T13	298		T14	312
valid_sources[0x6a]	20681	1		T13	312		T14	320		T15	518
valid_sources[0x6b]	19112	1		T4	1		T13	277		T14	266
valid_sources[0x6c]	19059	1		T4	3		T13	302		T14	323
valid_sources[0x6d]	19195	1		T4	1		T13	322		T14	344
valid_sources[0x6e]	19480	1		T13	295		T14	308		T15	471
valid_sources[0x6f]	20245	1		T4	1		T13	314		T14	283
valid_sources[0x70]	20558	1		T4	1		T13	317		T14	308
valid_sources[0x71]	20295	1		T4	1		T13	275		T14	233
valid_sources[0x72]	20354	1		T4	1		T12	304		T13	347
valid_sources[0x73]	19968	1		T13	292		T14	334		T15	484
valid_sources[0x74]	19600	1		T13	290		T14	294		T15	489
valid_sources[0x75]	20622	1		T2	2		T4	1		T13	323
valid_sources[0x76]	19603	1		T4	7		T7	3		T13	294
valid_sources[0x77]	20724	1		T4	1		T13	254		T14	400
valid_sources[0x78]	20371	1		T7	6		T13	340		T14	283
valid_sources[0x79]	19517	1		T13	283		T14	287		T15	497
valid_sources[0x7a]	19486	1		T13	328		T14	309		T15	493
valid_sources[0x7b]	18823	1		T13	333		T14	347		T15	498
valid_sources[0x7c]	19024	1		T13	304		T14	334		T15	530
valid_sources[0x7d]	20540	1		T13	268		T14	365		T15	496
valid_sources[0x7e]	20390	1		T3	1		T4	1		T13	293
valid_sources[0x7f]	18824	1		T2	1		T4	1		T13	280
valid_sources[0x80]	20733	1		T4	1		T7	2		T13	319

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1165582

1

T1

19

T4

20

T7

12

values[0x0]

all_enables

biggest_size

1753834

1

T1

89

T2

9

T3

6

values[0x1]

all_enables

biggest_size

1752782

1

T1

81

T2

4

T3

6