Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	331762	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	3998050	1		T1	31049		T2	200		T3	16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1066517	1		T1	8237		T2	54		T3	1
values[0x0]	1526576	1		T1	11738		T2	111		T3	7
values[0x1]	1736719	1		T1	13461		T2	150		T3	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	148484	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4181328	1		T1	32383		T2	223		T3	17

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	16517	1		T1	122		T7	130		T10	832
valid_sources[0x01]	16595	1		T1	119		T7	16		T10	285
valid_sources[0x02]	16194	1		T1	166		T7	89		T9	1
valid_sources[0x03]	15348	1		T1	83		T7	429		T10	212
valid_sources[0x04]	16767	1		T1	154		T7	11		T10	403
valid_sources[0x05]	17404	1		T1	142		T7	619		T10	352
valid_sources[0x06]	16925	1		T1	110		T7	188		T10	372
valid_sources[0x07]	18324	1		T1	120		T2	5		T7	309
valid_sources[0x08]	17624	1		T1	92		T7	421		T10	505
valid_sources[0x09]	17413	1		T1	75		T7	576		T9	1
valid_sources[0x0a]	18044	1		T1	132		T2	8		T7	17
valid_sources[0x0b]	17088	1		T1	101		T2	8		T7	158
valid_sources[0x0c]	16455	1		T1	130		T7	323		T10	394
valid_sources[0x0d]	16886	1		T1	77		T7	97		T10	315
valid_sources[0x0e]	17191	1		T1	205		T2	6		T7	23
valid_sources[0x0f]	16987	1		T1	121		T7	139		T10	279
valid_sources[0x10]	16301	1		T1	220		T7	62		T10	31
valid_sources[0x11]	16592	1		T1	134		T7	75		T10	114
valid_sources[0x12]	16969	1		T1	44		T5	1		T7	311
valid_sources[0x13]	16354	1		T1	125		T3	2		T7	125
valid_sources[0x14]	16728	1		T1	130		T7	221		T10	299
valid_sources[0x15]	16778	1		T1	98		T5	2		T7	16
valid_sources[0x16]	18280	1		T1	137		T4	1		T7	374
valid_sources[0x17]	15694	1		T1	36		T7	197		T10	269
valid_sources[0x18]	16253	1		T1	138		T4	1		T7	196
valid_sources[0x19]	16821	1		T1	190		T2	1		T7	393
valid_sources[0x1a]	16130	1		T1	81		T2	7		T7	205
valid_sources[0x1b]	16389	1		T1	137		T7	63		T10	208
valid_sources[0x1c]	18136	1		T1	208		T2	10		T7	166
valid_sources[0x1d]	15932	1		T1	102		T7	55		T10	128
valid_sources[0x1e]	18184	1		T1	122		T7	318		T10	623
valid_sources[0x1f]	16580	1		T1	76		T2	8		T7	274
valid_sources[0x20]	17319	1		T1	108		T7	6		T10	629
valid_sources[0x21]	16702	1		T1	110		T7	632		T10	396
valid_sources[0x22]	17668	1		T1	73		T2	1		T7	332
valid_sources[0x23]	16363	1		T1	169		T2	6		T7	667
valid_sources[0x24]	16623	1		T1	138		T7	396		T10	80
valid_sources[0x25]	15816	1		T1	132		T2	9		T7	329
valid_sources[0x26]	17778	1		T1	84		T2	3		T7	516
valid_sources[0x27]	17368	1		T1	144		T7	486		T10	247
valid_sources[0x28]	15899	1		T1	112		T2	6		T3	3
valid_sources[0x29]	17535	1		T1	157		T2	1		T4	1
valid_sources[0x2a]	16852	1		T1	102		T7	251		T10	777
valid_sources[0x2b]	16784	1		T1	189		T4	3		T7	165
valid_sources[0x2c]	16869	1		T1	85		T7	14		T10	314
valid_sources[0x2d]	16959	1		T1	134		T7	421		T10	193
valid_sources[0x2e]	16774	1		T1	108		T7	173		T10	91
valid_sources[0x2f]	16668	1		T1	92		T2	2		T4	1
valid_sources[0x30]	17232	1		T1	151		T7	629		T10	291
valid_sources[0x31]	17164	1		T1	111		T7	12		T10	26
valid_sources[0x32]	17561	1		T1	86		T2	4		T7	390
valid_sources[0x33]	17006	1		T1	126		T7	410		T10	332
valid_sources[0x34]	17177	1		T1	97		T7	116		T8	1
valid_sources[0x35]	17329	1		T1	50		T7	220		T10	369
valid_sources[0x36]	17610	1		T1	194		T7	361		T10	79
valid_sources[0x37]	16341	1		T1	168		T7	336		T10	193
valid_sources[0x38]	15713	1		T1	106		T7	222		T10	28
valid_sources[0x39]	15395	1		T1	135		T2	9		T7	57
valid_sources[0x3a]	17165	1		T1	120		T7	288		T10	271
valid_sources[0x3b]	16505	1		T1	104		T7	129		T10	366
valid_sources[0x3c]	17411	1		T1	153		T2	1		T7	856
valid_sources[0x3d]	18640	1		T1	174		T7	443		T9	1
valid_sources[0x3e]	16807	1		T1	93		T7	56		T10	442
valid_sources[0x3f]	16536	1		T1	153		T7	310		T10	199
valid_sources[0x40]	16828	1		T1	148		T7	328		T10	116
valid_sources[0x41]	17041	1		T1	93		T3	4		T7	27
valid_sources[0x42]	17481	1		T1	120		T7	259		T10	416
valid_sources[0x43]	17306	1		T1	122		T2	1		T7	50
valid_sources[0x44]	17067	1		T1	151		T2	4		T6	6
valid_sources[0x45]	15487	1		T1	139		T7	297		T10	109
valid_sources[0x46]	17276	1		T1	147		T7	358		T10	389
valid_sources[0x47]	16585	1		T1	124		T2	7		T7	195
valid_sources[0x48]	17607	1		T1	221		T7	20		T10	333
valid_sources[0x49]	17987	1		T1	180		T7	192		T10	441
valid_sources[0x4a]	16643	1		T1	60		T2	1		T5	2
valid_sources[0x4b]	15509	1		T1	180		T7	125		T10	62
valid_sources[0x4c]	16399	1		T1	34		T7	255		T10	96
valid_sources[0x4d]	17626	1		T1	205		T7	119		T10	206
valid_sources[0x4e]	15905	1		T1	134		T2	5		T7	151
valid_sources[0x4f]	16708	1		T1	129		T7	272		T10	645
valid_sources[0x50]	15890	1		T1	92		T5	1		T7	248
valid_sources[0x51]	16914	1		T1	118		T7	252		T10	421
valid_sources[0x52]	17677	1		T1	205		T2	4		T7	92
valid_sources[0x53]	16747	1		T1	162		T7	392		T8	1
valid_sources[0x54]	18547	1		T1	89		T6	10		T7	316
valid_sources[0x55]	17127	1		T1	100		T7	90		T10	832
valid_sources[0x56]	16244	1		T1	120		T7	132		T10	204
valid_sources[0x57]	16603	1		T1	112		T7	164		T10	658
valid_sources[0x58]	17371	1		T1	116		T7	342		T10	446
valid_sources[0x59]	17974	1		T1	121		T7	20		T10	734
valid_sources[0x5a]	16329	1		T1	272		T7	336		T10	12
valid_sources[0x5b]	17607	1		T1	123		T2	9		T7	314
valid_sources[0x5c]	16919	1		T1	129		T2	8		T7	402
valid_sources[0x5d]	17166	1		T1	104		T7	492		T10	412
valid_sources[0x5e]	16368	1		T1	155		T7	36		T10	506
valid_sources[0x5f]	17341	1		T1	129		T7	338		T10	112
valid_sources[0x60]	17997	1		T1	211		T2	7		T7	227
valid_sources[0x61]	17968	1		T1	193		T7	263		T10	768
valid_sources[0x62]	16346	1		T1	101		T4	1		T7	183
valid_sources[0x63]	17085	1		T1	134		T7	145		T10	250
valid_sources[0x64]	15750	1		T1	90		T7	101		T10	164
valid_sources[0x65]	16968	1		T1	74		T3	1		T7	302
valid_sources[0x66]	18024	1		T1	117		T2	6		T7	184
valid_sources[0x67]	17885	1		T1	164		T7	420		T10	16
valid_sources[0x68]	16289	1		T1	239		T7	64		T10	430
valid_sources[0x69]	17977	1		T1	107		T2	6		T7	265
valid_sources[0x6a]	17421	1		T1	80		T7	24		T10	139
valid_sources[0x6b]	17565	1		T1	92		T7	280		T9	1
valid_sources[0x6c]	15456	1		T1	89		T7	274		T10	156
valid_sources[0x6d]	16370	1		T1	128		T4	1		T7	342
valid_sources[0x6e]	17969	1		T1	163		T2	3		T7	294
valid_sources[0x6f]	16568	1		T1	138		T7	161		T10	230
valid_sources[0x70]	16904	1		T1	131		T7	305		T10	299
valid_sources[0x71]	16890	1		T1	96		T7	205		T10	238
valid_sources[0x72]	17020	1		T1	78		T3	2		T7	283
valid_sources[0x73]	16253	1		T1	94		T7	253		T10	432
valid_sources[0x74]	16861	1		T1	62		T5	1		T7	313
valid_sources[0x75]	16721	1		T1	240		T7	138		T10	313
valid_sources[0x76]	16387	1		T1	83		T2	2		T7	552
valid_sources[0x77]	15950	1		T1	167		T7	247		T10	94
valid_sources[0x78]	16613	1		T1	138		T7	31		T10	289
valid_sources[0x79]	17246	1		T1	171		T7	221		T10	442
valid_sources[0x7a]	16322	1		T1	100		T7	349		T10	294
valid_sources[0x7b]	16961	1		T1	78		T7	24		T8	3
valid_sources[0x7c]	16374	1		T1	63		T2	2		T7	158
valid_sources[0x7d]	16931	1		T1	148		T7	13		T10	452
valid_sources[0x7e]	17216	1		T1	125		T7	387		T10	193
valid_sources[0x7f]	17969	1		T1	113		T2	1		T7	167
valid_sources[0x80]	17314	1		T1	136		T2	9		T7	245

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

998771

1

T1

7776

T2

31

T3

1

values[0x0]

all_enables

biggest_size

1498421

1

T1

11513

T2

76

T3

7

values[0x1]

all_enables

biggest_size

1500858

1

T1

11760

T2

93

T3

8