Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	356562	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4402196	1		T1	13		T2	15		T3	16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1172620	1		T1	1		T2	1		T3	1
values[0x0]	1680451	1		T1	11		T2	10		T3	9
values[0x1]	1905687	1		T1	8		T2	9		T3	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	158729	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4600029	1		T1	14		T2	16		T3	17

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	18382	1		T6	248		T7	1317		T8	167
valid_sources[0x01]	18472	1		T5	1		T6	265		T7	1597
valid_sources[0x02]	17939	1		T4	2		T6	270		T7	1662
valid_sources[0x03]	19058	1		T6	249		T7	1630		T8	201
valid_sources[0x04]	18946	1		T5	1		T6	262		T7	2087
valid_sources[0x05]	18489	1		T5	1		T6	271		T7	1166
valid_sources[0x06]	17655	1		T6	296		T7	988		T8	179
valid_sources[0x07]	19540	1		T5	2		T6	223		T7	2107
valid_sources[0x08]	19570	1		T5	2		T6	314		T7	1264
valid_sources[0x09]	17385	1		T6	223		T7	594		T8	191
valid_sources[0x0a]	19525	1		T5	3		T6	234		T7	1590
valid_sources[0x0b]	17790	1		T6	292		T7	636		T8	178
valid_sources[0x0c]	17253	1		T5	1		T6	273		T7	1176
valid_sources[0x0d]	17964	1		T5	5		T6	241		T7	1021
valid_sources[0x0e]	17965	1		T5	1		T6	288		T7	1048
valid_sources[0x0f]	19502	1		T5	4		T6	306		T7	1440
valid_sources[0x10]	17601	1		T5	1		T6	265		T7	1519
valid_sources[0x11]	18939	1		T5	3		T6	232		T7	2119
valid_sources[0x12]	17157	1		T1	2		T6	287		T7	855
valid_sources[0x13]	18029	1		T5	1		T6	187		T7	1594
valid_sources[0x14]	18832	1		T5	2		T6	259		T7	1860
valid_sources[0x15]	19534	1		T6	265		T7	1844		T8	160
valid_sources[0x16]	17621	1		T5	2		T6	284		T7	719
valid_sources[0x17]	17290	1		T6	301		T7	1277		T8	170
valid_sources[0x18]	18186	1		T4	2		T6	305		T7	1439
valid_sources[0x19]	18520	1		T5	1		T6	261		T7	1368
valid_sources[0x1a]	18470	1		T5	1		T6	294		T7	1947
valid_sources[0x1b]	18857	1		T6	286		T7	646		T8	181
valid_sources[0x1c]	18228	1		T6	259		T7	1562		T8	161
valid_sources[0x1d]	20021	1		T5	3		T6	248		T7	1682
valid_sources[0x1e]	20304	1		T4	1		T6	247		T7	1542
valid_sources[0x1f]	18660	1		T6	240		T7	1168		T8	159
valid_sources[0x20]	19336	1		T5	2		T6	293		T7	1913
valid_sources[0x21]	18310	1		T6	241		T7	1387		T8	190
valid_sources[0x22]	17701	1		T6	297		T7	641		T8	185
valid_sources[0x23]	17822	1		T5	1		T6	293		T7	1115
valid_sources[0x24]	18335	1		T5	1		T6	237		T7	1040
valid_sources[0x25]	18124	1		T5	1		T6	234		T7	1581
valid_sources[0x26]	17378	1		T6	197		T7	873		T8	173
valid_sources[0x27]	18811	1		T5	3		T6	257		T7	1516
valid_sources[0x28]	18496	1		T5	6		T6	232		T7	880
valid_sources[0x29]	19811	1		T6	248		T7	2065		T8	181
valid_sources[0x2a]	18940	1		T5	1		T6	266		T7	1023
valid_sources[0x2b]	17276	1		T5	1		T6	204		T7	1324
valid_sources[0x2c]	19537	1		T5	2		T6	245		T7	1949
valid_sources[0x2d]	18833	1		T4	1		T6	265		T7	1233
valid_sources[0x2e]	18546	1		T5	2		T6	272		T7	1306
valid_sources[0x2f]	19891	1		T4	3		T5	2		T6	244
valid_sources[0x30]	17607	1		T2	1		T5	3		T6	229
valid_sources[0x31]	17161	1		T1	10		T5	3		T6	211
valid_sources[0x32]	19026	1		T5	3		T6	244		T7	2115
valid_sources[0x33]	19543	1		T6	274		T7	2349		T8	174
valid_sources[0x34]	19749	1		T5	3		T6	222		T7	1742
valid_sources[0x35]	19337	1		T4	1		T6	257		T7	1306
valid_sources[0x36]	19124	1		T5	2		T6	219		T7	1082
valid_sources[0x37]	19419	1		T3	22		T5	1		T6	295
valid_sources[0x38]	19137	1		T5	1		T6	258		T7	1936
valid_sources[0x39]	17682	1		T2	3		T5	3		T6	255
valid_sources[0x3a]	18517	1		T5	2		T6	231		T7	1304
valid_sources[0x3b]	18182	1		T6	258		T7	710		T8	175
valid_sources[0x3c]	19128	1		T5	2		T6	265		T7	1896
valid_sources[0x3d]	19397	1		T5	1		T6	250		T7	704
valid_sources[0x3e]	17805	1		T5	3		T6	278		T7	1014
valid_sources[0x3f]	18440	1		T5	1		T6	252		T7	1353
valid_sources[0x40]	17863	1		T4	1		T5	3		T6	258
valid_sources[0x41]	17899	1		T6	281		T7	1437		T8	215
valid_sources[0x42]	18622	1		T6	247		T7	873		T8	176
valid_sources[0x43]	18608	1		T5	1		T6	229		T7	1484
valid_sources[0x44]	18760	1		T5	3		T6	232		T7	1411
valid_sources[0x45]	18426	1		T5	3		T6	252		T7	1365
valid_sources[0x46]	20395	1		T5	5		T6	304		T7	2132
valid_sources[0x47]	18065	1		T5	1		T6	244		T7	1355
valid_sources[0x48]	18534	1		T5	3		T6	257		T7	1695
valid_sources[0x49]	20820	1		T5	5		T6	317		T7	1514
valid_sources[0x4a]	16892	1		T5	1		T6	239		T7	1112
valid_sources[0x4b]	18927	1		T5	2		T6	197		T7	1646
valid_sources[0x4c]	18360	1		T5	1		T6	259		T7	1144
valid_sources[0x4d]	17637	1		T1	3		T5	1		T6	210
valid_sources[0x4e]	19422	1		T5	3		T6	291		T7	1632
valid_sources[0x4f]	18580	1		T6	253		T7	1223		T8	199
valid_sources[0x50]	18431	1		T5	3		T6	271		T7	1365
valid_sources[0x51]	18130	1		T5	2		T6	246		T7	1361
valid_sources[0x52]	18647	1		T6	218		T7	1558		T8	191
valid_sources[0x53]	18723	1		T5	1		T6	234		T7	1713
valid_sources[0x54]	19016	1		T5	4		T6	257		T7	1849
valid_sources[0x55]	17276	1		T5	1		T6	272		T7	1396
valid_sources[0x56]	19091	1		T5	2		T6	307		T7	1583
valid_sources[0x57]	20925	1		T4	1		T5	2		T6	243
valid_sources[0x58]	18875	1		T6	218		T7	1190		T8	170
valid_sources[0x59]	18221	1		T5	1		T6	270		T7	1221
valid_sources[0x5a]	17572	1		T5	1		T6	303		T7	1303
valid_sources[0x5b]	18350	1		T5	1		T6	265		T7	1958
valid_sources[0x5c]	20396	1		T5	1		T6	268		T7	1525
valid_sources[0x5d]	18654	1		T5	1		T6	311		T7	1496
valid_sources[0x5e]	18459	1		T5	2		T6	274		T7	1372
valid_sources[0x5f]	19448	1		T4	1		T5	3		T6	259
valid_sources[0x60]	17434	1		T5	1		T6	186		T7	1306
valid_sources[0x61]	19366	1		T5	2		T6	288		T7	1994
valid_sources[0x62]	20175	1		T6	300		T7	2352		T8	204
valid_sources[0x63]	19177	1		T5	3		T6	271		T7	1131
valid_sources[0x64]	19771	1		T4	1		T6	209		T7	1667
valid_sources[0x65]	18843	1		T5	1		T6	230		T7	1444
valid_sources[0x66]	17618	1		T5	1		T6	274		T7	559
valid_sources[0x67]	18585	1		T6	255		T7	1286		T8	173
valid_sources[0x68]	19053	1		T6	207		T7	1983		T8	163
valid_sources[0x69]	18441	1		T5	4		T6	291		T7	534
valid_sources[0x6a]	18142	1		T6	250		T7	1033		T8	187
valid_sources[0x6b]	17326	1		T5	2		T6	248		T7	717
valid_sources[0x6c]	18755	1		T5	5		T6	176		T7	1562
valid_sources[0x6d]	18687	1		T5	1		T6	272		T7	1630
valid_sources[0x6e]	18945	1		T5	2		T6	266		T7	1649
valid_sources[0x6f]	18172	1		T6	188		T7	1263		T8	190
valid_sources[0x70]	19039	1		T5	1		T6	243		T7	1944
valid_sources[0x71]	17497	1		T5	4		T6	250		T7	783
valid_sources[0x72]	19416	1		T6	264		T7	1521		T8	174
valid_sources[0x73]	18575	1		T5	2		T6	293		T7	1723
valid_sources[0x74]	19280	1		T6	228		T7	2125		T8	157
valid_sources[0x75]	17338	1		T5	2		T6	279		T7	1462
valid_sources[0x76]	18982	1		T5	2		T6	268		T7	892
valid_sources[0x77]	18292	1		T5	1		T6	218		T7	1814
valid_sources[0x78]	18266	1		T5	1		T6	272		T7	1042
valid_sources[0x79]	19219	1		T5	1		T6	284		T7	1904
valid_sources[0x7a]	18680	1		T5	2		T6	291		T7	977
valid_sources[0x7b]	19219	1		T6	285		T7	1453		T8	175
valid_sources[0x7c]	18074	1		T5	1		T6	276		T7	1808
valid_sources[0x7d]	17408	1		T5	1		T6	235		T7	950
valid_sources[0x7e]	17804	1		T5	3		T6	265		T7	1060
valid_sources[0x7f]	19153	1		T6	264		T7	2180		T8	180
valid_sources[0x80]	18096	1		T5	2		T6	245		T7	969

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1100447

1

T2

1

T5

26

T6

15490

values[0x0]

all_enables

biggest_size

1650706

1

T1

9

T2

9

T3

7

values[0x1]

all_enables

biggest_size

1651043

1

T1

4

T2

5

T3

9