Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	342312	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4229814	1		T1	14		T2	11		T3	14

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1123066	1		T1	1		T2	1		T3	1
values[0x0]	1618494	1		T1	11		T2	9		T3	10
values[0x1]	1830566	1		T1	8		T2	10		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	152209	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4419917	1		T1	15		T2	14		T3	15

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	18938	1		T2	1		T11	355		T16	915
valid_sources[0x01]	17716	1		T11	349		T12	220		T16	1243
valid_sources[0x02]	18389	1		T4	3		T8	1		T11	380
valid_sources[0x03]	17018	1		T11	372		T16	781		T23	219
valid_sources[0x04]	17863	1		T3	20		T11	350		T12	450
valid_sources[0x05]	17530	1		T11	345		T12	134		T16	645
valid_sources[0x06]	18028	1		T11	338		T14	5		T16	368
valid_sources[0x07]	17598	1		T11	366		T16	1019		T23	167
valid_sources[0x08]	17614	1		T5	1		T11	383		T12	98
valid_sources[0x09]	18852	1		T8	1		T11	344		T12	175
valid_sources[0x0a]	19028	1		T11	363		T12	85		T16	1482
valid_sources[0x0b]	16618	1		T7	1		T11	343		T12	273
valid_sources[0x0c]	17065	1		T11	344		T12	115		T16	700
valid_sources[0x0d]	18214	1		T11	313		T12	367		T16	1164
valid_sources[0x0e]	17734	1		T11	340		T12	284		T16	790
valid_sources[0x0f]	16724	1		T11	382		T12	160		T16	655
valid_sources[0x10]	17191	1		T11	373		T16	1054		T23	167
valid_sources[0x11]	19076	1		T11	369		T12	160		T16	1067
valid_sources[0x12]	17799	1		T11	377		T12	28		T16	511
valid_sources[0x13]	18498	1		T11	361		T12	101		T16	1267
valid_sources[0x14]	17604	1		T5	1		T11	333		T12	44
valid_sources[0x15]	19838	1		T5	1		T11	355		T12	241
valid_sources[0x16]	17166	1		T11	332		T12	467		T14	3
valid_sources[0x17]	18869	1		T11	323		T12	3		T16	949
valid_sources[0x18]	16751	1		T11	344		T12	160		T16	1364
valid_sources[0x19]	17552	1		T7	1		T11	391		T12	282
valid_sources[0x1a]	16318	1		T11	365		T12	165		T16	375
valid_sources[0x1b]	18332	1		T7	1		T11	335		T12	244
valid_sources[0x1c]	16251	1		T11	369		T12	75		T16	373
valid_sources[0x1d]	17293	1		T11	365		T16	1190		T23	187
valid_sources[0x1e]	16623	1		T11	370		T12	10		T16	432
valid_sources[0x1f]	17667	1		T11	366		T12	117		T16	824
valid_sources[0x20]	17406	1		T11	353		T12	86		T16	920
valid_sources[0x21]	17360	1		T11	358		T12	345		T16	913
valid_sources[0x22]	17884	1		T11	339		T16	1400		T23	172
valid_sources[0x23]	17852	1		T11	349		T12	4		T16	945
valid_sources[0x24]	16482	1		T11	344		T12	110		T16	1275
valid_sources[0x25]	18096	1		T11	345		T12	3		T16	903
valid_sources[0x26]	18161	1		T11	413		T12	172		T16	1418
valid_sources[0x27]	17620	1		T11	369		T12	102		T16	796
valid_sources[0x28]	17552	1		T7	1		T11	352		T12	119
valid_sources[0x29]	17326	1		T11	345		T12	150		T16	217
valid_sources[0x2a]	18573	1		T5	1		T11	355		T12	378
valid_sources[0x2b]	18429	1		T11	344		T12	198		T16	1129
valid_sources[0x2c]	17300	1		T11	358		T12	424		T16	830
valid_sources[0x2d]	16795	1		T11	376		T12	15		T16	856
valid_sources[0x2e]	17292	1		T11	380		T12	1		T16	891
valid_sources[0x2f]	16709	1		T11	374		T12	499		T16	775
valid_sources[0x30]	18746	1		T11	356		T16	722		T23	235
valid_sources[0x31]	18917	1		T11	360		T12	352		T16	1569
valid_sources[0x32]	19238	1		T11	382		T12	296		T15	1
valid_sources[0x33]	18129	1		T11	358		T12	399		T16	1653
valid_sources[0x34]	18611	1		T11	373		T12	112		T16	528
valid_sources[0x35]	17396	1		T11	332		T12	195		T16	807
valid_sources[0x36]	18399	1		T11	347		T12	182		T16	810
valid_sources[0x37]	17170	1		T11	335		T12	129		T16	536
valid_sources[0x38]	17441	1		T11	331		T12	100		T16	902
valid_sources[0x39]	18202	1		T8	1		T11	367		T12	201
valid_sources[0x3a]	18400	1		T11	376		T12	4		T16	2509
valid_sources[0x3b]	19182	1		T5	1		T11	346		T12	377
valid_sources[0x3c]	17891	1		T11	391		T12	135		T15	3
valid_sources[0x3d]	17764	1		T4	2		T11	385		T12	191
valid_sources[0x3e]	16651	1		T5	1		T11	331		T12	433
valid_sources[0x3f]	18439	1		T11	356		T12	125		T16	963
valid_sources[0x40]	17512	1		T7	1		T11	324		T16	1076
valid_sources[0x41]	17639	1		T11	311		T12	661		T16	790
valid_sources[0x42]	17112	1		T11	398		T12	481		T16	525
valid_sources[0x43]	16947	1		T11	349		T16	813		T23	200
valid_sources[0x44]	17682	1		T5	1		T11	367		T12	80
valid_sources[0x45]	18115	1		T10	20		T11	350		T12	174
valid_sources[0x46]	17439	1		T11	368		T12	193		T16	716
valid_sources[0x47]	16277	1		T11	352		T12	4		T16	450
valid_sources[0x48]	16074	1		T11	370		T12	1		T16	826
valid_sources[0x49]	17094	1		T4	1		T7	1		T8	1
valid_sources[0x4a]	16802	1		T2	1		T11	375		T12	276
valid_sources[0x4b]	17705	1		T11	337		T12	31		T16	590
valid_sources[0x4c]	18939	1		T11	372		T12	536		T16	832
valid_sources[0x4d]	17647	1		T2	1		T11	349		T16	1178
valid_sources[0x4e]	16071	1		T8	1		T11	353		T12	97
valid_sources[0x4f]	16997	1		T5	1		T11	344		T12	2
valid_sources[0x50]	18133	1		T11	381		T12	404		T16	546
valid_sources[0x51]	17544	1		T11	371		T12	100		T16	741
valid_sources[0x52]	16281	1		T11	357		T12	84		T16	582
valid_sources[0x53]	18075	1		T11	413		T12	129		T16	370
valid_sources[0x54]	17643	1		T11	350		T12	2		T16	838
valid_sources[0x55]	17370	1		T5	1		T11	339		T12	2
valid_sources[0x56]	17104	1		T11	352		T12	279		T16	942
valid_sources[0x57]	20618	1		T11	338		T12	250		T16	1287
valid_sources[0x58]	18869	1		T11	367		T12	64		T16	1446
valid_sources[0x59]	16179	1		T11	337		T12	7		T16	797
valid_sources[0x5a]	16989	1		T8	1		T11	373		T12	171
valid_sources[0x5b]	18084	1		T11	355		T12	123		T16	433
valid_sources[0x5c]	17344	1		T11	368		T12	3		T16	1210
valid_sources[0x5d]	17053	1		T11	344		T12	2		T16	1027
valid_sources[0x5e]	16708	1		T11	398		T12	12		T16	380
valid_sources[0x5f]	18150	1		T11	395		T12	1		T45	20
valid_sources[0x60]	18165	1		T11	330		T12	3		T16	940
valid_sources[0x61]	19580	1		T11	390		T12	123		T16	1027
valid_sources[0x62]	17830	1		T2	1		T11	370		T16	832
valid_sources[0x63]	16149	1		T5	1		T11	371		T12	188
valid_sources[0x64]	17419	1		T2	1		T7	1		T11	345
valid_sources[0x65]	18239	1		T11	407		T12	14		T16	570
valid_sources[0x66]	18425	1		T2	1		T8	1		T11	344
valid_sources[0x67]	18871	1		T5	1		T11	319		T12	2
valid_sources[0x68]	17762	1		T11	358		T12	200		T16	762
valid_sources[0x69]	17746	1		T11	347		T12	508		T16	386
valid_sources[0x6a]	17511	1		T11	368		T12	5		T16	556
valid_sources[0x6b]	17708	1		T11	314		T12	118		T16	1157
valid_sources[0x6c]	17540	1		T11	376		T16	128		T23	217
valid_sources[0x6d]	18186	1		T11	381		T16	1498		T23	199
valid_sources[0x6e]	18342	1		T2	1		T11	365		T12	241
valid_sources[0x6f]	18995	1		T11	348		T12	249		T16	1184
valid_sources[0x70]	18320	1		T11	369		T12	145		T16	642
valid_sources[0x71]	18108	1		T11	345		T12	169		T16	1331
valid_sources[0x72]	17816	1		T11	352		T12	165		T16	691
valid_sources[0x73]	16453	1		T7	2		T11	372		T12	84
valid_sources[0x74]	17497	1		T11	345		T12	136		T14	1
valid_sources[0x75]	18466	1		T8	1		T11	375		T16	1266
valid_sources[0x76]	18303	1		T2	2		T11	326		T12	4
valid_sources[0x77]	18113	1		T8	1		T11	359		T12	278
valid_sources[0x78]	16991	1		T11	336		T16	826		T23	196
valid_sources[0x79]	19412	1		T11	362		T12	314		T16	1657
valid_sources[0x7a]	17842	1		T11	334		T16	724		T23	155
valid_sources[0x7b]	18222	1		T11	353		T12	226		T16	1055
valid_sources[0x7c]	19357	1		T11	369		T12	327		T15	1
valid_sources[0x7d]	18550	1		T11	345		T12	27		T16	1628
valid_sources[0x7e]	17813	1		T7	1		T11	385		T12	412
valid_sources[0x7f]	19549	1		T11	311		T12	315		T16	1456
valid_sources[0x80]	18479	1		T11	352		T12	166		T16	984

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1053681

1

T1

1

T4

1

T5

1

values[0x0]

all_enables

biggest_size

1589419

1

T1

8

T2

8

T3

7

values[0x1]

all_enables

biggest_size

1586714

1

T1

5

T2

3

T3

7