Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	399466	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4897580	1		T1	172628		T2	14		T3	17

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1302184	1		T1	45852		T2	1		T3	1
values[0x0]	1870034	1		T1	65676		T2	10		T3	12
values[0x1]	2124828	1		T1	75196		T2	9		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	176604	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	5120442	1		T1	180662		T2	14		T3	18

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	20214	1		T1	716		T7	1143		T8	5
valid_sources[0x01]	20240	1		T1	736		T4	1		T7	1169
valid_sources[0x02]	20724	1		T1	618		T7	1211		T9	796
valid_sources[0x03]	21429	1		T1	782		T7	1183		T9	2092
valid_sources[0x04]	20632	1		T1	780		T7	1203		T9	1222
valid_sources[0x05]	20847	1		T1	742		T2	1		T7	1193
valid_sources[0x06]	19976	1		T1	654		T7	1192		T9	877
valid_sources[0x07]	20678	1		T1	720		T7	1173		T9	1384
valid_sources[0x08]	20558	1		T1	753		T7	1156		T9	1146
valid_sources[0x09]	20592	1		T1	768		T7	1104		T9	1107
valid_sources[0x0a]	20444	1		T1	722		T2	2		T7	1147
valid_sources[0x0b]	20539	1		T1	737		T7	1185		T9	1172
valid_sources[0x0c]	20782	1		T1	674		T3	1		T7	1147
valid_sources[0x0d]	21434	1		T1	625		T7	1193		T9	1777
valid_sources[0x0e]	19932	1		T1	713		T7	1220		T9	472
valid_sources[0x0f]	21929	1		T1	773		T7	1160		T9	1447
valid_sources[0x10]	21525	1		T1	748		T7	1153		T9	1209
valid_sources[0x11]	19590	1		T1	792		T7	1182		T9	882
valid_sources[0x12]	19948	1		T1	694		T7	1176		T9	1406
valid_sources[0x13]	20942	1		T1	710		T7	1207		T9	957
valid_sources[0x14]	19808	1		T1	682		T7	1240		T9	643
valid_sources[0x15]	20486	1		T1	660		T7	1069		T9	1350
valid_sources[0x16]	19919	1		T1	691		T7	1155		T9	1258
valid_sources[0x17]	20053	1		T1	665		T7	1114		T9	802
valid_sources[0x18]	20399	1		T1	720		T3	1		T7	1145
valid_sources[0x19]	21676	1		T1	747		T7	1236		T9	1624
valid_sources[0x1a]	20163	1		T1	697		T7	1205		T9	1601
valid_sources[0x1b]	21190	1		T1	718		T7	1237		T9	963
valid_sources[0x1c]	19776	1		T1	688		T7	1173		T9	1427
valid_sources[0x1d]	20353	1		T1	700		T5	1		T7	1207
valid_sources[0x1e]	21411	1		T1	690		T3	1		T7	1158
valid_sources[0x1f]	19587	1		T1	672		T7	1141		T9	637
valid_sources[0x20]	20144	1		T1	765		T7	1185		T9	1192
valid_sources[0x21]	20233	1		T1	855		T7	1246		T9	1019
valid_sources[0x22]	22009	1		T1	672		T7	1198		T9	1813
valid_sources[0x23]	22918	1		T1	758		T7	1170		T9	1590
valid_sources[0x24]	21163	1		T1	726		T4	4		T7	1153
valid_sources[0x25]	20626	1		T1	752		T7	1126		T9	1027
valid_sources[0x26]	20056	1		T1	761		T7	1207		T9	1557
valid_sources[0x27]	19386	1		T1	678		T7	1194		T9	822
valid_sources[0x28]	23086	1		T1	706		T6	1		T7	1169
valid_sources[0x29]	19300	1		T1	634		T2	1		T7	1194
valid_sources[0x2a]	21285	1		T1	771		T7	1126		T9	1592
valid_sources[0x2b]	20872	1		T1	745		T3	1		T7	1190
valid_sources[0x2c]	19848	1		T1	830		T7	1160		T9	1182
valid_sources[0x2d]	21528	1		T1	728		T4	3		T7	1200
valid_sources[0x2e]	20412	1		T1	817		T7	1162		T9	919
valid_sources[0x2f]	20782	1		T1	679		T7	1205		T9	1489
valid_sources[0x30]	20689	1		T1	670		T7	1165		T9	1225
valid_sources[0x31]	21235	1		T1	727		T7	1223		T9	1146
valid_sources[0x32]	21049	1		T1	743		T6	3		T7	1240
valid_sources[0x33]	20479	1		T1	705		T6	4		T7	1189
valid_sources[0x34]	20656	1		T1	714		T7	1140		T9	1426
valid_sources[0x35]	21167	1		T1	784		T7	1179		T9	1520
valid_sources[0x36]	20478	1		T1	808		T7	1163		T9	1357
valid_sources[0x37]	21443	1		T1	748		T7	1212		T9	1247
valid_sources[0x38]	19914	1		T1	772		T7	1173		T9	762
valid_sources[0x39]	20919	1		T1	806		T7	1176		T9	1358
valid_sources[0x3a]	20444	1		T1	712		T7	1194		T9	910
valid_sources[0x3b]	20393	1		T1	758		T7	1219		T9	769
valid_sources[0x3c]	20292	1		T1	796		T2	2		T5	1
valid_sources[0x3d]	20393	1		T1	725		T7	1233		T9	1639
valid_sources[0x3e]	19362	1		T1	791		T7	1203		T9	890
valid_sources[0x3f]	20138	1		T1	765		T7	1098		T9	1442
valid_sources[0x40]	20804	1		T1	661		T7	1184		T9	1164
valid_sources[0x41]	21505	1		T1	781		T7	1218		T9	921
valid_sources[0x42]	21314	1		T1	654		T7	1197		T9	1037
valid_sources[0x43]	20301	1		T1	741		T3	1		T7	1084
valid_sources[0x44]	20070	1		T1	711		T7	1227		T9	1124
valid_sources[0x45]	19243	1		T1	650		T3	1		T7	1173
valid_sources[0x46]	20420	1		T1	687		T5	7		T7	1164
valid_sources[0x47]	19878	1		T1	776		T7	1173		T9	997
valid_sources[0x48]	21374	1		T1	701		T7	1137		T9	663
valid_sources[0x49]	18589	1		T1	680		T7	1194		T9	834
valid_sources[0x4a]	20721	1		T1	703		T6	1		T7	1150
valid_sources[0x4b]	21333	1		T1	780		T7	1217		T9	725
valid_sources[0x4c]	20941	1		T1	761		T7	1185		T9	1082
valid_sources[0x4d]	22123	1		T1	766		T7	1192		T9	977
valid_sources[0x4e]	21619	1		T1	670		T7	1158		T9	805
valid_sources[0x4f]	20176	1		T1	663		T7	1246		T9	1385
valid_sources[0x50]	20841	1		T1	619		T7	1170		T9	1301
valid_sources[0x51]	20648	1		T1	715		T7	1294		T9	813
valid_sources[0x52]	20034	1		T1	739		T6	1		T7	1218
valid_sources[0x53]	20582	1		T1	723		T7	1167		T9	679
valid_sources[0x54]	21204	1		T1	706		T7	1232		T9	961
valid_sources[0x55]	21271	1		T1	848		T7	1201		T9	1557
valid_sources[0x56]	21459	1		T1	708		T7	1211		T9	1445
valid_sources[0x57]	20481	1		T1	700		T7	1168		T9	911
valid_sources[0x58]	19668	1		T1	675		T7	1224		T9	1303
valid_sources[0x59]	21305	1		T1	708		T2	1		T7	1203
valid_sources[0x5a]	20687	1		T1	747		T2	2		T3	1
valid_sources[0x5b]	20060	1		T1	747		T7	1234		T9	880
valid_sources[0x5c]	20210	1		T1	805		T7	1179		T9	1033
valid_sources[0x5d]	20185	1		T1	721		T7	1141		T9	1302
valid_sources[0x5e]	21064	1		T1	647		T2	2		T7	1127
valid_sources[0x5f]	22409	1		T1	835		T7	1205		T9	601
valid_sources[0x60]	21332	1		T1	772		T7	1166		T9	1187
valid_sources[0x61]	22293	1		T1	672		T7	1157		T9	1084
valid_sources[0x62]	20877	1		T1	718		T7	1157		T9	923
valid_sources[0x63]	18943	1		T1	701		T7	1157		T9	504
valid_sources[0x64]	20049	1		T1	744		T7	1222		T9	958
valid_sources[0x65]	21081	1		T1	763		T7	1151		T9	1163
valid_sources[0x66]	21408	1		T1	714		T7	1170		T9	1678
valid_sources[0x67]	20742	1		T1	770		T7	1135		T8	17
valid_sources[0x68]	20325	1		T1	680		T7	1152		T9	1132
valid_sources[0x69]	21384	1		T1	732		T7	1194		T9	1047
valid_sources[0x6a]	20445	1		T1	770		T7	1138		T9	602
valid_sources[0x6b]	20369	1		T1	612		T7	1248		T9	1491
valid_sources[0x6c]	20857	1		T1	683		T7	1191		T9	1033
valid_sources[0x6d]	20702	1		T1	733		T7	1175		T9	1651
valid_sources[0x6e]	21405	1		T1	741		T7	1210		T9	986
valid_sources[0x6f]	21664	1		T1	764		T7	1159		T9	1025
valid_sources[0x70]	20139	1		T1	692		T7	1148		T9	1041
valid_sources[0x71]	20861	1		T1	700		T7	1155		T9	1847
valid_sources[0x72]	20546	1		T1	708		T7	1172		T9	1246
valid_sources[0x73]	21820	1		T1	664		T7	1201		T9	1026
valid_sources[0x74]	22788	1		T1	858		T7	1198		T9	1069
valid_sources[0x75]	20669	1		T1	682		T7	1136		T9	543
valid_sources[0x76]	21221	1		T1	669		T7	1148		T9	1031
valid_sources[0x77]	19356	1		T1	700		T7	1168		T9	386
valid_sources[0x78]	20256	1		T1	728		T3	2		T7	1117
valid_sources[0x79]	20062	1		T1	774		T7	1144		T9	1225
valid_sources[0x7a]	20271	1		T1	685		T7	1189		T9	641
valid_sources[0x7b]	20295	1		T1	784		T7	1197		T9	641
valid_sources[0x7c]	20173	1		T1	785		T7	1102		T9	862
valid_sources[0x7d]	19360	1		T1	746		T7	1161		T9	1452
valid_sources[0x7e]	20000	1		T1	758		T7	1167		T9	436
valid_sources[0x7f]	19629	1		T1	715		T7	1197		T9	1283
valid_sources[0x80]	19742	1		T1	696		T7	1153		T9	877

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1221853

1

T1

43052

T2

1

T3

1

values[0x0]

all_enables

biggest_size

1837213

1

T1

64564

T2

6

T3

10

values[0x1]

all_enables

biggest_size

1838514

1

T1

65012

T2

7

T3

6