Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	376653	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4646924	1		T1	16		T2	16282		T3	15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1233958	1		T1	1		T2	4205		T3	1
values[0x0]	1774512	1		T1	11		T2	6423		T3	9
values[0x1]	2015107	1		T1	10		T2	7245		T3	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	166502	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4857075	1		T1	17		T2	17085		T3	16

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	20703	1		T2	83		T11	1		T12	1
valid_sources[0x01]	21230	1		T2	74		T6	1		T15	190
valid_sources[0x02]	19825	1		T2	77		T8	2		T15	4
valid_sources[0x03]	18754	1		T2	86		T15	62		T204	1
valid_sources[0x04]	21040	1		T2	83		T15	328		T19	402
valid_sources[0x05]	17967	1		T2	66		T12	1		T15	18
valid_sources[0x06]	20184	1		T2	68		T5	1		T15	115
valid_sources[0x07]	20082	1		T2	67		T15	16		T19	408
valid_sources[0x08]	18585	1		T2	73		T15	15		T19	383
valid_sources[0x09]	18974	1		T2	70		T15	168		T19	382
valid_sources[0x0a]	20524	1		T2	69		T3	1		T5	2
valid_sources[0x0b]	19694	1		T1	1		T2	73		T15	479
valid_sources[0x0c]	18918	1		T2	67		T9	1		T15	5
valid_sources[0x0d]	20036	1		T2	67		T9	1		T15	232
valid_sources[0x0e]	19942	1		T2	67		T8	1		T11	1
valid_sources[0x0f]	19444	1		T2	67		T15	209		T19	458
valid_sources[0x10]	19734	1		T2	58		T15	13		T19	436
valid_sources[0x11]	19596	1		T2	84		T3	1		T15	359
valid_sources[0x12]	18389	1		T2	65		T15	2		T19	412
valid_sources[0x13]	19190	1		T2	73		T15	19		T198	1
valid_sources[0x14]	20277	1		T2	59		T7	1		T12	1
valid_sources[0x15]	18660	1		T2	75		T9	1		T13	1
valid_sources[0x16]	18742	1		T2	75		T8	1		T15	356
valid_sources[0x17]	19199	1		T2	81		T15	161		T19	391
valid_sources[0x18]	18896	1		T2	70		T15	11		T44	1
valid_sources[0x19]	18854	1		T2	85		T15	126		T19	362
valid_sources[0x1a]	19166	1		T2	66		T6	1		T15	110
valid_sources[0x1b]	20831	1		T2	64		T15	29		T44	1
valid_sources[0x1c]	18766	1		T2	59		T15	311		T204	1
valid_sources[0x1d]	18949	1		T2	53		T15	9		T19	385
valid_sources[0x1e]	19565	1		T2	67		T15	219		T198	1
valid_sources[0x1f]	18570	1		T2	80		T15	230		T19	416
valid_sources[0x20]	20436	1		T2	53		T15	12		T19	328
valid_sources[0x21]	17749	1		T2	84		T15	4		T16	2
valid_sources[0x22]	20428	1		T2	73		T13	1		T15	97
valid_sources[0x23]	19111	1		T2	80		T7	1		T15	63
valid_sources[0x24]	18687	1		T2	86		T15	221		T19	482
valid_sources[0x25]	20787	1		T2	81		T15	13		T19	383
valid_sources[0x26]	19637	1		T2	80		T15	78		T19	419
valid_sources[0x27]	20104	1		T2	48		T15	56		T19	413
valid_sources[0x28]	19184	1		T2	73		T6	2		T12	1
valid_sources[0x29]	19375	1		T2	77		T15	158		T19	443
valid_sources[0x2a]	19571	1		T2	74		T15	118		T16	5
valid_sources[0x2b]	18483	1		T2	79		T15	17		T46	1
valid_sources[0x2c]	19664	1		T1	6		T2	60		T9	1
valid_sources[0x2d]	19942	1		T2	66		T15	1		T19	386
valid_sources[0x2e]	19164	1		T2	77		T13	1		T15	104
valid_sources[0x2f]	20378	1		T2	60		T15	8		T19	400
valid_sources[0x30]	18346	1		T2	70		T15	9		T19	403
valid_sources[0x31]	20935	1		T2	58		T15	193		T44	1
valid_sources[0x32]	20059	1		T2	55		T15	16		T19	397
valid_sources[0x33]	19153	1		T2	81		T15	3		T19	384
valid_sources[0x34]	18271	1		T2	70		T15	229		T19	385
valid_sources[0x35]	19971	1		T2	71		T8	1		T15	205
valid_sources[0x36]	18560	1		T2	81		T15	93		T45	5
valid_sources[0x37]	18801	1		T2	60		T15	73		T19	439
valid_sources[0x38]	19036	1		T2	62		T6	3		T15	125
valid_sources[0x39]	20923	1		T2	68		T9	1		T12	1
valid_sources[0x3a]	19623	1		T2	57		T15	4		T204	1
valid_sources[0x3b]	18846	1		T2	81		T11	1		T14	22
valid_sources[0x3c]	18434	1		T2	59		T13	2		T15	4
valid_sources[0x3d]	18745	1		T2	80		T15	126		T19	417
valid_sources[0x3e]	19676	1		T2	62		T13	1		T15	45
valid_sources[0x3f]	19413	1		T2	60		T15	19		T201	1
valid_sources[0x40]	19366	1		T2	68		T15	1		T19	399
valid_sources[0x41]	19398	1		T2	84		T11	1		T15	6
valid_sources[0x42]	21037	1		T2	88		T15	128		T16	2
valid_sources[0x43]	18932	1		T2	77		T15	1		T19	379
valid_sources[0x44]	20999	1		T2	72		T11	1		T15	86
valid_sources[0x45]	18271	1		T2	64		T15	9		T19	419
valid_sources[0x46]	18881	1		T2	74		T15	3		T19	377
valid_sources[0x47]	18933	1		T2	66		T7	1		T15	325
valid_sources[0x48]	19528	1		T2	75		T15	308		T19	384
valid_sources[0x49]	19748	1		T2	78		T15	175		T44	4
valid_sources[0x4a]	19124	1		T2	67		T5	1		T15	122
valid_sources[0x4b]	21137	1		T2	65		T3	1		T15	9
valid_sources[0x4c]	19428	1		T2	86		T15	7		T19	376
valid_sources[0x4d]	17876	1		T2	64		T10	3		T15	93
valid_sources[0x4e]	19430	1		T2	78		T6	2		T15	7
valid_sources[0x4f]	20197	1		T2	70		T15	5		T204	1
valid_sources[0x50]	20894	1		T2	68		T7	1		T15	463
valid_sources[0x51]	18998	1		T2	81		T87	2		T15	176
valid_sources[0x52]	19425	1		T2	68		T87	1		T15	130
valid_sources[0x53]	19372	1		T2	95		T8	1		T13	2
valid_sources[0x54]	18551	1		T2	57		T15	5		T201	1
valid_sources[0x55]	19175	1		T2	64		T7	1		T8	1
valid_sources[0x56]	18396	1		T2	72		T15	87		T19	360
valid_sources[0x57]	19571	1		T2	68		T15	12		T19	415
valid_sources[0x58]	19571	1		T2	76		T15	309		T19	394
valid_sources[0x59]	20924	1		T2	76		T15	11		T19	350
valid_sources[0x5a]	18827	1		T2	86		T5	1		T87	2
valid_sources[0x5b]	18970	1		T2	65		T15	11		T198	2
valid_sources[0x5c]	17703	1		T2	87		T8	1		T19	389
valid_sources[0x5d]	20265	1		T2	72		T15	57		T19	447
valid_sources[0x5e]	18827	1		T2	64		T9	1		T15	7
valid_sources[0x5f]	19537	1		T2	54		T3	1		T11	1
valid_sources[0x60]	19779	1		T2	69		T5	1		T15	270
valid_sources[0x61]	18680	1		T2	81		T3	1		T7	1
valid_sources[0x62]	19838	1		T2	64		T15	8		T19	469
valid_sources[0x63]	19930	1		T2	70		T15	82		T201	2
valid_sources[0x64]	19455	1		T2	69		T15	394		T201	2
valid_sources[0x65]	19880	1		T2	60		T15	7		T19	417
valid_sources[0x66]	19717	1		T2	71		T87	1		T15	204
valid_sources[0x67]	21509	1		T2	60		T13	1		T15	109
valid_sources[0x68]	18195	1		T2	80		T15	8		T19	448
valid_sources[0x69]	18764	1		T2	61		T11	1		T15	74
valid_sources[0x6a]	19790	1		T2	73		T7	1		T15	89
valid_sources[0x6b]	21317	1		T2	75		T15	226		T19	358
valid_sources[0x6c]	20441	1		T2	78		T15	4		T46	1
valid_sources[0x6d]	18473	1		T2	69		T7	1		T15	10
valid_sources[0x6e]	21315	1		T2	60		T3	1		T15	81
valid_sources[0x6f]	19733	1		T2	76		T7	1		T87	1
valid_sources[0x70]	19151	1		T2	82		T15	41		T19	402
valid_sources[0x71]	18314	1		T2	69		T15	71		T19	347
valid_sources[0x72]	19546	1		T2	58		T15	31		T201	2
valid_sources[0x73]	20236	1		T2	61		T15	73		T19	357
valid_sources[0x74]	19820	1		T2	67		T11	1		T15	7
valid_sources[0x75]	18918	1		T2	61		T9	1		T15	63
valid_sources[0x76]	19238	1		T2	72		T15	226		T19	431
valid_sources[0x77]	18034	1		T2	69		T6	2		T15	12
valid_sources[0x78]	20788	1		T2	77		T15	8		T19	433
valid_sources[0x79]	20217	1		T2	80		T11	1		T15	2
valid_sources[0x7a]	19174	1		T2	88		T13	1		T87	1
valid_sources[0x7b]	17875	1		T2	60		T15	3		T19	444
valid_sources[0x7c]	19224	1		T2	64		T15	2		T19	404
valid_sources[0x7d]	20870	1		T2	56		T3	2		T15	199
valid_sources[0x7e]	20122	1		T2	82		T8	1		T15	367
valid_sources[0x7f]	18370	1		T2	67		T8	1		T15	201
valid_sources[0x80]	19418	1		T2	63		T11	1		T15	95

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1158077

1

T1

1

T2

3909

T3

1

values[0x0]

all_enables

biggest_size

1743945

1

T1

9

T2

6230

T3

7

values[0x1]

all_enables

biggest_size

1744902

1

T1

6

T2

6143

T3

7