Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	361873	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4415441	1		T1	115285		T2	218		T3	72614

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1173498	1		T1	30424		T2	18		T3	19398
values[0x0]	1688379	1		T1	43975		T2	134		T3	27655
values[0x1]	1915437	1		T1	49886		T2	141		T3	31851

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	162127	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4615187	1		T1	120291		T2	232		T3	76177

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	18612	1		T1	430		T3	282		T9	1
valid_sources[0x01]	19397	1		T1	638		T3	452		T13	636
valid_sources[0x02]	18688	1		T1	551		T2	1		T3	184
valid_sources[0x03]	19857	1		T1	551		T2	1		T3	112
valid_sources[0x04]	19397	1		T1	451		T3	5		T9	1
valid_sources[0x05]	18422	1		T1	461		T13	617		T14	223
valid_sources[0x06]	18168	1		T1	402		T3	132		T13	579
valid_sources[0x07]	18934	1		T1	480		T3	66		T11	2
valid_sources[0x08]	17982	1		T1	464		T2	20		T3	145
valid_sources[0x09]	18120	1		T1	451		T2	2		T3	2
valid_sources[0x0a]	18664	1		T1	408		T3	1068		T13	611
valid_sources[0x0b]	17436	1		T1	383		T2	1		T3	4
valid_sources[0x0c]	20033	1		T1	435		T2	1		T3	731
valid_sources[0x0d]	18762	1		T1	716		T3	763		T13	613
valid_sources[0x0e]	18077	1		T1	226		T3	300		T13	550
valid_sources[0x0f]	17675	1		T1	470		T3	12		T9	5
valid_sources[0x10]	18150	1		T1	425		T3	334		T6	1
valid_sources[0x11]	19598	1		T1	624		T3	584		T8	2
valid_sources[0x12]	18955	1		T1	277		T3	207		T13	606
valid_sources[0x13]	19094	1		T1	330		T2	1		T3	656
valid_sources[0x14]	18095	1		T1	407		T3	2		T13	591
valid_sources[0x15]	18320	1		T1	645		T2	4		T3	3
valid_sources[0x16]	18541	1		T1	634		T3	4		T13	638
valid_sources[0x17]	18231	1		T1	713		T3	39		T13	630
valid_sources[0x18]	19563	1		T1	841		T3	639		T13	577
valid_sources[0x19]	18928	1		T1	442		T3	430		T6	1
valid_sources[0x1a]	18369	1		T1	531		T3	70		T13	636
valid_sources[0x1b]	18406	1		T1	408		T3	314		T13	606
valid_sources[0x1c]	17774	1		T1	173		T3	3		T13	587
valid_sources[0x1d]	18809	1		T1	702		T3	564		T13	604
valid_sources[0x1e]	18140	1		T1	611		T3	323		T13	606
valid_sources[0x1f]	18486	1		T1	496		T3	452		T13	658
valid_sources[0x20]	18813	1		T1	506		T3	333		T13	630
valid_sources[0x21]	17142	1		T1	539		T3	327		T13	630
valid_sources[0x22]	19282	1		T1	505		T3	968		T13	615
valid_sources[0x23]	18545	1		T1	390		T3	112		T4	3
valid_sources[0x24]	19171	1		T1	367		T3	253		T13	618
valid_sources[0x25]	18524	1		T1	487		T2	2		T3	452
valid_sources[0x26]	18489	1		T1	539		T2	5		T3	213
valid_sources[0x27]	19106	1		T1	637		T3	183		T13	613
valid_sources[0x28]	17854	1		T1	540		T3	189		T13	645
valid_sources[0x29]	18085	1		T1	601		T3	344		T13	561
valid_sources[0x2a]	18873	1		T1	539		T3	327		T13	591
valid_sources[0x2b]	18967	1		T1	341		T2	1		T3	377
valid_sources[0x2c]	18461	1		T1	738		T3	68		T4	1
valid_sources[0x2d]	17874	1		T1	419		T3	385		T13	573
valid_sources[0x2e]	19845	1		T1	621		T3	459		T13	628
valid_sources[0x2f]	18755	1		T1	483		T2	2		T3	117
valid_sources[0x30]	17953	1		T1	399		T13	618		T14	260
valid_sources[0x31]	18449	1		T1	369		T2	1		T3	62
valid_sources[0x32]	17825	1		T1	540		T2	5		T3	100
valid_sources[0x33]	18696	1		T1	554		T3	393		T13	587
valid_sources[0x34]	19588	1		T1	443		T2	1		T3	750
valid_sources[0x35]	19175	1		T1	459		T2	1		T3	200
valid_sources[0x36]	19847	1		T1	518		T3	357		T13	581
valid_sources[0x37]	17919	1		T1	562		T13	659		T14	215
valid_sources[0x38]	18962	1		T1	684		T3	566		T13	615
valid_sources[0x39]	17846	1		T1	582		T2	1		T3	66
valid_sources[0x3a]	18699	1		T1	671		T3	361		T13	588
valid_sources[0x3b]	18586	1		T1	287		T3	6		T13	600
valid_sources[0x3c]	18985	1		T1	373		T2	3		T3	262
valid_sources[0x3d]	18193	1		T1	460		T3	402		T13	578
valid_sources[0x3e]	19210	1		T1	559		T3	423		T13	570
valid_sources[0x3f]	17985	1		T1	351		T3	59		T10	19
valid_sources[0x40]	17941	1		T1	279		T3	378		T13	608
valid_sources[0x41]	18358	1		T1	476		T2	1		T3	512
valid_sources[0x42]	18429	1		T1	603		T3	129		T13	591
valid_sources[0x43]	18772	1		T1	453		T2	4		T3	417
valid_sources[0x44]	19360	1		T1	589		T3	603		T13	563
valid_sources[0x45]	18929	1		T1	554		T3	362		T13	631
valid_sources[0x46]	18795	1		T1	388		T3	553		T13	637
valid_sources[0x47]	18187	1		T1	508		T2	3		T3	17
valid_sources[0x48]	18265	1		T1	561		T2	3		T3	438
valid_sources[0x49]	17693	1		T1	482		T3	144		T13	613
valid_sources[0x4a]	19536	1		T1	460		T3	127		T13	584
valid_sources[0x4b]	18615	1		T1	447		T2	2		T3	207
valid_sources[0x4c]	18033	1		T1	565		T3	97		T13	625
valid_sources[0x4d]	18736	1		T1	348		T3	522		T13	618
valid_sources[0x4e]	18635	1		T1	458		T2	4		T3	236
valid_sources[0x4f]	18801	1		T1	448		T2	2		T3	308
valid_sources[0x50]	18998	1		T1	483		T3	311		T13	593
valid_sources[0x51]	18848	1		T1	585		T2	3		T3	1
valid_sources[0x52]	18055	1		T1	392		T2	2		T3	493
valid_sources[0x53]	18863	1		T1	599		T3	92		T13	617
valid_sources[0x54]	17773	1		T1	663		T2	1		T3	118
valid_sources[0x55]	18617	1		T1	314		T2	4		T3	541
valid_sources[0x56]	19053	1		T1	441		T3	613		T13	584
valid_sources[0x57]	18909	1		T1	617		T3	526		T6	1
valid_sources[0x58]	17700	1		T1	728		T2	1		T3	337
valid_sources[0x59]	18066	1		T1	626		T3	7		T13	643
valid_sources[0x5a]	19083	1		T1	558		T3	350		T8	3
valid_sources[0x5b]	19431	1		T1	527		T3	807		T13	584
valid_sources[0x5c]	19509	1		T1	359		T3	321		T13	599
valid_sources[0x5d]	18928	1		T1	506		T2	4		T3	393
valid_sources[0x5e]	18923	1		T1	384		T3	147		T13	652
valid_sources[0x5f]	19388	1		T1	359		T2	1		T3	747
valid_sources[0x60]	18152	1		T1	450		T3	381		T13	572
valid_sources[0x61]	18495	1		T1	477		T3	227		T13	568
valid_sources[0x62]	19177	1		T1	376		T2	2		T3	280
valid_sources[0x63]	19365	1		T1	457		T3	109		T6	1
valid_sources[0x64]	18179	1		T1	340		T3	521		T9	1
valid_sources[0x65]	18766	1		T1	453		T3	360		T7	353
valid_sources[0x66]	18716	1		T1	549		T2	2		T3	14
valid_sources[0x67]	18228	1		T1	364		T2	5		T3	213
valid_sources[0x68]	18883	1		T1	357		T2	1		T3	103
valid_sources[0x69]	18734	1		T1	651		T3	762		T13	627
valid_sources[0x6a]	19787	1		T1	479		T3	1458		T13	551
valid_sources[0x6b]	18723	1		T1	497		T3	320		T13	618
valid_sources[0x6c]	19267	1		T1	402		T2	2		T3	736
valid_sources[0x6d]	19109	1		T1	450		T3	267		T13	606
valid_sources[0x6e]	18247	1		T1	476		T3	231		T13	617
valid_sources[0x6f]	18413	1		T1	511		T3	557		T13	596
valid_sources[0x70]	19121	1		T1	514		T3	548		T6	1
valid_sources[0x71]	18481	1		T1	374		T2	4		T3	185
valid_sources[0x72]	18911	1		T1	349		T2	1		T3	175
valid_sources[0x73]	19173	1		T1	494		T2	1		T3	408
valid_sources[0x74]	19010	1		T1	454		T3	434		T13	634
valid_sources[0x75]	18743	1		T1	396		T3	201		T13	628
valid_sources[0x76]	18365	1		T1	348		T3	444		T13	622
valid_sources[0x77]	19112	1		T1	556		T2	1		T3	187
valid_sources[0x78]	18765	1		T1	417		T2	7		T3	18
valid_sources[0x79]	19288	1		T1	372		T2	1		T3	89
valid_sources[0x7a]	18682	1		T1	420		T3	93		T13	588
valid_sources[0x7b]	19107	1		T1	361		T3	2		T4	2
valid_sources[0x7c]	19654	1		T1	788		T3	733		T13	607
valid_sources[0x7d]	17741	1		T1	415		T2	2		T3	17
valid_sources[0x7e]	19212	1		T1	581		T2	2		T3	340
valid_sources[0x7f]	18203	1		T1	338		T13	619		T14	250
valid_sources[0x80]	19456	1		T1	527		T2	2		T3	424

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1100120

1

T1

28750

T2

11

T3

18146

values[0x0]

all_enables

biggest_size

1657257

1

T1

43219

T2

101

T3

27157

values[0x1]

all_enables

biggest_size

1658064

1

T1

43316

T2

106

T3

27311