| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| alert_esc_agent_pkg.m_alert_handshake_complete_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
| alert_esc_agent_pkg.m_alert_handshake_complete_cg_(1) | 100.00 | 1 | 100 | 1 | 64 | 64 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 2 | 0 | 2 | 100.00 |
| Crosses | 1 | 0 | 1 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_handshake_complete | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 | |
| cp_trans_type | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 |
| CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
| alert_handshake_complete | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 2 | 0 | 2 | 100.00 |
| Crosses | 1 | 0 | 1 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_handshake_complete | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 | |
| cp_trans_type | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 |
| CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
| alert_handshake_complete | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 1 | 0 | 1 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| complete | 12775 | 1 | T32 | 4 | T33 | 15 | T34 | 19 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 1 | 0 | 1 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| alert_triggered | 13497 | 1 | T32 | 4 | T33 | 15 | T34 | 19 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins | 1 | 0 | 1 | 100.00 |
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| complete | alert_triggered | 12775 | 1 | T32 | 4 | T33 | 15 | T34 | 19 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 1 | 0 | 1 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| complete | 21191 | 1 | T1 | 38 | T5 | 2 | T2 | 285 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 1 | 0 | 1 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| alert_triggered | 21194 | 1 | T1 | 38 | T5 | 2 | T2 | 285 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins | 1 | 0 | 1 | 100.00 |
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| complete | alert_triggered | 21191 | 1 | T1 | 38 | T5 | 2 | T2 | 285 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |