Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.52 99.15 95.84 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1010
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T798 /workspace/coverage/default/20.clkmgr_alert_test.1274147608 Mar 12 12:47:30 PM PDT 24 Mar 12 12:47:31 PM PDT 24 70726942 ps
T799 /workspace/coverage/default/33.clkmgr_trans.2247035386 Mar 12 12:47:44 PM PDT 24 Mar 12 12:47:46 PM PDT 24 132085305 ps
T800 /workspace/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.1849670407 Mar 12 12:48:30 PM PDT 24 Mar 12 12:48:31 PM PDT 24 22733622 ps
T801 /workspace/coverage/default/5.clkmgr_regwen.507126604 Mar 12 12:46:36 PM PDT 24 Mar 12 12:46:40 PM PDT 24 389273515 ps
T802 /workspace/coverage/default/11.clkmgr_lc_ctrl_intersig_mubi.812099001 Mar 12 12:46:55 PM PDT 24 Mar 12 12:46:56 PM PDT 24 72212798 ps
T803 /workspace/coverage/default/10.clkmgr_lc_ctrl_intersig_mubi.2384769754 Mar 12 12:46:51 PM PDT 24 Mar 12 12:46:52 PM PDT 24 36254355 ps
T804 /workspace/coverage/default/35.clkmgr_smoke.942169903 Mar 12 12:47:59 PM PDT 24 Mar 12 12:48:00 PM PDT 24 27680839 ps
T805 /workspace/coverage/default/14.clkmgr_frequency.2898778637 Mar 12 12:47:00 PM PDT 24 Mar 12 12:47:06 PM PDT 24 918715472 ps
T806 /workspace/coverage/default/33.clkmgr_idle_intersig_mubi.4039812618 Mar 12 12:47:43 PM PDT 24 Mar 12 12:47:44 PM PDT 24 27951878 ps
T807 /workspace/coverage/default/48.clkmgr_div_intersig_mubi.899838730 Mar 12 12:48:33 PM PDT 24 Mar 12 12:48:34 PM PDT 24 101541034 ps
T808 /workspace/coverage/default/4.clkmgr_stress_all.55376489 Mar 12 12:46:38 PM PDT 24 Mar 12 12:46:58 PM PDT 24 3789550525 ps
T809 /workspace/coverage/default/21.clkmgr_frequency_timeout.2102154166 Mar 12 12:47:31 PM PDT 24 Mar 12 12:47:34 PM PDT 24 756620233 ps
T810 /workspace/coverage/default/26.clkmgr_frequency_timeout.1886571408 Mar 12 12:47:27 PM PDT 24 Mar 12 12:47:34 PM PDT 24 858601314 ps
T811 /workspace/coverage/default/28.clkmgr_regwen.2508260502 Mar 12 12:47:42 PM PDT 24 Mar 12 12:47:48 PM PDT 24 1495637146 ps
T812 /workspace/coverage/default/11.clkmgr_extclk.1200725961 Mar 12 12:46:51 PM PDT 24 Mar 12 12:46:52 PM PDT 24 29424054 ps
T813 /workspace/coverage/default/13.clkmgr_lc_clk_byp_req_intersig_mubi.834855068 Mar 12 12:47:05 PM PDT 24 Mar 12 12:47:06 PM PDT 24 42585384 ps
T814 /workspace/coverage/default/17.clkmgr_trans.2983004968 Mar 12 12:47:11 PM PDT 24 Mar 12 12:47:12 PM PDT 24 21552965 ps
T815 /workspace/coverage/default/0.clkmgr_div_intersig_mubi.2051300709 Mar 12 12:46:21 PM PDT 24 Mar 12 12:46:22 PM PDT 24 253485027 ps
T816 /workspace/coverage/default/19.clkmgr_trans.1237482129 Mar 12 12:47:15 PM PDT 24 Mar 12 12:47:16 PM PDT 24 42533105 ps
T817 /workspace/coverage/default/16.clkmgr_frequency_timeout.646176446 Mar 12 12:47:13 PM PDT 24 Mar 12 12:47:16 PM PDT 24 688060359 ps
T818 /workspace/coverage/default/17.clkmgr_alert_test.2025265818 Mar 12 12:47:14 PM PDT 24 Mar 12 12:47:14 PM PDT 24 11821629 ps
T819 /workspace/coverage/default/15.clkmgr_lc_ctrl_intersig_mubi.2418847728 Mar 12 12:47:00 PM PDT 24 Mar 12 12:47:01 PM PDT 24 37312863 ps
T820 /workspace/coverage/default/41.clkmgr_alert_test.4175177004 Mar 12 12:48:23 PM PDT 24 Mar 12 12:48:25 PM PDT 24 20717969 ps
T821 /workspace/coverage/default/15.clkmgr_regwen.2757646166 Mar 12 12:47:03 PM PDT 24 Mar 12 12:47:07 PM PDT 24 706335746 ps
T822 /workspace/coverage/default/31.clkmgr_alert_test.491837027 Mar 12 12:47:52 PM PDT 24 Mar 12 12:47:53 PM PDT 24 55602495 ps
T823 /workspace/coverage/default/6.clkmgr_extclk.4166163314 Mar 12 12:46:36 PM PDT 24 Mar 12 12:46:38 PM PDT 24 60393370 ps
T824 /workspace/coverage/default/48.clkmgr_regwen.1180737484 Mar 12 12:48:31 PM PDT 24 Mar 12 12:48:33 PM PDT 24 365337393 ps
T825 /workspace/coverage/default/41.clkmgr_clk_handshake_intersig_mubi.1800316336 Mar 12 12:48:23 PM PDT 24 Mar 12 12:48:24 PM PDT 24 43623814 ps
T826 /workspace/coverage/default/26.clkmgr_lc_ctrl_intersig_mubi.42135418 Mar 12 12:47:35 PM PDT 24 Mar 12 12:47:36 PM PDT 24 109143462 ps
T827 /workspace/coverage/default/14.clkmgr_smoke.2511273030 Mar 12 12:47:01 PM PDT 24 Mar 12 12:47:03 PM PDT 24 88601369 ps
T828 /workspace/coverage/default/23.clkmgr_smoke.2536775890 Mar 12 12:47:26 PM PDT 24 Mar 12 12:47:27 PM PDT 24 64022976 ps
T829 /workspace/coverage/default/4.clkmgr_trans.2718739218 Mar 12 12:46:36 PM PDT 24 Mar 12 12:46:38 PM PDT 24 24310981 ps
T830 /workspace/coverage/default/31.clkmgr_frequency.551928780 Mar 12 12:47:38 PM PDT 24 Mar 12 12:47:47 PM PDT 24 921448183 ps
T831 /workspace/coverage/default/22.clkmgr_regwen.3600021402 Mar 12 12:47:32 PM PDT 24 Mar 12 12:47:37 PM PDT 24 1122908811 ps
T832 /workspace/coverage/default/18.clkmgr_alert_test.722243455 Mar 12 12:47:23 PM PDT 24 Mar 12 12:47:24 PM PDT 24 18611429 ps
T833 /workspace/coverage/default/42.clkmgr_alert_test.2944218528 Mar 12 12:48:17 PM PDT 24 Mar 12 12:48:18 PM PDT 24 17845496 ps
T834 /workspace/coverage/default/32.clkmgr_frequency_timeout.3409111910 Mar 12 12:47:47 PM PDT 24 Mar 12 12:48:05 PM PDT 24 2298908781 ps
T835 /workspace/coverage/default/7.clkmgr_smoke.2907256100 Mar 12 12:46:37 PM PDT 24 Mar 12 12:46:39 PM PDT 24 73557896 ps
T10 /workspace/coverage/default/19.clkmgr_regwen.2451826944 Mar 12 12:47:17 PM PDT 24 Mar 12 12:47:21 PM PDT 24 688921874 ps
T836 /workspace/coverage/default/42.clkmgr_lc_ctrl_intersig_mubi.1495647938 Mar 12 12:48:22 PM PDT 24 Mar 12 12:48:24 PM PDT 24 46973884 ps
T837 /workspace/coverage/default/46.clkmgr_frequency.37263645 Mar 12 12:48:21 PM PDT 24 Mar 12 12:48:26 PM PDT 24 1320312669 ps
T838 /workspace/coverage/default/45.clkmgr_trans.977858406 Mar 12 12:48:24 PM PDT 24 Mar 12 12:48:26 PM PDT 24 41839723 ps
T839 /workspace/coverage/default/9.clkmgr_clk_status.4131284382 Mar 12 12:46:40 PM PDT 24 Mar 12 12:46:42 PM PDT 24 12244418 ps
T840 /workspace/coverage/default/40.clkmgr_stress_all.1200331231 Mar 12 12:48:09 PM PDT 24 Mar 12 12:48:33 PM PDT 24 5356601882 ps
T841 /workspace/coverage/default/21.clkmgr_smoke.4189751254 Mar 12 12:47:33 PM PDT 24 Mar 12 12:47:34 PM PDT 24 20571051 ps
T842 /workspace/coverage/default/39.clkmgr_clk_handshake_intersig_mubi.4276563480 Mar 12 12:48:25 PM PDT 24 Mar 12 12:48:27 PM PDT 24 26805108 ps
T843 /workspace/coverage/default/16.clkmgr_div_intersig_mubi.3539012689 Mar 12 12:47:11 PM PDT 24 Mar 12 12:47:12 PM PDT 24 17923647 ps
T844 /workspace/coverage/default/26.clkmgr_idle_intersig_mubi.146419110 Mar 12 12:47:33 PM PDT 24 Mar 12 12:47:34 PM PDT 24 53896233 ps
T845 /workspace/coverage/default/23.clkmgr_stress_all_with_rand_reset.2908262041 Mar 12 12:47:25 PM PDT 24 Mar 12 12:58:28 PM PDT 24 95561441715 ps
T846 /workspace/coverage/default/16.clkmgr_idle_intersig_mubi.920696 Mar 12 12:47:14 PM PDT 24 Mar 12 12:47:15 PM PDT 24 108599907 ps
T847 /workspace/coverage/default/12.clkmgr_lc_clk_byp_req_intersig_mubi.1147257939 Mar 12 12:47:00 PM PDT 24 Mar 12 12:47:01 PM PDT 24 44870294 ps
T848 /workspace/coverage/default/15.clkmgr_trans.2660238783 Mar 12 12:47:01 PM PDT 24 Mar 12 12:47:02 PM PDT 24 22087987 ps
T849 /workspace/coverage/default/22.clkmgr_smoke.1138793988 Mar 12 12:47:32 PM PDT 24 Mar 12 12:47:33 PM PDT 24 40977240 ps
T850 /workspace/coverage/default/20.clkmgr_peri.2024994391 Mar 12 12:47:18 PM PDT 24 Mar 12 12:47:19 PM PDT 24 22220777 ps
T851 /workspace/coverage/default/33.clkmgr_div_intersig_mubi.3181443716 Mar 12 12:47:45 PM PDT 24 Mar 12 12:47:46 PM PDT 24 92479519 ps
T51 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.367165842 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:54 PM PDT 24 74445600 ps
T852 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.1823778656 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:52 PM PDT 24 41205422 ps
T91 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.3004424317 Mar 12 01:00:43 PM PDT 24 Mar 12 01:00:46 PM PDT 24 133208369 ps
T96 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.3545809987 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:56 PM PDT 24 26461860 ps
T97 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.701431091 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:52 PM PDT 24 515295236 ps
T52 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.2431983822 Mar 12 01:01:00 PM PDT 24 Mar 12 01:01:03 PM PDT 24 375216867 ps
T853 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.3079798890 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 140182473 ps
T74 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.2495668285 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:53 PM PDT 24 62127742 ps
T854 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.3247136600 Mar 12 01:01:14 PM PDT 24 Mar 12 01:01:15 PM PDT 24 27040256 ps
T75 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.721357030 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:49 PM PDT 24 50279531 ps
T855 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.3885652625 Mar 12 01:00:36 PM PDT 24 Mar 12 01:00:37 PM PDT 24 54216936 ps
T76 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.944168173 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:52 PM PDT 24 61843928 ps
T856 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.2195652419 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:55 PM PDT 24 55745768 ps
T857 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.3509956641 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:50 PM PDT 24 50205441 ps
T77 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.47373933 Mar 12 01:01:04 PM PDT 24 Mar 12 01:01:10 PM PDT 24 24925760 ps
T858 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.1852663008 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 20810907 ps
T859 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.2382772459 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:56 PM PDT 24 23160370 ps
T53 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.148308953 Mar 12 01:00:38 PM PDT 24 Mar 12 01:00:41 PM PDT 24 138189409 ps
T860 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.1615212835 Mar 12 01:01:05 PM PDT 24 Mar 12 01:01:06 PM PDT 24 30930703 ps
T78 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.2559275224 Mar 12 01:01:01 PM PDT 24 Mar 12 01:01:03 PM PDT 24 30620407 ps
T861 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.1176524060 Mar 12 01:00:43 PM PDT 24 Mar 12 01:00:44 PM PDT 24 15812129 ps
T92 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1060834192 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:59 PM PDT 24 56481555 ps
T862 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.4029630313 Mar 12 01:01:08 PM PDT 24 Mar 12 01:01:09 PM PDT 24 97452050 ps
T863 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.597292356 Mar 12 01:01:09 PM PDT 24 Mar 12 01:01:16 PM PDT 24 26536107 ps
T57 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.2102907540 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:55 PM PDT 24 65129727 ps
T864 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.4171022111 Mar 12 01:00:40 PM PDT 24 Mar 12 01:00:41 PM PDT 24 18942122 ps
T865 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.1050928392 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:57 PM PDT 24 16100688 ps
T56 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.2848223196 Mar 12 01:00:58 PM PDT 24 Mar 12 01:01:02 PM PDT 24 455811814 ps
T866 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.1096539284 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 25299332 ps
T867 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.4010341444 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:58 PM PDT 24 47663548 ps
T59 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.3662269165 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:56 PM PDT 24 154681283 ps
T58 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.2295460825 Mar 12 01:00:58 PM PDT 24 Mar 12 01:01:02 PM PDT 24 267566349 ps
T868 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.644329650 Mar 12 01:01:20 PM PDT 24 Mar 12 01:01:22 PM PDT 24 13121384 ps
T869 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.765350002 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 44762361 ps
T870 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.1602973834 Mar 12 01:00:34 PM PDT 24 Mar 12 01:00:36 PM PDT 24 483827152 ps
T871 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1563815597 Mar 12 01:01:14 PM PDT 24 Mar 12 01:01:15 PM PDT 24 67653444 ps
T872 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1279675390 Mar 12 01:01:24 PM PDT 24 Mar 12 01:01:25 PM PDT 24 33070699 ps
T54 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.2045622001 Mar 12 01:01:07 PM PDT 24 Mar 12 01:01:09 PM PDT 24 124278942 ps
T873 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.1679383297 Mar 12 01:01:13 PM PDT 24 Mar 12 01:01:14 PM PDT 24 19688460 ps
T874 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.4260541079 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:48 PM PDT 24 25499782 ps
T875 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.3913147124 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 17227342 ps
T876 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.1671798432 Mar 12 01:00:59 PM PDT 24 Mar 12 01:01:02 PM PDT 24 40533636 ps
T63 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.2518394094 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:52 PM PDT 24 227671050 ps
T877 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.822438497 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:59 PM PDT 24 189491866 ps
T878 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3883884494 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:51 PM PDT 24 18747103 ps
T879 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.2321413517 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 15139599 ps
T880 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.2308740344 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 18697331 ps
T881 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.2492007244 Mar 12 01:00:40 PM PDT 24 Mar 12 01:00:41 PM PDT 24 27078009 ps
T110 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3540584849 Mar 12 01:00:59 PM PDT 24 Mar 12 01:01:01 PM PDT 24 119514830 ps
T882 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.3156943736 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:54 PM PDT 24 156168336 ps
T883 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3429569153 Mar 12 01:00:33 PM PDT 24 Mar 12 01:00:34 PM PDT 24 54889720 ps
T93 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.1951641680 Mar 12 01:01:18 PM PDT 24 Mar 12 01:01:21 PM PDT 24 120334603 ps
T884 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3318612112 Mar 12 01:00:59 PM PDT 24 Mar 12 01:00:59 PM PDT 24 15644339 ps
T885 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2397743135 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:50 PM PDT 24 121675956 ps
T886 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.1935599270 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:57 PM PDT 24 111846313 ps
T61 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.3609648931 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:55 PM PDT 24 142055736 ps
T99 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2199500515 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:55 PM PDT 24 219851463 ps
T152 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.470225068 Mar 12 01:00:59 PM PDT 24 Mar 12 01:01:01 PM PDT 24 113622264 ps
T887 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.278938421 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:58 PM PDT 24 76041858 ps
T888 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.982747682 Mar 12 01:00:58 PM PDT 24 Mar 12 01:00:59 PM PDT 24 18454958 ps
T889 /workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.509527797 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:55 PM PDT 24 102373880 ps
T890 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.657080922 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 14912563 ps
T891 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.2594844771 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:55 PM PDT 24 20934327 ps
T55 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.3076216249 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:58 PM PDT 24 76491003 ps
T892 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.1631757853 Mar 12 01:01:22 PM PDT 24 Mar 12 01:01:23 PM PDT 24 18539960 ps
T893 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.2304173760 Mar 12 01:01:20 PM PDT 24 Mar 12 01:01:20 PM PDT 24 24189573 ps
T894 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.3489249403 Mar 12 01:01:02 PM PDT 24 Mar 12 01:01:04 PM PDT 24 93825386 ps
T100 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2546550294 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:57 PM PDT 24 107394881 ps
T895 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.1052597751 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:52 PM PDT 24 31649413 ps
T62 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.405219056 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:59 PM PDT 24 112063305 ps
T896 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.1159144580 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:54 PM PDT 24 54276557 ps
T897 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.3366576858 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:55 PM PDT 24 202983822 ps
T898 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.702321244 Mar 12 01:01:00 PM PDT 24 Mar 12 01:01:01 PM PDT 24 49206545 ps
T899 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.2328834291 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:55 PM PDT 24 136791317 ps
T900 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.3492242338 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:51 PM PDT 24 134432816 ps
T901 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.2198242415 Mar 12 01:01:08 PM PDT 24 Mar 12 01:01:10 PM PDT 24 182373552 ps
T153 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.826843417 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:53 PM PDT 24 227502457 ps
T902 /workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.1185199295 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:56 PM PDT 24 89109742 ps
T903 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.1916513190 Mar 12 01:01:09 PM PDT 24 Mar 12 01:01:10 PM PDT 24 19903059 ps
T904 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.2229285981 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:56 PM PDT 24 17942783 ps
T60 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.888010732 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:49 PM PDT 24 67129979 ps
T905 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.3572101852 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:51 PM PDT 24 14321335 ps
T906 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.3387097160 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:50 PM PDT 24 79959321 ps
T907 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.2786370076 Mar 12 01:00:39 PM PDT 24 Mar 12 01:00:40 PM PDT 24 30185373 ps
T908 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.1295568914 Mar 12 01:00:54 PM PDT 24 Mar 12 01:01:03 PM PDT 24 227118942 ps
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T912 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.2877089773 Mar 12 01:01:22 PM PDT 24 Mar 12 01:01:23 PM PDT 24 34362945 ps
T65 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1658199137 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:49 PM PDT 24 139837538 ps
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T917 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.4196328874 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:52 PM PDT 24 51087559 ps
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T918 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.1281615015 Mar 12 01:00:43 PM PDT 24 Mar 12 01:00:48 PM PDT 24 249233845 ps
T919 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.513818168 Mar 12 01:00:48 PM PDT 24 Mar 12 01:00:56 PM PDT 24 247027164 ps
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T922 /workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.3582222685 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:59 PM PDT 24 270131746 ps
T923 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.561368256 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:53 PM PDT 24 228356053 ps
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T118 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.2922299155 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:56 PM PDT 24 116988485 ps
T925 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.2376214852 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:56 PM PDT 24 74650083 ps
T926 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.1555754498 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:51 PM PDT 24 24544887 ps
T116 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2762677801 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:55 PM PDT 24 236897417 ps
T927 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.3800307867 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 20262317 ps
T928 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.703452857 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:59 PM PDT 24 158139991 ps
T929 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.880487751 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:56 PM PDT 24 30280839 ps
T117 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.3502064689 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:52 PM PDT 24 154077899 ps
T114 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.2872332268 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 56195650 ps
T930 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.1562357156 Mar 12 01:00:44 PM PDT 24 Mar 12 01:00:47 PM PDT 24 210059989 ps
T931 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.1357191669 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:57 PM PDT 24 12981124 ps
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T154 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.1100834313 Mar 12 01:01:28 PM PDT 24 Mar 12 01:01:31 PM PDT 24 118503708 ps
T935 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.106219995 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:57 PM PDT 24 110642947 ps
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T938 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.3719522715 Mar 12 01:00:55 PM PDT 24 Mar 12 01:01:07 PM PDT 24 187890141 ps
T939 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3650995835 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:51 PM PDT 24 270336943 ps
T940 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.2210612684 Mar 12 01:01:06 PM PDT 24 Mar 12 01:01:06 PM PDT 24 12131475 ps
T941 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.4112276616 Mar 12 01:00:41 PM PDT 24 Mar 12 01:00:42 PM PDT 24 32370624 ps
T112 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.2235269151 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 162331860 ps
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T943 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.1075400837 Mar 12 01:00:52 PM PDT 24 Mar 12 01:00:53 PM PDT 24 25457754 ps
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T944 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.1171075124 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 17252091 ps
T945 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.3438259387 Mar 12 01:00:45 PM PDT 24 Mar 12 01:00:47 PM PDT 24 189900375 ps
T946 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.2192772748 Mar 12 01:01:09 PM PDT 24 Mar 12 01:01:10 PM PDT 24 11428596 ps
T947 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.3627173046 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:49 PM PDT 24 99023452 ps
T948 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.1448166959 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:56 PM PDT 24 30607055 ps
T949 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3852916335 Mar 12 01:01:05 PM PDT 24 Mar 12 01:01:12 PM PDT 24 137532284 ps
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T951 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.198881427 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:58 PM PDT 24 148798262 ps
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T953 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.3217429162 Mar 12 01:01:11 PM PDT 24 Mar 12 01:01:13 PM PDT 24 33388134 ps
T121 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2282722226 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:55 PM PDT 24 57575914 ps
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T962 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.2113494369 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:56 PM PDT 24 47246567 ps
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T964 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1296427924 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:49 PM PDT 24 111265972 ps
T965 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.418403092 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:58 PM PDT 24 19177901 ps
T966 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.913607217 Mar 12 01:00:42 PM PDT 24 Mar 12 01:00:43 PM PDT 24 22781919 ps
T101 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.1416743184 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:59 PM PDT 24 251318597 ps
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T968 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2031680020 Mar 12 01:00:58 PM PDT 24 Mar 12 01:00:59 PM PDT 24 33202176 ps
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T970 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1664570881 Mar 12 01:00:50 PM PDT 24 Mar 12 01:00:51 PM PDT 24 57249349 ps
T971 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1146828214 Mar 12 01:01:23 PM PDT 24 Mar 12 01:01:27 PM PDT 24 98911327 ps
T972 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.2069686173 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:55 PM PDT 24 116311034 ps
T973 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.2362794074 Mar 12 01:00:42 PM PDT 24 Mar 12 01:00:44 PM PDT 24 121708563 ps
T974 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.200112908 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:56 PM PDT 24 705387451 ps
T975 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.160068029 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:56 PM PDT 24 87005903 ps
T976 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.2260689239 Mar 12 01:00:41 PM PDT 24 Mar 12 01:00:42 PM PDT 24 89745895 ps
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T978 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.183646892 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:55 PM PDT 24 845809506 ps
T979 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1348246479 Mar 12 01:00:55 PM PDT 24 Mar 12 01:00:59 PM PDT 24 499177737 ps
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T981 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.4067682165 Mar 12 01:00:51 PM PDT 24 Mar 12 01:00:52 PM PDT 24 21124293 ps
T982 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.4018246882 Mar 12 01:00:47 PM PDT 24 Mar 12 01:00:49 PM PDT 24 107531414 ps
T983 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.3180100865 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:54 PM PDT 24 13656094 ps
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T986 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3567838238 Mar 12 01:00:53 PM PDT 24 Mar 12 01:00:55 PM PDT 24 93746944 ps
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T992 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.22973907 Mar 12 01:00:58 PM PDT 24 Mar 12 01:00:59 PM PDT 24 39802635 ps
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T995 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3853890726 Mar 12 01:00:49 PM PDT 24 Mar 12 01:00:51 PM PDT 24 104088919 ps
T996 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.487601170 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:58 PM PDT 24 22997915 ps
T997 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.634399905 Mar 12 01:01:03 PM PDT 24 Mar 12 01:01:05 PM PDT 24 31894448 ps
T998 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.336297896 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:56 PM PDT 24 75318672 ps
T999 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.3744305062 Mar 12 01:00:57 PM PDT 24 Mar 12 01:00:59 PM PDT 24 26269680 ps
T155 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.1068796105 Mar 12 01:00:54 PM PDT 24 Mar 12 01:00:56 PM PDT 24 70026499 ps
T1000 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.1710767723 Mar 12 01:00:56 PM PDT 24 Mar 12 01:00:57 PM PDT 24 10939165 ps
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