T803 |
/workspace/coverage/default/21.clkmgr_clk_status.3568764939 |
|
|
Mar 24 02:33:07 PM PDT 24 |
Mar 24 02:33:07 PM PDT 24 |
28715288 ps |
T804 |
/workspace/coverage/default/45.clkmgr_frequency_timeout.1284803658 |
|
|
Mar 24 02:34:30 PM PDT 24 |
Mar 24 02:34:38 PM PDT 24 |
1647866962 ps |
T805 |
/workspace/coverage/default/48.clkmgr_trans.1517667639 |
|
|
Mar 24 02:34:37 PM PDT 24 |
Mar 24 02:34:40 PM PDT 24 |
16733694 ps |
T806 |
/workspace/coverage/default/11.clkmgr_stress_all_with_rand_reset.1536991209 |
|
|
Mar 24 02:32:30 PM PDT 24 |
Mar 24 02:41:29 PM PDT 24 |
101014332120 ps |
T807 |
/workspace/coverage/default/18.clkmgr_stress_all_with_rand_reset.509640116 |
|
|
Mar 24 02:32:59 PM PDT 24 |
Mar 24 02:45:03 PM PDT 24 |
69578521599 ps |
T808 |
/workspace/coverage/default/22.clkmgr_div_intersig_mubi.3354109737 |
|
|
Mar 24 02:33:14 PM PDT 24 |
Mar 24 02:33:16 PM PDT 24 |
13469067 ps |
T809 |
/workspace/coverage/default/24.clkmgr_lc_ctrl_intersig_mubi.1180382273 |
|
|
Mar 24 02:33:23 PM PDT 24 |
Mar 24 02:33:25 PM PDT 24 |
43972752 ps |
T810 |
/workspace/coverage/default/28.clkmgr_peri.2316740422 |
|
|
Mar 24 02:33:34 PM PDT 24 |
Mar 24 02:33:36 PM PDT 24 |
45138400 ps |
T811 |
/workspace/coverage/default/1.clkmgr_frequency_timeout.2175807575 |
|
|
Mar 24 02:31:26 PM PDT 24 |
Mar 24 02:31:33 PM PDT 24 |
735887490 ps |
T812 |
/workspace/coverage/default/43.clkmgr_peri.1839424560 |
|
|
Mar 24 02:34:17 PM PDT 24 |
Mar 24 02:34:17 PM PDT 24 |
25278334 ps |
T813 |
/workspace/coverage/default/23.clkmgr_lc_ctrl_intersig_mubi.3097236562 |
|
|
Mar 24 02:33:19 PM PDT 24 |
Mar 24 02:33:25 PM PDT 24 |
25906428 ps |
T814 |
/workspace/coverage/default/22.clkmgr_alert_test.2680404576 |
|
|
Mar 24 02:33:14 PM PDT 24 |
Mar 24 02:33:15 PM PDT 24 |
16307200 ps |
T815 |
/workspace/coverage/default/42.clkmgr_frequency.1981102906 |
|
|
Mar 24 02:34:19 PM PDT 24 |
Mar 24 02:34:22 PM PDT 24 |
482698879 ps |
T816 |
/workspace/coverage/default/41.clkmgr_extclk.1232474193 |
|
|
Mar 24 02:34:11 PM PDT 24 |
Mar 24 02:34:11 PM PDT 24 |
26247893 ps |
T817 |
/workspace/coverage/default/24.clkmgr_alert_test.179544815 |
|
|
Mar 24 02:33:23 PM PDT 24 |
Mar 24 02:33:25 PM PDT 24 |
30798993 ps |
T818 |
/workspace/coverage/default/19.clkmgr_lc_ctrl_intersig_mubi.3231562938 |
|
|
Mar 24 02:33:03 PM PDT 24 |
Mar 24 02:33:04 PM PDT 24 |
127008922 ps |
T819 |
/workspace/coverage/default/22.clkmgr_smoke.3935429428 |
|
|
Mar 24 02:33:18 PM PDT 24 |
Mar 24 02:33:22 PM PDT 24 |
17846195 ps |
T820 |
/workspace/coverage/default/46.clkmgr_trans.2901227867 |
|
|
Mar 24 02:34:26 PM PDT 24 |
Mar 24 02:34:28 PM PDT 24 |
41089272 ps |
T821 |
/workspace/coverage/default/4.clkmgr_alert_test.524255228 |
|
|
Mar 24 02:32:02 PM PDT 24 |
Mar 24 02:32:03 PM PDT 24 |
21457183 ps |
T822 |
/workspace/coverage/default/39.clkmgr_frequency_timeout.1813533239 |
|
|
Mar 24 02:34:07 PM PDT 24 |
Mar 24 02:34:10 PM PDT 24 |
379248509 ps |
T823 |
/workspace/coverage/default/38.clkmgr_alert_test.2681835773 |
|
|
Mar 24 02:34:05 PM PDT 24 |
Mar 24 02:34:06 PM PDT 24 |
15436512 ps |
T824 |
/workspace/coverage/default/39.clkmgr_smoke.1230838962 |
|
|
Mar 24 02:34:07 PM PDT 24 |
Mar 24 02:34:08 PM PDT 24 |
16052283 ps |
T825 |
/workspace/coverage/default/11.clkmgr_frequency_timeout.2072214644 |
|
|
Mar 24 02:32:29 PM PDT 24 |
Mar 24 02:32:39 PM PDT 24 |
1340954303 ps |
T826 |
/workspace/coverage/default/10.clkmgr_stress_all.2536883082 |
|
|
Mar 24 02:32:32 PM PDT 24 |
Mar 24 02:33:32 PM PDT 24 |
8344127252 ps |
T827 |
/workspace/coverage/default/29.clkmgr_clk_status.3373545300 |
|
|
Mar 24 02:33:38 PM PDT 24 |
Mar 24 02:33:40 PM PDT 24 |
79020461 ps |
T828 |
/workspace/coverage/default/40.clkmgr_clk_status.682169345 |
|
|
Mar 24 02:34:14 PM PDT 24 |
Mar 24 02:34:16 PM PDT 24 |
18030744 ps |
T829 |
/workspace/coverage/default/42.clkmgr_extclk.1317245235 |
|
|
Mar 24 02:34:10 PM PDT 24 |
Mar 24 02:34:11 PM PDT 24 |
38757392 ps |
T830 |
/workspace/coverage/default/16.clkmgr_lc_ctrl_intersig_mubi.190170897 |
|
|
Mar 24 02:32:54 PM PDT 24 |
Mar 24 02:32:55 PM PDT 24 |
32954092 ps |
T831 |
/workspace/coverage/default/28.clkmgr_trans.1126691048 |
|
|
Mar 24 02:33:35 PM PDT 24 |
Mar 24 02:33:36 PM PDT 24 |
58602423 ps |
T832 |
/workspace/coverage/default/30.clkmgr_lc_ctrl_intersig_mubi.3474261649 |
|
|
Mar 24 02:33:43 PM PDT 24 |
Mar 24 02:33:44 PM PDT 24 |
33408880 ps |
T833 |
/workspace/coverage/default/12.clkmgr_extclk.1110906365 |
|
|
Mar 24 02:32:36 PM PDT 24 |
Mar 24 02:32:37 PM PDT 24 |
49010076 ps |
T834 |
/workspace/coverage/default/22.clkmgr_trans.1052977960 |
|
|
Mar 24 02:33:13 PM PDT 24 |
Mar 24 02:33:14 PM PDT 24 |
150804326 ps |
T835 |
/workspace/coverage/default/23.clkmgr_smoke.911318572 |
|
|
Mar 24 02:33:14 PM PDT 24 |
Mar 24 02:33:15 PM PDT 24 |
16600687 ps |
T836 |
/workspace/coverage/default/32.clkmgr_idle_intersig_mubi.3296976133 |
|
|
Mar 24 02:33:41 PM PDT 24 |
Mar 24 02:33:44 PM PDT 24 |
26800919 ps |
T837 |
/workspace/coverage/default/38.clkmgr_lc_clk_byp_req_intersig_mubi.4064665189 |
|
|
Mar 24 02:34:04 PM PDT 24 |
Mar 24 02:34:06 PM PDT 24 |
332711940 ps |
T838 |
/workspace/coverage/default/35.clkmgr_clk_handshake_intersig_mubi.1669011189 |
|
|
Mar 24 02:33:56 PM PDT 24 |
Mar 24 02:33:57 PM PDT 24 |
28990666 ps |
T839 |
/workspace/coverage/default/23.clkmgr_stress_all_with_rand_reset.852792215 |
|
|
Mar 24 02:33:16 PM PDT 24 |
Mar 24 02:36:53 PM PDT 24 |
11416292246 ps |
T840 |
/workspace/coverage/default/35.clkmgr_lc_clk_byp_req_intersig_mubi.3236949359 |
|
|
Mar 24 02:33:58 PM PDT 24 |
Mar 24 02:33:59 PM PDT 24 |
13365757 ps |
T841 |
/workspace/coverage/default/5.clkmgr_alert_test.3674072252 |
|
|
Mar 24 02:32:03 PM PDT 24 |
Mar 24 02:32:04 PM PDT 24 |
45697815 ps |
T842 |
/workspace/coverage/default/17.clkmgr_alert_test.1006280204 |
|
|
Mar 24 02:32:56 PM PDT 24 |
Mar 24 02:32:59 PM PDT 24 |
22413748 ps |
T843 |
/workspace/coverage/default/25.clkmgr_frequency.989004482 |
|
|
Mar 24 02:33:24 PM PDT 24 |
Mar 24 02:33:28 PM PDT 24 |
604452103 ps |
T844 |
/workspace/coverage/default/14.clkmgr_idle_intersig_mubi.280067335 |
|
|
Mar 24 02:32:49 PM PDT 24 |
Mar 24 02:32:50 PM PDT 24 |
18023864 ps |
T845 |
/workspace/coverage/default/21.clkmgr_stress_all.1910423272 |
|
|
Mar 24 02:33:16 PM PDT 24 |
Mar 24 02:33:26 PM PDT 24 |
2125228262 ps |
T846 |
/workspace/coverage/default/47.clkmgr_smoke.3201484011 |
|
|
Mar 24 02:34:27 PM PDT 24 |
Mar 24 02:34:30 PM PDT 24 |
76033970 ps |
T847 |
/workspace/coverage/default/49.clkmgr_lc_ctrl_intersig_mubi.3743245144 |
|
|
Mar 24 02:34:44 PM PDT 24 |
Mar 24 02:34:46 PM PDT 24 |
87731687 ps |
T848 |
/workspace/coverage/default/32.clkmgr_frequency.2936945614 |
|
|
Mar 24 02:33:43 PM PDT 24 |
Mar 24 02:33:50 PM PDT 24 |
915398098 ps |
T849 |
/workspace/coverage/default/4.clkmgr_regwen.1361246839 |
|
|
Mar 24 02:31:57 PM PDT 24 |
Mar 24 02:32:00 PM PDT 24 |
666084415 ps |
T850 |
/workspace/coverage/default/1.clkmgr_frequency.3749682258 |
|
|
Mar 24 02:31:28 PM PDT 24 |
Mar 24 02:31:35 PM PDT 24 |
1822026210 ps |
T851 |
/workspace/coverage/default/37.clkmgr_regwen.813386159 |
|
|
Mar 24 02:34:04 PM PDT 24 |
Mar 24 02:34:05 PM PDT 24 |
51541509 ps |
T852 |
/workspace/coverage/default/9.clkmgr_peri.181743144 |
|
|
Mar 24 02:32:24 PM PDT 24 |
Mar 24 02:32:25 PM PDT 24 |
24045651 ps |
T853 |
/workspace/coverage/default/24.clkmgr_peri.2289829470 |
|
|
Mar 24 02:33:23 PM PDT 24 |
Mar 24 02:33:25 PM PDT 24 |
36550283 ps |
T854 |
/workspace/coverage/default/26.clkmgr_idle_intersig_mubi.1800791067 |
|
|
Mar 24 02:33:31 PM PDT 24 |
Mar 24 02:33:33 PM PDT 24 |
87628418 ps |
T855 |
/workspace/coverage/default/12.clkmgr_trans.2387809166 |
|
|
Mar 24 02:32:35 PM PDT 24 |
Mar 24 02:32:37 PM PDT 24 |
97521961 ps |
T856 |
/workspace/coverage/default/26.clkmgr_alert_test.2229087539 |
|
|
Mar 24 02:33:29 PM PDT 24 |
Mar 24 02:33:30 PM PDT 24 |
17474923 ps |
T857 |
/workspace/coverage/default/39.clkmgr_idle_intersig_mubi.3337694846 |
|
|
Mar 24 02:34:06 PM PDT 24 |
Mar 24 02:34:07 PM PDT 24 |
43951214 ps |
T858 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.4058108656 |
|
|
Mar 24 12:55:46 PM PDT 24 |
Mar 24 12:55:46 PM PDT 24 |
23195186 ps |
T859 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.1699550138 |
|
|
Mar 24 12:56:15 PM PDT 24 |
Mar 24 12:56:17 PM PDT 24 |
50069224 ps |
T84 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.1119153818 |
|
|
Mar 24 12:55:30 PM PDT 24 |
Mar 24 12:55:32 PM PDT 24 |
145834721 ps |
T85 |
/workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3290934060 |
|
|
Mar 24 12:55:59 PM PDT 24 |
Mar 24 12:56:01 PM PDT 24 |
48810257 ps |
T860 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.964562470 |
|
|
Mar 24 12:56:23 PM PDT 24 |
Mar 24 12:56:25 PM PDT 24 |
29425453 ps |
T105 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.1477052114 |
|
|
Mar 24 12:55:38 PM PDT 24 |
Mar 24 12:55:44 PM PDT 24 |
972271688 ps |
T861 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.1971930852 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:43 PM PDT 24 |
699629413 ps |
T862 |
/workspace/coverage/cover_reg_top/40.clkmgr_intr_test.1943741682 |
|
|
Mar 24 12:56:50 PM PDT 24 |
Mar 24 12:56:51 PM PDT 24 |
37081266 ps |
T863 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.1739144349 |
|
|
Mar 24 12:56:30 PM PDT 24 |
Mar 24 12:56:32 PM PDT 24 |
122490853 ps |
T156 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.1305903213 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:39 PM PDT 24 |
43399346 ps |
T864 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.3843815756 |
|
|
Mar 24 12:56:50 PM PDT 24 |
Mar 24 12:56:51 PM PDT 24 |
28694736 ps |
T865 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.3891224025 |
|
|
Mar 24 12:56:44 PM PDT 24 |
Mar 24 12:56:44 PM PDT 24 |
17505360 ps |
T866 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.3756784589 |
|
|
Mar 24 12:56:04 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
54276175 ps |
T56 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.2405979213 |
|
|
Mar 24 12:55:24 PM PDT 24 |
Mar 24 12:55:26 PM PDT 24 |
89763849 ps |
T867 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.4185522253 |
|
|
Mar 24 12:55:56 PM PDT 24 |
Mar 24 12:55:57 PM PDT 24 |
33339832 ps |
T86 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.635336761 |
|
|
Mar 24 12:55:59 PM PDT 24 |
Mar 24 12:56:00 PM PDT 24 |
18153073 ps |
T868 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.126459783 |
|
|
Mar 24 12:56:20 PM PDT 24 |
Mar 24 12:56:22 PM PDT 24 |
57213169 ps |
T869 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.23293789 |
|
|
Mar 24 12:56:58 PM PDT 24 |
Mar 24 12:56:59 PM PDT 24 |
11429629 ps |
T870 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.3936194459 |
|
|
Mar 24 12:56:05 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
18700241 ps |
T87 |
/workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.420200019 |
|
|
Mar 24 12:56:11 PM PDT 24 |
Mar 24 12:56:12 PM PDT 24 |
103685041 ps |
T871 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2795290958 |
|
|
Mar 24 12:56:12 PM PDT 24 |
Mar 24 12:56:13 PM PDT 24 |
65677261 ps |
T872 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.2957726404 |
|
|
Mar 24 12:56:24 PM PDT 24 |
Mar 24 12:56:25 PM PDT 24 |
44902750 ps |
T873 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.3892297557 |
|
|
Mar 24 12:56:28 PM PDT 24 |
Mar 24 12:56:33 PM PDT 24 |
128713652 ps |
T57 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.3809225360 |
|
|
Mar 24 12:56:34 PM PDT 24 |
Mar 24 12:56:35 PM PDT 24 |
84424461 ps |
T874 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2971525289 |
|
|
Mar 24 12:55:29 PM PDT 24 |
Mar 24 12:55:30 PM PDT 24 |
52367713 ps |
T875 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.3124535197 |
|
|
Mar 24 12:56:45 PM PDT 24 |
Mar 24 12:56:45 PM PDT 24 |
17984505 ps |
T88 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.835098705 |
|
|
Mar 24 12:56:16 PM PDT 24 |
Mar 24 12:56:18 PM PDT 24 |
174980337 ps |
T876 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.2358890587 |
|
|
Mar 24 12:55:48 PM PDT 24 |
Mar 24 12:55:50 PM PDT 24 |
136836299 ps |
T877 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.4133675630 |
|
|
Mar 24 12:56:34 PM PDT 24 |
Mar 24 12:56:35 PM PDT 24 |
57422000 ps |
T89 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1004301455 |
|
|
Mar 24 12:55:35 PM PDT 24 |
Mar 24 12:55:36 PM PDT 24 |
29684112 ps |
T58 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.867495677 |
|
|
Mar 24 12:56:10 PM PDT 24 |
Mar 24 12:56:12 PM PDT 24 |
72418373 ps |
T98 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.619437632 |
|
|
Mar 24 12:56:39 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
136172388 ps |
T878 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.1328717042 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:32 PM PDT 24 |
119873278 ps |
T99 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.3282700593 |
|
|
Mar 24 12:56:24 PM PDT 24 |
Mar 24 12:56:26 PM PDT 24 |
122288034 ps |
T90 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2112620123 |
|
|
Mar 24 12:56:34 PM PDT 24 |
Mar 24 12:56:35 PM PDT 24 |
82930011 ps |
T879 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.3802430676 |
|
|
Mar 24 12:55:42 PM PDT 24 |
Mar 24 12:55:44 PM PDT 24 |
101633374 ps |
T880 |
/workspace/coverage/cover_reg_top/38.clkmgr_intr_test.2257522335 |
|
|
Mar 24 12:56:54 PM PDT 24 |
Mar 24 12:56:54 PM PDT 24 |
36063343 ps |
T881 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.3752054537 |
|
|
Mar 24 12:55:30 PM PDT 24 |
Mar 24 12:55:31 PM PDT 24 |
12320620 ps |
T882 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.2462186832 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
270230600 ps |
T883 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.1295863596 |
|
|
Mar 24 12:55:35 PM PDT 24 |
Mar 24 12:55:38 PM PDT 24 |
419322469 ps |
T100 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.979784705 |
|
|
Mar 24 12:56:39 PM PDT 24 |
Mar 24 12:56:42 PM PDT 24 |
585400755 ps |
T884 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.3850989675 |
|
|
Mar 24 12:55:59 PM PDT 24 |
Mar 24 12:56:00 PM PDT 24 |
20754122 ps |
T91 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.2536630450 |
|
|
Mar 24 12:56:39 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
64587574 ps |
T885 |
/workspace/coverage/cover_reg_top/5.clkmgr_intr_test.2422269439 |
|
|
Mar 24 12:56:00 PM PDT 24 |
Mar 24 12:56:00 PM PDT 24 |
11883644 ps |
T64 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.1827969319 |
|
|
Mar 24 12:56:43 PM PDT 24 |
Mar 24 12:56:45 PM PDT 24 |
76590444 ps |
T65 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.2498317113 |
|
|
Mar 24 12:56:02 PM PDT 24 |
Mar 24 12:56:05 PM PDT 24 |
513627717 ps |
T171 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.3184138593 |
|
|
Mar 24 12:55:26 PM PDT 24 |
Mar 24 12:55:28 PM PDT 24 |
70795820 ps |
T886 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.838108793 |
|
|
Mar 24 12:56:45 PM PDT 24 |
Mar 24 12:56:46 PM PDT 24 |
123587896 ps |
T61 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.49731208 |
|
|
Mar 24 12:56:34 PM PDT 24 |
Mar 24 12:56:38 PM PDT 24 |
500630336 ps |
T887 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2406705388 |
|
|
Mar 24 12:56:45 PM PDT 24 |
Mar 24 12:56:47 PM PDT 24 |
68659200 ps |
T888 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.1757934938 |
|
|
Mar 24 12:56:15 PM PDT 24 |
Mar 24 12:56:16 PM PDT 24 |
12064982 ps |
T59 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.2161236411 |
|
|
Mar 24 12:56:03 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
145511878 ps |
T889 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.358754231 |
|
|
Mar 24 12:56:28 PM PDT 24 |
Mar 24 12:56:30 PM PDT 24 |
37687919 ps |
T60 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.898617334 |
|
|
Mar 24 12:56:16 PM PDT 24 |
Mar 24 12:56:18 PM PDT 24 |
156607866 ps |
T890 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.3462378713 |
|
|
Mar 24 12:56:43 PM PDT 24 |
Mar 24 12:56:44 PM PDT 24 |
11533059 ps |
T891 |
/workspace/coverage/cover_reg_top/18.clkmgr_intr_test.1296508799 |
|
|
Mar 24 12:56:39 PM PDT 24 |
Mar 24 12:56:40 PM PDT 24 |
13880369 ps |
T892 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.2401214453 |
|
|
Mar 24 12:55:48 PM PDT 24 |
Mar 24 12:55:50 PM PDT 24 |
55677334 ps |
T893 |
/workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.4234527169 |
|
|
Mar 24 12:55:45 PM PDT 24 |
Mar 24 12:55:47 PM PDT 24 |
58153143 ps |
T66 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.576332183 |
|
|
Mar 24 12:56:25 PM PDT 24 |
Mar 24 12:56:27 PM PDT 24 |
94798305 ps |
T894 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.3853184558 |
|
|
Mar 24 12:56:14 PM PDT 24 |
Mar 24 12:56:20 PM PDT 24 |
483764113 ps |
T895 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.2792226148 |
|
|
Mar 24 12:55:34 PM PDT 24 |
Mar 24 12:55:35 PM PDT 24 |
46434063 ps |
T62 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.1651851080 |
|
|
Mar 24 12:55:47 PM PDT 24 |
Mar 24 12:55:49 PM PDT 24 |
223042003 ps |
T111 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.4170570766 |
|
|
Mar 24 12:56:17 PM PDT 24 |
Mar 24 12:56:21 PM PDT 24 |
296701862 ps |
T896 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.708596036 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:32 PM PDT 24 |
65264939 ps |
T897 |
/workspace/coverage/cover_reg_top/49.clkmgr_intr_test.2057083595 |
|
|
Mar 24 12:56:55 PM PDT 24 |
Mar 24 12:56:56 PM PDT 24 |
14226416 ps |
T107 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.230248127 |
|
|
Mar 24 12:56:40 PM PDT 24 |
Mar 24 12:56:43 PM PDT 24 |
219261425 ps |
T63 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.4088181223 |
|
|
Mar 24 12:55:40 PM PDT 24 |
Mar 24 12:55:43 PM PDT 24 |
106785260 ps |
T110 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.4144328907 |
|
|
Mar 24 12:56:43 PM PDT 24 |
Mar 24 12:56:46 PM PDT 24 |
567890846 ps |
T898 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.3629823325 |
|
|
Mar 24 12:55:55 PM PDT 24 |
Mar 24 12:55:56 PM PDT 24 |
163062510 ps |
T102 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.981352072 |
|
|
Mar 24 12:56:37 PM PDT 24 |
Mar 24 12:56:38 PM PDT 24 |
72482522 ps |
T899 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.888107540 |
|
|
Mar 24 12:55:39 PM PDT 24 |
Mar 24 12:55:40 PM PDT 24 |
46831639 ps |
T900 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.164915578 |
|
|
Mar 24 12:56:49 PM PDT 24 |
Mar 24 12:56:49 PM PDT 24 |
15034006 ps |
T901 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1327383278 |
|
|
Mar 24 12:55:51 PM PDT 24 |
Mar 24 12:55:52 PM PDT 24 |
40903813 ps |
T902 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.1964890835 |
|
|
Mar 24 12:56:00 PM PDT 24 |
Mar 24 12:56:03 PM PDT 24 |
46436438 ps |
T903 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.1532020543 |
|
|
Mar 24 12:55:48 PM PDT 24 |
Mar 24 12:55:50 PM PDT 24 |
94518599 ps |
T904 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1294569282 |
|
|
Mar 24 12:56:05 PM PDT 24 |
Mar 24 12:56:07 PM PDT 24 |
125147301 ps |
T905 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.1648037322 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:31 PM PDT 24 |
30685653 ps |
T124 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1451916045 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:40 PM PDT 24 |
175687032 ps |
T108 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2232359661 |
|
|
Mar 24 12:56:11 PM PDT 24 |
Mar 24 12:56:13 PM PDT 24 |
119764418 ps |
T906 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.2380523269 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:40 PM PDT 24 |
36830051 ps |
T907 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.1531930746 |
|
|
Mar 24 12:56:40 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
19287036 ps |
T908 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.869589416 |
|
|
Mar 24 12:55:50 PM PDT 24 |
Mar 24 12:55:51 PM PDT 24 |
50729031 ps |
T119 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1881626466 |
|
|
Mar 24 12:56:03 PM PDT 24 |
Mar 24 12:56:05 PM PDT 24 |
254940719 ps |
T909 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.3064832747 |
|
|
Mar 24 12:56:45 PM PDT 24 |
Mar 24 12:56:45 PM PDT 24 |
12537860 ps |
T910 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.3361152285 |
|
|
Mar 24 12:56:30 PM PDT 24 |
Mar 24 12:56:32 PM PDT 24 |
18013786 ps |
T8 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3077942666 |
|
|
Mar 24 12:55:29 PM PDT 24 |
Mar 24 12:55:31 PM PDT 24 |
116513908 ps |
T125 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.2467344016 |
|
|
Mar 24 12:56:33 PM PDT 24 |
Mar 24 12:56:35 PM PDT 24 |
330375137 ps |
T130 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1929898716 |
|
|
Mar 24 12:56:06 PM PDT 24 |
Mar 24 12:56:10 PM PDT 24 |
985698536 ps |
T120 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.441042610 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:33 PM PDT 24 |
100197027 ps |
T911 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.3704395790 |
|
|
Mar 24 12:56:48 PM PDT 24 |
Mar 24 12:56:49 PM PDT 24 |
37093240 ps |
T912 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.93187351 |
|
|
Mar 24 12:56:56 PM PDT 24 |
Mar 24 12:56:57 PM PDT 24 |
38778899 ps |
T913 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.625653201 |
|
|
Mar 24 12:55:48 PM PDT 24 |
Mar 24 12:55:49 PM PDT 24 |
37212059 ps |
T112 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.1356364310 |
|
|
Mar 24 12:56:23 PM PDT 24 |
Mar 24 12:56:26 PM PDT 24 |
123886559 ps |
T914 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.148680570 |
|
|
Mar 24 12:56:50 PM PDT 24 |
Mar 24 12:56:51 PM PDT 24 |
17840343 ps |
T915 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.3813600856 |
|
|
Mar 24 12:55:25 PM PDT 24 |
Mar 24 12:55:26 PM PDT 24 |
121655714 ps |
T916 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.3252092626 |
|
|
Mar 24 12:55:34 PM PDT 24 |
Mar 24 12:55:35 PM PDT 24 |
84730566 ps |
T917 |
/workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.3819918621 |
|
|
Mar 24 12:56:00 PM PDT 24 |
Mar 24 12:56:02 PM PDT 24 |
186051821 ps |
T121 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1895277673 |
|
|
Mar 24 12:56:22 PM PDT 24 |
Mar 24 12:56:27 PM PDT 24 |
1189174794 ps |
T918 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.2003379443 |
|
|
Mar 24 12:56:23 PM PDT 24 |
Mar 24 12:56:25 PM PDT 24 |
15778370 ps |
T919 |
/workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.3303381911 |
|
|
Mar 24 12:56:44 PM PDT 24 |
Mar 24 12:56:46 PM PDT 24 |
37111623 ps |
T920 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.195095333 |
|
|
Mar 24 12:56:17 PM PDT 24 |
Mar 24 12:56:18 PM PDT 24 |
44985393 ps |
T122 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.3966743754 |
|
|
Mar 24 12:56:40 PM PDT 24 |
Mar 24 12:56:43 PM PDT 24 |
225903437 ps |
T921 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3190197796 |
|
|
Mar 24 12:56:17 PM PDT 24 |
Mar 24 12:56:18 PM PDT 24 |
17084555 ps |
T922 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.4076884569 |
|
|
Mar 24 12:56:04 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
56215797 ps |
T923 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.873374335 |
|
|
Mar 24 12:56:54 PM PDT 24 |
Mar 24 12:56:55 PM PDT 24 |
32960250 ps |
T924 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.1159140638 |
|
|
Mar 24 12:56:24 PM PDT 24 |
Mar 24 12:56:28 PM PDT 24 |
104890593 ps |
T126 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.4271984911 |
|
|
Mar 24 12:56:24 PM PDT 24 |
Mar 24 12:56:26 PM PDT 24 |
57646037 ps |
T925 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1193838614 |
|
|
Mar 24 12:56:37 PM PDT 24 |
Mar 24 12:56:39 PM PDT 24 |
36103801 ps |
T926 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.169468792 |
|
|
Mar 24 12:56:35 PM PDT 24 |
Mar 24 12:56:36 PM PDT 24 |
31392952 ps |
T927 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.3353504679 |
|
|
Mar 24 12:56:03 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
121621173 ps |
T928 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.1276809322 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:38 PM PDT 24 |
34380832 ps |
T131 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.2908669543 |
|
|
Mar 24 12:56:38 PM PDT 24 |
Mar 24 12:56:40 PM PDT 24 |
121631272 ps |
T929 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.398730157 |
|
|
Mar 24 12:56:11 PM PDT 24 |
Mar 24 12:56:12 PM PDT 24 |
12616567 ps |
T127 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.4081823438 |
|
|
Mar 24 12:56:39 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
143249290 ps |
T930 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.1957419902 |
|
|
Mar 24 12:56:44 PM PDT 24 |
Mar 24 12:56:45 PM PDT 24 |
104797692 ps |
T931 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.598802051 |
|
|
Mar 24 12:56:40 PM PDT 24 |
Mar 24 12:56:42 PM PDT 24 |
210397628 ps |
T932 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.3273703143 |
|
|
Mar 24 12:56:11 PM PDT 24 |
Mar 24 12:56:13 PM PDT 24 |
69822754 ps |
T933 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.3691382312 |
|
|
Mar 24 12:55:48 PM PDT 24 |
Mar 24 12:55:51 PM PDT 24 |
203835179 ps |
T934 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.2811991200 |
|
|
Mar 24 12:56:47 PM PDT 24 |
Mar 24 12:56:48 PM PDT 24 |
24752861 ps |
T135 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3092877404 |
|
|
Mar 24 12:55:50 PM PDT 24 |
Mar 24 12:55:52 PM PDT 24 |
122827323 ps |
T935 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.4176144095 |
|
|
Mar 24 12:55:38 PM PDT 24 |
Mar 24 12:55:40 PM PDT 24 |
54709312 ps |
T128 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.1446514443 |
|
|
Mar 24 12:55:58 PM PDT 24 |
Mar 24 12:56:00 PM PDT 24 |
55055175 ps |
T936 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.634993704 |
|
|
Mar 24 12:56:56 PM PDT 24 |
Mar 24 12:56:56 PM PDT 24 |
20579187 ps |
T937 |
/workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.3163172761 |
|
|
Mar 24 12:56:41 PM PDT 24 |
Mar 24 12:56:43 PM PDT 24 |
45606483 ps |
T938 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.3003722815 |
|
|
Mar 24 12:55:29 PM PDT 24 |
Mar 24 12:55:31 PM PDT 24 |
133972919 ps |
T129 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.2562599525 |
|
|
Mar 24 12:56:23 PM PDT 24 |
Mar 24 12:56:27 PM PDT 24 |
462239502 ps |
T939 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.726345615 |
|
|
Mar 24 12:56:49 PM PDT 24 |
Mar 24 12:56:50 PM PDT 24 |
42704451 ps |
T940 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.3967551002 |
|
|
Mar 24 12:56:43 PM PDT 24 |
Mar 24 12:56:43 PM PDT 24 |
14060227 ps |
T941 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.553679154 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:34 PM PDT 24 |
101310596 ps |
T942 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.1107419750 |
|
|
Mar 24 12:56:18 PM PDT 24 |
Mar 24 12:56:19 PM PDT 24 |
33211817 ps |
T132 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.3598972199 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:31 PM PDT 24 |
103615764 ps |
T943 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3638854973 |
|
|
Mar 24 12:55:36 PM PDT 24 |
Mar 24 12:55:43 PM PDT 24 |
532807647 ps |
T944 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.2650201220 |
|
|
Mar 24 12:55:34 PM PDT 24 |
Mar 24 12:55:37 PM PDT 24 |
538790505 ps |
T945 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.3995590038 |
|
|
Mar 24 12:56:44 PM PDT 24 |
Mar 24 12:56:45 PM PDT 24 |
24706338 ps |
T946 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.1239097309 |
|
|
Mar 24 12:56:05 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
23246701 ps |
T947 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.531428631 |
|
|
Mar 24 12:56:20 PM PDT 24 |
Mar 24 12:56:22 PM PDT 24 |
71293736 ps |
T133 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.1276893823 |
|
|
Mar 24 12:55:49 PM PDT 24 |
Mar 24 12:55:50 PM PDT 24 |
77073096 ps |
T948 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.3056250288 |
|
|
Mar 24 12:56:28 PM PDT 24 |
Mar 24 12:56:31 PM PDT 24 |
105722461 ps |
T949 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3440235201 |
|
|
Mar 24 12:56:35 PM PDT 24 |
Mar 24 12:56:37 PM PDT 24 |
247209636 ps |
T950 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.4013946621 |
|
|
Mar 24 12:55:41 PM PDT 24 |
Mar 24 12:55:44 PM PDT 24 |
235864816 ps |
T951 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.816037142 |
|
|
Mar 24 12:56:01 PM PDT 24 |
Mar 24 12:56:08 PM PDT 24 |
406229149 ps |
T952 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.2304116683 |
|
|
Mar 24 12:56:11 PM PDT 24 |
Mar 24 12:56:12 PM PDT 24 |
56792104 ps |
T953 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.2260050192 |
|
|
Mar 24 12:56:00 PM PDT 24 |
Mar 24 12:56:01 PM PDT 24 |
126351491 ps |
T954 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.796238058 |
|
|
Mar 24 12:55:29 PM PDT 24 |
Mar 24 12:55:33 PM PDT 24 |
139702803 ps |
T955 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.3228338122 |
|
|
Mar 24 12:56:37 PM PDT 24 |
Mar 24 12:56:38 PM PDT 24 |
76662286 ps |
T956 |
/workspace/coverage/cover_reg_top/29.clkmgr_intr_test.3587080185 |
|
|
Mar 24 12:56:51 PM PDT 24 |
Mar 24 12:56:52 PM PDT 24 |
48383353 ps |
T957 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.3097038426 |
|
|
Mar 24 12:55:30 PM PDT 24 |
Mar 24 12:55:32 PM PDT 24 |
191079484 ps |
T958 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.1239100023 |
|
|
Mar 24 12:56:52 PM PDT 24 |
Mar 24 12:56:53 PM PDT 24 |
74977285 ps |
T959 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.217553246 |
|
|
Mar 24 12:56:09 PM PDT 24 |
Mar 24 12:56:11 PM PDT 24 |
85667292 ps |
T960 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.2733884277 |
|
|
Mar 24 12:55:40 PM PDT 24 |
Mar 24 12:55:41 PM PDT 24 |
17343009 ps |
T961 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.3088376507 |
|
|
Mar 24 12:56:14 PM PDT 24 |
Mar 24 12:56:17 PM PDT 24 |
166557089 ps |
T962 |
/workspace/coverage/cover_reg_top/47.clkmgr_intr_test.2779062507 |
|
|
Mar 24 12:56:55 PM PDT 24 |
Mar 24 12:56:56 PM PDT 24 |
13061462 ps |
T963 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3990512751 |
|
|
Mar 24 12:56:42 PM PDT 24 |
Mar 24 12:56:43 PM PDT 24 |
39674808 ps |
T964 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.371532420 |
|
|
Mar 24 12:55:55 PM PDT 24 |
Mar 24 12:55:57 PM PDT 24 |
44257399 ps |
T965 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3538050325 |
|
|
Mar 24 12:55:47 PM PDT 24 |
Mar 24 12:55:48 PM PDT 24 |
132782022 ps |
T966 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.3443699059 |
|
|
Mar 24 12:56:34 PM PDT 24 |
Mar 24 12:56:35 PM PDT 24 |
69113865 ps |
T967 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.3972309772 |
|
|
Mar 24 12:56:50 PM PDT 24 |
Mar 24 12:56:51 PM PDT 24 |
18221201 ps |
T968 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.1067321176 |
|
|
Mar 24 12:56:53 PM PDT 24 |
Mar 24 12:56:54 PM PDT 24 |
27803100 ps |
T969 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.792369993 |
|
|
Mar 24 12:55:55 PM PDT 24 |
Mar 24 12:55:57 PM PDT 24 |
83094111 ps |
T970 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.1393330095 |
|
|
Mar 24 12:56:21 PM PDT 24 |
Mar 24 12:56:23 PM PDT 24 |
135760095 ps |
T971 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.1166228990 |
|
|
Mar 24 12:56:16 PM PDT 24 |
Mar 24 12:56:18 PM PDT 24 |
17867746 ps |
T972 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.211040927 |
|
|
Mar 24 12:56:05 PM PDT 24 |
Mar 24 12:56:07 PM PDT 24 |
96337119 ps |
T973 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.1299755887 |
|
|
Mar 24 12:55:29 PM PDT 24 |
Mar 24 12:55:30 PM PDT 24 |
23201398 ps |
T103 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1984125243 |
|
|
Mar 24 12:56:17 PM PDT 24 |
Mar 24 12:56:20 PM PDT 24 |
196105311 ps |
T974 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.838563453 |
|
|
Mar 24 12:55:28 PM PDT 24 |
Mar 24 12:55:29 PM PDT 24 |
52381117 ps |
T975 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.3410180985 |
|
|
Mar 24 12:56:21 PM PDT 24 |
Mar 24 12:56:22 PM PDT 24 |
41437155 ps |
T106 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.3333086263 |
|
|
Mar 24 12:55:45 PM PDT 24 |
Mar 24 12:55:48 PM PDT 24 |
96046719 ps |
T976 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.4100456225 |
|
|
Mar 24 12:55:26 PM PDT 24 |
Mar 24 12:55:28 PM PDT 24 |
128369282 ps |
T977 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3553572962 |
|
|
Mar 24 12:55:25 PM PDT 24 |
Mar 24 12:55:26 PM PDT 24 |
35973958 ps |
T978 |
/workspace/coverage/cover_reg_top/42.clkmgr_intr_test.2551171108 |
|
|
Mar 24 12:56:50 PM PDT 24 |
Mar 24 12:56:51 PM PDT 24 |
40244404 ps |
T979 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.2929905298 |
|
|
Mar 24 12:56:11 PM PDT 24 |
Mar 24 12:56:13 PM PDT 24 |
12800767 ps |
T980 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.4203896849 |
|
|
Mar 24 12:56:18 PM PDT 24 |
Mar 24 12:56:20 PM PDT 24 |
132994527 ps |
T109 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.1477886811 |
|
|
Mar 24 12:56:35 PM PDT 24 |
Mar 24 12:56:37 PM PDT 24 |
246391150 ps |
T981 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.2362807946 |
|
|
Mar 24 12:56:40 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
19985847 ps |
T134 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.2455771841 |
|
|
Mar 24 12:56:16 PM PDT 24 |
Mar 24 12:56:19 PM PDT 24 |
299948005 ps |
T982 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1661070926 |
|
|
Mar 24 12:55:38 PM PDT 24 |
Mar 24 12:55:39 PM PDT 24 |
26457759 ps |
T983 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3676043600 |
|
|
Mar 24 12:55:49 PM PDT 24 |
Mar 24 12:56:08 PM PDT 24 |
4778647663 ps |
T984 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3555213115 |
|
|
Mar 24 12:55:26 PM PDT 24 |
Mar 24 12:55:28 PM PDT 24 |
119390781 ps |
T985 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3232733316 |
|
|
Mar 24 12:56:23 PM PDT 24 |
Mar 24 12:56:24 PM PDT 24 |
91353744 ps |
T986 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.2123648285 |
|
|
Mar 24 12:56:09 PM PDT 24 |
Mar 24 12:56:11 PM PDT 24 |
30727230 ps |
T987 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.797122413 |
|
|
Mar 24 12:55:51 PM PDT 24 |
Mar 24 12:55:52 PM PDT 24 |
17092519 ps |
T988 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.332442493 |
|
|
Mar 24 12:56:35 PM PDT 24 |
Mar 24 12:56:37 PM PDT 24 |
185208587 ps |
T989 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.4188437431 |
|
|
Mar 24 12:56:44 PM PDT 24 |
Mar 24 12:56:45 PM PDT 24 |
201768928 ps |
T990 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.2445341552 |
|
|
Mar 24 12:56:55 PM PDT 24 |
Mar 24 12:56:56 PM PDT 24 |
21878417 ps |
T991 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.3614914023 |
|
|
Mar 24 12:56:43 PM PDT 24 |
Mar 24 12:56:44 PM PDT 24 |
62906498 ps |
T992 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2979536428 |
|
|
Mar 24 12:56:02 PM PDT 24 |
Mar 24 12:56:04 PM PDT 24 |
97852106 ps |
T993 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.1935022013 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:34 PM PDT 24 |
902968898 ps |
T994 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.3024684094 |
|
|
Mar 24 12:56:29 PM PDT 24 |
Mar 24 12:56:32 PM PDT 24 |
113194988 ps |
T123 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.2097099442 |
|
|
Mar 24 12:56:04 PM PDT 24 |
Mar 24 12:56:06 PM PDT 24 |
227281936 ps |
T995 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.4075391609 |
|
|
Mar 24 12:56:16 PM PDT 24 |
Mar 24 12:56:18 PM PDT 24 |
97774402 ps |
T996 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.638125160 |
|
|
Mar 24 12:56:52 PM PDT 24 |
Mar 24 12:56:53 PM PDT 24 |
37727240 ps |
T997 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1632606557 |
|
|
Mar 24 12:56:44 PM PDT 24 |
Mar 24 12:56:46 PM PDT 24 |
144757281 ps |
T998 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.3214439412 |
|
|
Mar 24 12:56:35 PM PDT 24 |
Mar 24 12:56:36 PM PDT 24 |
52019071 ps |
T999 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.2907914 |
|
|
Mar 24 12:56:49 PM PDT 24 |
Mar 24 12:56:50 PM PDT 24 |
132747369 ps |
T1000 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.3922420420 |
|
|
Mar 24 12:56:40 PM PDT 24 |
Mar 24 12:56:41 PM PDT 24 |
18026883 ps |