Unified Coverage Report :: Group :: tb.dut.u_edn_cov_if::edn_cs_cmds_cg

Group : tb.dut.u_edn_cov_if::edn_cs_cmds_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_edn_cov_0/edn_cov_if.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
edn_cs_cmds_cg	100.00	1	100	1	64	64

---

Group Instance : edn_cs_cmds_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn_cs_cmds_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance edn_cs_cmds_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_clen	2	0	2	100.00	100	1	1	0
cp_flags	2	0	2	100.00	100	1	1	0
cp_glen	2	0	2	100.00	100	1	1	0

Crosses for Group Instance edn_cs_cmds_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_clen_flags_glen	8	0	8	100.00	100	1	1	0

Summary for Variable cp_clen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_clen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

some_cmd_data

2534

1

T3

4

T4

3

T14

2

no_cmd_data

624

1

T4

1

T15

6

T17

2

---

Summary for Variable cp_flags

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_flags

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

true

1626

1

T3

1

T4

3

T14

1

false

1532

1

T3

3

T4

1

T14

1

---

Summary for Variable cp_glen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_glen

Excluded/Illegal bins

NAME	COUNT	STATUS
zero	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

multiple

1328

1

T3

3

T4

1

T14

1

one

186

1

T3

1

T4

2

T5

2

---

Summary for Cross cr_clen_flags_glen

Samples crossed: cp_clen cp_flags cp_glen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for cr_clen_flags_glen

Bins

cp_clen	cp_flags	cp_glen	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
some_cmd_data	true	multiple	568	1			T3	1		T14	1		T15	18
some_cmd_data	true	one	78	1			T4	1		T5	1		T27	1
some_cmd_data	false	multiple	500	1			T3	2		T15	5		T17	2
some_cmd_data	false	one	78	1			T3	1		T4	1		T5	1
no_cmd_data	true	multiple	125	1			T4	1		T15	1		T24	1
no_cmd_data	true	one	16	1			T28	1		T54	1		T269	1
no_cmd_data	false	multiple	135	1			T15	2		T37	2		T20	4
no_cmd_data	false	one	14	1			T6	1		T54	1		T146	1