Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	589581	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5248691

1

T1

88

T2

11

T3

60

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1514557	1			T1	251		T2	43		T3	36
values[0x0]	2002484	1			T1	9		T2	10		T3	31
values[0x1]	2321231	1			T1	13		T2	2		T3	30

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	283842	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5554430

1

T1

134

T2

23

T3

73

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	23675	1			T1	1		T15	350		T17	2
valid_sources[0x01]	22555	1			T2	2		T15	415		T17	3
valid_sources[0x02]	23433	1			T1	1		T15	484		T17	1
valid_sources[0x03]	21585	1			T1	1		T15	397		T17	1
valid_sources[0x04]	22333	1			T1	3		T2	1		T15	453
valid_sources[0x05]	23276	1			T15	395		T17	2		T20	623
valid_sources[0x06]	22504	1			T1	1		T2	1		T15	453
valid_sources[0x07]	23133	1			T2	3		T15	421		T17	3
valid_sources[0x08]	22926	1			T1	3		T15	365		T17	4
valid_sources[0x09]	22326	1			T2	1		T4	1		T15	436
valid_sources[0x0a]	22058	1			T1	5		T15	411		T17	3
valid_sources[0x0b]	21843	1			T1	1		T15	492		T17	5
valid_sources[0x0c]	22458	1			T1	2		T4	1		T15	422
valid_sources[0x0d]	21140	1			T2	1		T15	508		T17	2
valid_sources[0x0e]	22339	1			T15	455		T17	3		T20	706
valid_sources[0x0f]	22942	1			T1	3		T15	522		T17	4
valid_sources[0x10]	21603	1			T15	408		T17	3		T24	1
valid_sources[0x11]	22093	1			T15	479		T17	3		T5	1
valid_sources[0x12]	22093	1			T15	471		T17	6		T5	2
valid_sources[0x13]	23397	1			T15	395		T17	3		T39	1
valid_sources[0x14]	23814	1			T15	476		T17	3		T5	1
valid_sources[0x15]	23391	1			T1	4		T15	387		T17	1
valid_sources[0x16]	22694	1			T2	2		T15	405		T17	3
valid_sources[0x17]	24327	1			T1	3		T4	1		T15	413
valid_sources[0x18]	21800	1			T15	485		T17	4		T20	527
valid_sources[0x19]	23553	1			T1	3		T15	461		T17	4
valid_sources[0x1a]	23400	1			T2	1		T15	388		T17	1
valid_sources[0x1b]	22385	1			T15	498		T17	3		T24	1
valid_sources[0x1c]	22867	1			T2	1		T15	546		T5	1
valid_sources[0x1d]	22689	1			T4	1		T15	417		T17	4
valid_sources[0x1e]	22588	1			T3	97		T15	415		T17	2
valid_sources[0x1f]	24077	1			T15	431		T17	2		T46	1
valid_sources[0x20]	23243	1			T4	1		T15	457		T20	542
valid_sources[0x21]	22499	1			T15	392		T17	2		T20	669
valid_sources[0x22]	21095	1			T1	2		T4	1		T15	404
valid_sources[0x23]	23469	1			T14	265		T15	466		T17	5
valid_sources[0x24]	22332	1			T4	1		T15	458		T17	3
valid_sources[0x25]	21926	1			T1	1		T2	1		T15	430
valid_sources[0x26]	22213	1			T1	2		T15	437		T17	2
valid_sources[0x27]	22589	1			T1	3		T4	1		T15	443
valid_sources[0x28]	22685	1			T1	1		T15	343		T5	1
valid_sources[0x29]	23187	1			T1	2		T4	1		T15	443
valid_sources[0x2a]	24737	1			T1	1		T14	1		T15	489
valid_sources[0x2b]	23252	1			T15	444		T17	5		T37	2
valid_sources[0x2c]	22819	1			T15	539		T17	11		T20	662
valid_sources[0x2d]	22017	1			T15	416		T17	3		T5	1
valid_sources[0x2e]	22629	1			T1	3		T15	456		T17	2
valid_sources[0x2f]	22325	1			T15	429		T17	3		T5	2
valid_sources[0x30]	24152	1			T12	1		T15	409		T17	2
valid_sources[0x31]	22872	1			T1	2		T4	2		T15	468
valid_sources[0x32]	22167	1			T1	1		T2	1		T15	490
valid_sources[0x33]	22640	1			T15	472		T20	529		T69	1
valid_sources[0x34]	23754	1			T1	3		T15	464		T46	1
valid_sources[0x35]	23044	1			T15	388		T17	1		T37	2
valid_sources[0x36]	23020	1			T15	392		T17	1		T20	645
valid_sources[0x37]	24437	1			T1	1		T12	1		T15	428
valid_sources[0x38]	23856	1			T1	3		T15	351		T17	1
valid_sources[0x39]	22220	1			T15	366		T17	4		T20	578
valid_sources[0x3a]	23839	1			T1	2		T2	2		T15	439
valid_sources[0x3b]	22988	1			T1	1		T15	393		T17	2
valid_sources[0x3c]	22520	1			T1	6		T15	415		T17	5
valid_sources[0x3d]	23703	1			T1	1		T2	2		T4	1
valid_sources[0x3e]	22896	1			T15	434		T17	3		T39	1
valid_sources[0x3f]	23787	1			T1	1		T15	404		T17	1
valid_sources[0x40]	22311	1			T1	2		T2	2		T15	381
valid_sources[0x41]	22364	1			T15	381		T17	4		T20	687
valid_sources[0x42]	21722	1			T1	3		T12	1		T15	467
valid_sources[0x43]	22393	1			T1	3		T14	1		T15	418
valid_sources[0x44]	23450	1			T1	6		T15	362		T17	2
valid_sources[0x45]	22938	1			T1	1		T15	403		T17	3
valid_sources[0x46]	23515	1			T1	1		T15	442		T17	2
valid_sources[0x47]	23260	1			T15	343		T17	4		T20	723
valid_sources[0x48]	23250	1			T1	2		T15	432		T17	3
valid_sources[0x49]	21857	1			T4	1		T15	396		T17	1
valid_sources[0x4a]	23435	1			T1	2		T12	1		T15	462
valid_sources[0x4b]	23735	1			T1	3		T4	1		T15	423
valid_sources[0x4c]	22355	1			T15	381		T17	2		T20	670
valid_sources[0x4d]	23306	1			T1	1		T4	2		T15	378
valid_sources[0x4e]	22182	1			T15	408		T17	2		T47	43
valid_sources[0x4f]	23326	1			T14	1		T15	396		T17	4
valid_sources[0x50]	22508	1			T15	465		T17	2		T5	1
valid_sources[0x51]	22126	1			T15	469		T17	5		T20	643
valid_sources[0x52]	23334	1			T1	3		T15	410		T17	1
valid_sources[0x53]	22162	1			T15	519		T17	6		T20	590
valid_sources[0x54]	22815	1			T1	4		T12	2		T15	368
valid_sources[0x55]	24726	1			T1	1		T12	2		T15	487
valid_sources[0x56]	21983	1			T15	426		T17	1		T20	654
valid_sources[0x57]	22080	1			T1	1		T15	377		T17	4
valid_sources[0x58]	22529	1			T15	520		T17	3		T20	626
valid_sources[0x59]	23042	1			T15	369		T17	6		T27	2
valid_sources[0x5a]	21742	1			T15	470		T5	1		T48	1
valid_sources[0x5b]	23645	1			T1	4		T4	2		T15	390
valid_sources[0x5c]	22354	1			T1	2		T15	405		T17	3
valid_sources[0x5d]	22684	1			T15	495		T17	5		T24	1
valid_sources[0x5e]	21846	1			T15	375		T17	4		T20	560
valid_sources[0x5f]	22581	1			T12	1		T15	463		T17	2
valid_sources[0x60]	22957	1			T15	451		T17	4		T20	608
valid_sources[0x61]	22947	1			T1	2		T12	1		T15	510
valid_sources[0x62]	22472	1			T1	1		T15	500		T17	1
valid_sources[0x63]	22614	1			T1	2		T15	444		T17	6
valid_sources[0x64]	22109	1			T1	4		T15	448		T17	1
valid_sources[0x65]	22008	1			T15	356		T17	1		T5	2
valid_sources[0x66]	23042	1			T1	1		T15	435		T17	4
valid_sources[0x67]	22198	1			T1	3		T4	1		T15	445
valid_sources[0x68]	22674	1			T12	1		T15	477		T17	5
valid_sources[0x69]	23588	1			T1	1		T14	1		T15	451
valid_sources[0x6a]	23583	1			T15	393		T17	2		T24	1
valid_sources[0x6b]	23511	1			T14	1		T15	436		T17	2
valid_sources[0x6c]	23184	1			T1	4		T12	1		T15	385
valid_sources[0x6d]	21832	1			T1	4		T15	425		T17	2
valid_sources[0x6e]	23060	1			T1	3		T15	465		T17	3
valid_sources[0x6f]	23323	1			T15	402		T17	7		T5	4
valid_sources[0x70]	21972	1			T2	2		T15	349		T17	1
valid_sources[0x71]	23171	1			T1	1		T15	463		T17	4
valid_sources[0x72]	23311	1			T1	3		T15	432		T17	1
valid_sources[0x73]	22538	1			T15	426		T17	2		T50	17
valid_sources[0x74]	24216	1			T1	1		T15	462		T17	7
valid_sources[0x75]	22617	1			T15	368		T17	2		T5	1
valid_sources[0x76]	22974	1			T1	2		T15	417		T17	2
valid_sources[0x77]	23275	1			T1	4		T15	430		T17	3
valid_sources[0x78]	22051	1			T1	1		T2	4		T15	418
valid_sources[0x79]	22855	1			T1	1		T15	381		T17	1
valid_sources[0x7a]	22734	1			T15	382		T17	1		T20	591
valid_sources[0x7b]	22955	1			T1	1		T14	1		T15	501
valid_sources[0x7c]	22295	1			T1	1		T15	498		T17	2
valid_sources[0x7d]	23396	1			T4	2		T15	405		T17	3
valid_sources[0x7e]	23717	1			T4	2		T15	454		T17	2
valid_sources[0x7f]	23234	1			T15	414		T17	4		T20	653
valid_sources[0x80]	22212	1			T12	1		T15	399		T17	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1322460

1

T1

78

T2

2

T3

2

values[0x0]

all_enables

biggest_size

1962792

1

T1

6

T2

8

T3

30

values[0x1]

all_enables

biggest_size

1963439

1

T1

4

T2

1

T3

28