Group : tb.dut.u_edn_cov_if::edn_error_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tb.dut.u_edn_cov_if::edn_error_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
55.56 55.56 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_edn_cov_0/edn_cov_if.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
edn_error_cg 55.56 1 100 1 64 64




Group Instance : edn_error_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
55.56 1 100 1 64 64




Summary for Group Instance edn_error_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 9 4 5 55.56


Variables for Group Instance edn_error_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_error_test 9 4 5 55.56 100 1 1 0


Summary for Variable cp_error_test

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 9 4 5 55.56


Automatically Generated Bins for cp_error_test

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
auto[EdnSfifoGencmdErrTest] 0 1 1
auto[EdnSfifoOutputErrTest] 0 1 1
auto[EdnFifoReadErrTest] 0 1 1
auto[EdnFifoStateErrTest] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[EdnSfifoRescmdErrTest] 2 1 T86 1 T87 1 - -
auto[EdnAckSmErrTest] 660 1 T2 1 T25 1 T6 1
auto[EdnMainSmErrTest] 660 1 T2 1 T25 1 T6 1
auto[EdnCntrErrTest] 36 1 T2 1 T7 1 T43 1
auto[EdnFifoWriteErrTest] 2 1 T86 1 T87 1 - -

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