Unified Coverage Report :: Group :: tb.dut.u_edn_cov_if::edn_error_cg

Group : tb.dut.u_edn_cov_if::edn_error_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
66.67	66.67	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_edn_cov_0/edn_cov_if.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
edn_error_cg	66.67	1	100	1	64	64

---

Group Instance : edn_error_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
66.67	1	100	1	64	64

---

Summary for Group Instance edn_error_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	3	6	66.67

Variables for Group Instance edn_error_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_error_test	9	3	6	66.67	100	1	1	0

Summary for Variable cp_error_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	9	3	6	66.67

Automatically Generated Bins for cp_error_test

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
auto[EdnSfifoOutputErrTest]	0	1	1
auto[EdnFifoReadErrTest]	0	1	1
auto[EdnFifoStateErrTest]	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[EdnSfifoRescmdErrTest]	2	1			T95	1		T115	1		-	-
auto[EdnSfifoGencmdErrTest]	4	1			T52	1		T114	1		T115	1
auto[EdnAckSmErrTest]	338	1			T4	1		T7	1		T70	1
auto[EdnMainSmErrTest]	338	1			T4	1		T7	1		T70	1
auto[EdnCntrErrTest]	29	1			T7	1		T15	1		T47	1
auto[EdnFifoWriteErrTest]	5	1			T52	1		T114	1		T95	1