Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(4,32'sh00000006,32'sh00000009)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(4,32'sh00000006,32'sh00000009)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

4 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.auto_req_mode	100.00	1	100	1	64	64
mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.boot_req_mode	100.00	1	100	1	64	64
mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.cmd_fifo_rst	100.00	1	100	1	64	64
mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.edn_enable	100.00	1	100	1	64	64

---

Group Instance : mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.auto_req_mode

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.auto_req_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.auto_req_mode

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.boot_req_mode

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.boot_req_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.boot_req_mode

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.cmd_fifo_rst

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.cmd_fifo_rst

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.cmd_fifo_rst

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.edn_enable

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.edn_enable

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_edn_reg_block.ctrl.edn_enable

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	6	1			T134	1		T290	2		T291	2
others[1]	6	1			T130	2		T135	1		T292	1
others[2]	5	1			T133	1		T293	2		T294	1
others[3]	17	1			T20	2		T153	2		T110	2
false	1890	1			T1	1		T3	2		T12	3
true	581	1			T12	1		T9	5		T10	1

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	5	1			T152	2		T295	2		T296	1
others[1]	5	1			T19	2		T134	1		T297	2
others[2]	11	1			T133	1		T104	2		T105	2
others[3]	18	1			T71	2		T156	2		T135	1
false	2071	1			T1	1		T3	1		T12	4
true	395	1			T3	1		T25	1		T27	2

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	3	1			T289	1		T292	1		T298	1
others[1]	5	1			T154	1		T299	1		T300	1
others[2]	4	1			T155	1		T301	1		T302	1
others[3]	8	1			T133	1		T18	1		T134	1
false	1959	1			T1	1		T3	2		T12	3
true	526	1			T12	1		T9	2		T10	1

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	9	1			T289	1		T111	2		T294	1
others[1]	6	1			T133	1		T54	2		T151	2
others[2]	11	1			T72	2		T292	1		T298	1
others[3]	5	1			T135	1		T211	2		T303	2
false	1038	1			T12	2		T9	5		T10	2
true	1436	1			T1	1		T3	2		T12	2