Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	647643	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5234259

1

T1

8

T2

57

T3

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1557899	1			T1	24		T2	248		T3	26
values[0x0]	1999372	1			T1	6		T2	29		T3	3
values[0x1]	2324631	1			T1	4		T2	29		T3	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	321221	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5560681

1

T1

17

T2

131

T3

15

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22436	1			T4	1		T23	327		T24	432
valid_sources[0x01]	22637	1			T23	386		T24	393		T8	1
valid_sources[0x02]	22568	1			T2	1		T22	1		T23	372
valid_sources[0x03]	24143	1			T2	1		T23	342		T24	420
valid_sources[0x04]	22989	1			T2	2		T4	1		T23	300
valid_sources[0x05]	24178	1			T2	1		T41	1		T23	352
valid_sources[0x06]	23372	1			T2	1		T23	378		T26	2
valid_sources[0x07]	21729	1			T2	1		T33	1		T23	250
valid_sources[0x08]	23425	1			T2	2		T23	339		T40	1
valid_sources[0x09]	21816	1			T2	3		T22	1		T23	356
valid_sources[0x0a]	23453	1			T1	1		T2	1		T21	2
valid_sources[0x0b]	24337	1			T23	371		T24	381		T8	1
valid_sources[0x0c]	23670	1			T33	7		T23	301		T40	4
valid_sources[0x0d]	22244	1			T1	2		T2	1		T23	319
valid_sources[0x0e]	23566	1			T2	1		T23	297		T40	10
valid_sources[0x0f]	24623	1			T23	365		T24	436		T32	1
valid_sources[0x10]	22985	1			T2	2		T4	1		T41	1
valid_sources[0x11]	23762	1			T41	2		T23	307		T24	414
valid_sources[0x12]	22177	1			T1	1		T4	1		T23	298
valid_sources[0x13]	23272	1			T41	2		T23	305		T24	450
valid_sources[0x14]	24926	1			T2	2		T4	1		T41	1
valid_sources[0x15]	22794	1			T33	1		T23	311		T40	5
valid_sources[0x16]	23537	1			T23	353		T24	449		T152	1
valid_sources[0x17]	23616	1			T2	3		T23	354		T24	487
valid_sources[0x18]	23509	1			T1	1		T2	1		T33	1
valid_sources[0x19]	22745	1			T2	2		T41	1		T23	318
valid_sources[0x1a]	22761	1			T2	1		T27	6		T41	1
valid_sources[0x1b]	23423	1			T1	1		T2	2		T22	1
valid_sources[0x1c]	22116	1			T2	2		T21	1		T22	1
valid_sources[0x1d]	24682	1			T2	1		T41	1		T23	268
valid_sources[0x1e]	23556	1			T1	1		T2	3		T22	1
valid_sources[0x1f]	23685	1			T23	349		T40	1		T24	449
valid_sources[0x20]	22406	1			T1	1		T21	1		T33	3
valid_sources[0x21]	24178	1			T21	4		T33	5		T23	313
valid_sources[0x22]	25814	1			T1	1		T23	347		T40	3
valid_sources[0x23]	22324	1			T23	292		T24	383		T155	4
valid_sources[0x24]	21965	1			T21	2		T33	2		T23	343
valid_sources[0x25]	23381	1			T2	2		T23	277		T16	1
valid_sources[0x26]	23190	1			T2	2		T41	1		T23	346
valid_sources[0x27]	21939	1			T2	1		T33	6		T41	1
valid_sources[0x28]	23316	1			T4	1		T23	285		T40	10
valid_sources[0x29]	21148	1			T2	2		T31	2		T23	300
valid_sources[0x2a]	22531	1			T23	307		T24	436		T153	2
valid_sources[0x2b]	22954	1			T2	1		T23	315		T24	438
valid_sources[0x2c]	22593	1			T2	1		T41	1		T23	366
valid_sources[0x2d]	23673	1			T2	1		T23	332		T26	1
valid_sources[0x2e]	23793	1			T2	1		T5	43		T23	296
valid_sources[0x2f]	22336	1			T2	1		T23	280		T26	1
valid_sources[0x30]	23952	1			T1	1		T2	1		T22	2
valid_sources[0x31]	23374	1			T1	1		T4	2		T41	1
valid_sources[0x32]	22767	1			T2	1		T23	299		T16	1
valid_sources[0x33]	23768	1			T2	1		T31	1		T23	335
valid_sources[0x34]	23023	1			T2	1		T23	294		T16	1
valid_sources[0x35]	22735	1			T1	1		T2	2		T4	1
valid_sources[0x36]	23542	1			T33	2		T23	339		T24	439
valid_sources[0x37]	22653	1			T2	2		T33	1		T23	334
valid_sources[0x38]	22193	1			T2	1		T33	1		T41	1
valid_sources[0x39]	22272	1			T4	2		T23	339		T40	3
valid_sources[0x3a]	22602	1			T2	3		T41	1		T23	312
valid_sources[0x3b]	23928	1			T2	1		T22	1		T23	301
valid_sources[0x3c]	21287	1			T22	1		T23	299		T26	3
valid_sources[0x3d]	23434	1			T2	1		T21	9		T41	3
valid_sources[0x3e]	22146	1			T2	1		T23	291		T16	1
valid_sources[0x3f]	23307	1			T2	3		T23	380		T26	4
valid_sources[0x40]	22463	1			T21	1		T22	1		T33	7
valid_sources[0x41]	22420	1			T1	1		T2	1		T33	1
valid_sources[0x42]	22793	1			T2	1		T23	280		T24	468
valid_sources[0x43]	23023	1			T2	2		T4	2		T41	1
valid_sources[0x44]	23432	1			T2	3		T21	1		T41	1
valid_sources[0x45]	23153	1			T2	1		T33	1		T23	320
valid_sources[0x46]	22901	1			T2	2		T22	1		T41	1
valid_sources[0x47]	23120	1			T2	1		T23	306		T26	2
valid_sources[0x48]	22129	1			T23	341		T16	1		T24	388
valid_sources[0x49]	23062	1			T2	1		T23	321		T26	1
valid_sources[0x4a]	23176	1			T33	1		T41	1		T23	290
valid_sources[0x4b]	23609	1			T2	1		T33	1		T23	302
valid_sources[0x4c]	22895	1			T2	1		T23	359		T16	2
valid_sources[0x4d]	23657	1			T23	300		T24	450		T153	2
valid_sources[0x4e]	23047	1			T1	1		T2	3		T23	394
valid_sources[0x4f]	22439	1			T23	318		T24	410		T153	2
valid_sources[0x50]	23707	1			T2	1		T23	375		T16	1
valid_sources[0x51]	22376	1			T4	1		T23	291		T24	419
valid_sources[0x52]	22345	1			T2	1		T41	1		T23	313
valid_sources[0x53]	22403	1			T2	2		T21	1		T23	268
valid_sources[0x54]	23260	1			T2	3		T23	350		T24	397
valid_sources[0x55]	22392	1			T1	1		T23	338		T40	9
valid_sources[0x56]	21902	1			T2	2		T41	2		T23	263
valid_sources[0x57]	22247	1			T1	1		T2	1		T21	1
valid_sources[0x58]	21830	1			T2	2		T21	4		T41	1
valid_sources[0x59]	22259	1			T1	1		T2	2		T23	329
valid_sources[0x5a]	24667	1			T23	350		T16	1		T24	435
valid_sources[0x5b]	22725	1			T21	1		T23	317		T16	1
valid_sources[0x5c]	22465	1			T2	2		T23	350		T24	423
valid_sources[0x5d]	22724	1			T41	1		T23	266		T16	1
valid_sources[0x5e]	23019	1			T2	2		T4	1		T23	413
valid_sources[0x5f]	23011	1			T22	1		T23	249		T16	4
valid_sources[0x60]	24333	1			T2	3		T41	1		T23	341
valid_sources[0x61]	22563	1			T2	1		T21	3		T23	292
valid_sources[0x62]	24151	1			T2	2		T23	310		T26	3
valid_sources[0x63]	22519	1			T23	313		T26	1		T24	432
valid_sources[0x64]	22736	1			T2	3		T23	363		T26	1
valid_sources[0x65]	23712	1			T2	2		T22	2		T23	371
valid_sources[0x66]	24563	1			T2	2		T22	2		T41	1
valid_sources[0x67]	21843	1			T2	1		T41	1		T23	306
valid_sources[0x68]	21961	1			T21	2		T23	291		T26	1
valid_sources[0x69]	21415	1			T2	1		T23	311		T24	437
valid_sources[0x6a]	23289	1			T2	1		T22	1		T23	308
valid_sources[0x6b]	23683	1			T33	1		T23	268		T24	468
valid_sources[0x6c]	23950	1			T2	1		T22	1		T41	2
valid_sources[0x6d]	21910	1			T2	1		T4	1		T23	260
valid_sources[0x6e]	23266	1			T2	1		T23	337		T26	2
valid_sources[0x6f]	23252	1			T2	2		T23	344		T16	1
valid_sources[0x70]	23011	1			T1	1		T2	1		T23	216
valid_sources[0x71]	22199	1			T2	3		T41	1		T23	305
valid_sources[0x72]	24193	1			T2	1		T23	329		T24	479
valid_sources[0x73]	23478	1			T2	2		T4	1		T23	372
valid_sources[0x74]	22585	1			T2	2		T23	315		T16	1
valid_sources[0x75]	23791	1			T23	344		T26	4		T16	1
valid_sources[0x76]	24128	1			T1	1		T2	3		T41	2
valid_sources[0x77]	22640	1			T2	2		T21	1		T23	364
valid_sources[0x78]	22843	1			T2	2		T21	1		T41	1
valid_sources[0x79]	23451	1			T4	1		T23	319		T24	413
valid_sources[0x7a]	22239	1			T2	2		T23	289		T24	498
valid_sources[0x7b]	23767	1			T1	1		T41	1		T23	328
valid_sources[0x7c]	22832	1			T2	3		T22	1		T33	1
valid_sources[0x7d]	21322	1			T2	2		T23	327		T24	426
valid_sources[0x7e]	23857	1			T2	1		T23	301		T24	453
valid_sources[0x7f]	22665	1			T21	3		T23	274		T26	3
valid_sources[0x80]	22615	1			T2	1		T23	335		T16	8

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1317297

1

T1

3

T2

5

T3

4

values[0x0]

all_enables

biggest_size

1958817

1

T1

3

T2

27

T3

1

values[0x1]

all_enables

biggest_size

1958145

1

T1

2

T2

25

T3

3