Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	683988	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5726363

1

T1

104

T2

26

T3

309720

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1678659	1			T1	146		T2	41		T3	86653
values[0x0]	2188124	1			T1	51		T2	13		T3	117672
values[0x1]	2543568	1			T1	63		T2	11		T3	137206

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	331960	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

6078391

1

T1

143

T2

39

T3

327483

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	24250	1			T3	1221		T5	2		T22	409
valid_sources[0x01]	24501	1			T3	1382		T22	401		T23	622
valid_sources[0x02]	24906	1			T3	1231		T30	1		T31	1
valid_sources[0x03]	24731	1			T3	1288		T5	1		T22	467
valid_sources[0x04]	24419	1			T3	1331		T5	1		T31	2
valid_sources[0x05]	25644	1			T3	1370		T31	1		T22	396
valid_sources[0x06]	25990	1			T3	1655		T4	2		T5	1
valid_sources[0x07]	25089	1			T3	1348		T31	3		T22	369
valid_sources[0x08]	25228	1			T3	1182		T31	1		T22	438
valid_sources[0x09]	25816	1			T3	1392		T31	1		T22	388
valid_sources[0x0a]	25918	1			T3	1311		T5	1		T30	1
valid_sources[0x0b]	25218	1			T3	1297		T22	390		T23	646
valid_sources[0x0c]	25437	1			T3	1397		T31	1		T22	434
valid_sources[0x0d]	26215	1			T1	11		T3	1416		T30	1
valid_sources[0x0e]	26890	1			T3	1504		T30	1		T22	425
valid_sources[0x0f]	26354	1			T2	5		T3	1396		T21	3
valid_sources[0x10]	25176	1			T3	1231		T22	426		T23	623
valid_sources[0x11]	26747	1			T3	1213		T21	1		T30	1
valid_sources[0x12]	24016	1			T3	1220		T5	2		T22	413
valid_sources[0x13]	25197	1			T3	1328		T22	409		T23	599
valid_sources[0x14]	25481	1			T3	1331		T22	418		T23	594
valid_sources[0x15]	25094	1			T3	1357		T22	471		T23	590
valid_sources[0x16]	25997	1			T3	1124		T22	375		T23	665
valid_sources[0x17]	26298	1			T3	1307		T5	1		T22	419
valid_sources[0x18]	25620	1			T3	1407		T5	1		T22	401
valid_sources[0x19]	25176	1			T1	8		T3	1421		T5	1
valid_sources[0x1a]	24526	1			T3	1309		T5	1		T25	1
valid_sources[0x1b]	25517	1			T3	1394		T4	2		T30	1
valid_sources[0x1c]	25310	1			T3	1308		T30	1		T22	411
valid_sources[0x1d]	24066	1			T3	1296		T13	271		T30	2
valid_sources[0x1e]	24406	1			T3	1310		T22	388		T23	634
valid_sources[0x1f]	24771	1			T1	5		T3	1340		T22	450
valid_sources[0x20]	23260	1			T1	10		T3	1088		T4	1
valid_sources[0x21]	23416	1			T3	1191		T21	1		T22	421
valid_sources[0x22]	24477	1			T3	1315		T4	1		T22	398
valid_sources[0x23]	24973	1			T3	1270		T22	381		T23	625
valid_sources[0x24]	24918	1			T3	1324		T31	1		T22	448
valid_sources[0x25]	24261	1			T3	1406		T30	1		T22	445
valid_sources[0x26]	25288	1			T3	1315		T22	419		T23	617
valid_sources[0x27]	24684	1			T3	1390		T31	1		T22	454
valid_sources[0x28]	24627	1			T3	1227		T21	1		T5	1
valid_sources[0x29]	23363	1			T3	1545		T22	438		T23	606
valid_sources[0x2a]	25897	1			T3	1246		T21	1		T22	412
valid_sources[0x2b]	25312	1			T3	1320		T30	1		T22	469
valid_sources[0x2c]	23722	1			T1	20		T3	1194		T22	404
valid_sources[0x2d]	25726	1			T3	1201		T21	2		T5	1
valid_sources[0x2e]	24977	1			T3	1325		T5	1		T30	1
valid_sources[0x2f]	23917	1			T3	1251		T31	1		T22	377
valid_sources[0x30]	24729	1			T3	1410		T5	1		T22	426
valid_sources[0x31]	24647	1			T3	1123		T21	1		T22	466
valid_sources[0x32]	24707	1			T3	1482		T22	456		T23	690
valid_sources[0x33]	23914	1			T3	1235		T22	486		T23	679
valid_sources[0x34]	25482	1			T3	1257		T21	1		T31	1
valid_sources[0x35]	26568	1			T3	1394		T30	1		T22	398
valid_sources[0x36]	24464	1			T3	1393		T31	1		T22	409
valid_sources[0x37]	25121	1			T3	1455		T22	413		T23	646
valid_sources[0x38]	24545	1			T3	1267		T31	1		T22	424
valid_sources[0x39]	24214	1			T3	1346		T30	1		T22	381
valid_sources[0x3a]	26468	1			T1	12		T3	1343		T31	1
valid_sources[0x3b]	23573	1			T3	1318		T21	1		T4	2
valid_sources[0x3c]	24362	1			T3	1302		T30	1		T31	1
valid_sources[0x3d]	23577	1			T3	1225		T5	1		T22	413
valid_sources[0x3e]	24961	1			T1	11		T3	1293		T22	421
valid_sources[0x3f]	23879	1			T3	1373		T5	1		T22	434
valid_sources[0x40]	26357	1			T3	1334		T30	2		T22	438
valid_sources[0x41]	24873	1			T3	1394		T31	1		T22	410
valid_sources[0x42]	25777	1			T3	1290		T30	1		T31	1
valid_sources[0x43]	24363	1			T3	1332		T30	1		T22	384
valid_sources[0x44]	26719	1			T1	18		T3	1479		T21	1
valid_sources[0x45]	25331	1			T3	1304		T22	410		T23	660
valid_sources[0x46]	25286	1			T3	1463		T21	1		T22	411
valid_sources[0x47]	26176	1			T3	1320		T21	1		T5	1
valid_sources[0x48]	26299	1			T2	17		T3	1331		T22	440
valid_sources[0x49]	23634	1			T3	1397		T21	1		T30	1
valid_sources[0x4a]	24946	1			T3	1620		T30	1		T22	448
valid_sources[0x4b]	24425	1			T3	1303		T5	2		T30	1
valid_sources[0x4c]	25868	1			T3	1268		T30	5		T22	404
valid_sources[0x4d]	25003	1			T3	1271		T5	1		T31	1
valid_sources[0x4e]	24075	1			T3	1159		T5	1		T22	404
valid_sources[0x4f]	25307	1			T3	1458		T21	1		T30	1
valid_sources[0x50]	23042	1			T3	1292		T30	3		T22	400
valid_sources[0x51]	25289	1			T1	3		T3	1505		T31	1
valid_sources[0x52]	25352	1			T2	2		T3	1208		T5	1
valid_sources[0x53]	23998	1			T3	1250		T22	404		T23	624
valid_sources[0x54]	25286	1			T3	1313		T30	2		T22	428
valid_sources[0x55]	25114	1			T3	1404		T22	402		T23	575
valid_sources[0x56]	23922	1			T3	1203		T21	1		T5	2
valid_sources[0x57]	23566	1			T3	1180		T5	1		T31	1
valid_sources[0x58]	23609	1			T3	1281		T22	415		T23	669
valid_sources[0x59]	24710	1			T3	1285		T5	1		T22	384
valid_sources[0x5a]	23005	1			T3	1339		T30	1		T22	392
valid_sources[0x5b]	25420	1			T3	1461		T21	1		T22	415
valid_sources[0x5c]	26692	1			T3	1253		T22	414		T23	590
valid_sources[0x5d]	27050	1			T3	1319		T22	439		T23	637
valid_sources[0x5e]	26407	1			T3	1323		T31	1		T22	471
valid_sources[0x5f]	26442	1			T3	1461		T5	1		T30	1
valid_sources[0x60]	27193	1			T3	1401		T21	1		T25	2
valid_sources[0x61]	23903	1			T3	1401		T21	1		T30	1
valid_sources[0x62]	25312	1			T3	1197		T22	412		T23	598
valid_sources[0x63]	23845	1			T3	1399		T22	393		T23	647
valid_sources[0x64]	24229	1			T3	1332		T22	392		T23	638
valid_sources[0x65]	26080	1			T3	1379		T22	393		T23	600
valid_sources[0x66]	26090	1			T3	1298		T30	1		T22	475
valid_sources[0x67]	25173	1			T3	1262		T21	2		T30	2
valid_sources[0x68]	24774	1			T3	1433		T21	2		T30	1
valid_sources[0x69]	26043	1			T3	1321		T22	400		T23	643
valid_sources[0x6a]	26772	1			T1	34		T3	1320		T5	1
valid_sources[0x6b]	24654	1			T3	1269		T21	1		T22	418
valid_sources[0x6c]	26250	1			T3	1372		T30	1		T22	436
valid_sources[0x6d]	24966	1			T3	1330		T22	418		T23	662
valid_sources[0x6e]	23457	1			T3	1303		T5	1		T30	2
valid_sources[0x6f]	24818	1			T3	1383		T30	1		T22	448
valid_sources[0x70]	26508	1			T3	1320		T5	1		T22	406
valid_sources[0x71]	24404	1			T3	1167		T30	3		T22	450
valid_sources[0x72]	26266	1			T2	5		T3	1269		T22	387
valid_sources[0x73]	25370	1			T1	15		T3	1406		T22	417
valid_sources[0x74]	24432	1			T3	1298		T21	2		T30	2
valid_sources[0x75]	24932	1			T3	1220		T22	366		T23	607
valid_sources[0x76]	24621	1			T3	1397		T31	1		T22	435
valid_sources[0x77]	24792	1			T3	1302		T5	2		T30	2
valid_sources[0x78]	23243	1			T3	1076		T5	1		T30	1
valid_sources[0x79]	25787	1			T3	1359		T4	2		T22	443
valid_sources[0x7a]	24187	1			T3	1162		T4	1		T31	1
valid_sources[0x7b]	24093	1			T3	1429		T22	385		T23	620
valid_sources[0x7c]	24780	1			T3	1330		T4	2		T22	441
valid_sources[0x7d]	24266	1			T3	1264		T21	1		T22	377
valid_sources[0x7e]	24848	1			T3	1465		T22	417		T23	613
valid_sources[0x7f]	24083	1			T3	1348		T5	1		T22	436
valid_sources[0x80]	24316	1			T3	1261		T22	393		T23	661

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1441869

1

T1

42

T2

5

T3

78395

values[0x0]

all_enables

biggest_size

2145024

1

T1

28

T2

13

T3

115860

values[0x1]

all_enables

biggest_size

2139470

1

T1

34

T2

8

T3

115465