Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	665147	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5307696

1

T1

11

T2

40

T3

58

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1583866	1			T1	42		T2	98		T3	6
values[0x0]	2028763	1			T1	7		T2	19		T3	34
values[0x1]	2360214	1			T1	5		T2	21		T3	30

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	330404	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5642439

1

T1

27

T2

79

T3

62

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22427	1			T16	661		T17	287		T163	1
valid_sources[0x01]	23042	1			T7	6		T19	5		T23	1
valid_sources[0x02]	23029	1			T19	1		T44	1		T16	497
valid_sources[0x03]	24529	1			T19	3		T16	1094		T53	2
valid_sources[0x04]	23622	1			T2	2		T9	7		T19	2
valid_sources[0x05]	22763	1			T2	1		T7	2		T25	2
valid_sources[0x06]	23615	1			T2	4		T16	499		T17	343
valid_sources[0x07]	23413	1			T43	2		T16	832		T17	840
valid_sources[0x08]	22208	1			T1	1		T19	1		T44	1
valid_sources[0x09]	22403	1			T19	2		T16	144		T17	386
valid_sources[0x0a]	24062	1			T2	1		T19	2		T27	5
valid_sources[0x0b]	23506	1			T44	2		T16	817		T17	483
valid_sources[0x0c]	23474	1			T19	2		T16	1211		T17	1186
valid_sources[0x0d]	23080	1			T19	2		T44	1		T25	2
valid_sources[0x0e]	23985	1			T19	1		T16	1545		T17	171
valid_sources[0x0f]	24619	1			T19	4		T44	2		T16	1188
valid_sources[0x10]	24317	1			T2	2		T19	2		T27	1
valid_sources[0x11]	21827	1			T2	4		T19	4		T16	633
valid_sources[0x12]	23188	1			T7	1		T44	1		T27	2
valid_sources[0x13]	23271	1			T19	1		T16	584		T17	576
valid_sources[0x14]	25328	1			T3	3		T19	3		T16	936
valid_sources[0x15]	23823	1			T3	6		T19	2		T44	2
valid_sources[0x16]	22954	1			T19	2		T44	3		T23	1
valid_sources[0x17]	23584	1			T7	1		T19	1		T27	2
valid_sources[0x18]	22207	1			T1	1		T16	285		T53	1
valid_sources[0x19]	21875	1			T7	1		T19	2		T44	1
valid_sources[0x1a]	23738	1			T8	3		T19	2		T44	3
valid_sources[0x1b]	23961	1			T19	1		T27	7		T16	703
valid_sources[0x1c]	23698	1			T19	2		T27	1		T16	618
valid_sources[0x1d]	23148	1			T1	10		T3	1		T19	1
valid_sources[0x1e]	22309	1			T25	6		T43	1		T16	318
valid_sources[0x1f]	24318	1			T44	2		T16	467		T17	891
valid_sources[0x20]	25839	1			T19	3		T16	233		T17	731
valid_sources[0x21]	24179	1			T16	249		T17	199		T163	1
valid_sources[0x22]	22343	1			T19	3		T44	1		T16	242
valid_sources[0x23]	22767	1			T8	6		T16	840		T53	1
valid_sources[0x24]	23500	1			T19	2		T44	1		T16	896
valid_sources[0x25]	22942	1			T19	3		T16	767		T17	236
valid_sources[0x26]	22816	1			T3	1		T7	5		T19	3
valid_sources[0x27]	22615	1			T2	2		T25	7		T16	670
valid_sources[0x28]	22590	1			T1	1		T8	2		T19	2
valid_sources[0x29]	24279	1			T1	1		T19	1		T16	1324
valid_sources[0x2a]	23673	1			T1	4		T19	6		T16	877
valid_sources[0x2b]	23314	1			T27	1		T16	131		T53	2
valid_sources[0x2c]	23135	1			T19	1		T16	738		T17	683
valid_sources[0x2d]	23753	1			T19	1		T16	233		T17	720
valid_sources[0x2e]	25329	1			T19	1		T16	1812		T17	869
valid_sources[0x2f]	24003	1			T1	2		T19	3		T44	1
valid_sources[0x30]	21573	1			T19	3		T16	23		T17	290
valid_sources[0x31]	23056	1			T16	493		T53	1		T17	406
valid_sources[0x32]	22608	1			T1	1		T19	5		T16	787
valid_sources[0x33]	23059	1			T16	743		T17	606		T18	308
valid_sources[0x34]	25258	1			T44	2		T43	1		T16	1444
valid_sources[0x35]	24897	1			T2	1		T8	1		T19	3
valid_sources[0x36]	23723	1			T2	3		T19	2		T27	2
valid_sources[0x37]	22773	1			T3	1		T19	4		T21	1
valid_sources[0x38]	23772	1			T44	2		T23	1		T16	377
valid_sources[0x39]	23800	1			T44	2		T16	670		T17	656
valid_sources[0x3a]	22276	1			T2	10		T19	4		T43	2
valid_sources[0x3b]	22790	1			T2	22		T19	1		T16	608
valid_sources[0x3c]	24378	1			T19	1		T16	1006		T17	251
valid_sources[0x3d]	23659	1			T19	3		T16	467		T17	499
valid_sources[0x3e]	23585	1			T2	15		T19	2		T27	7
valid_sources[0x3f]	22566	1			T2	6		T3	1		T19	2
valid_sources[0x40]	21721	1			T16	499		T17	457		T163	1
valid_sources[0x41]	23454	1			T3	1		T7	4		T19	1
valid_sources[0x42]	24302	1			T2	2		T7	1		T19	1
valid_sources[0x43]	23793	1			T1	1		T3	5		T19	3
valid_sources[0x44]	23228	1			T3	1		T19	4		T16	526
valid_sources[0x45]	24011	1			T2	1		T19	6		T43	3
valid_sources[0x46]	23958	1			T19	2		T16	335		T17	501
valid_sources[0x47]	21899	1			T43	2		T16	248		T17	331
valid_sources[0x48]	22637	1			T7	1		T9	3		T19	2
valid_sources[0x49]	25021	1			T8	2		T9	6		T19	3
valid_sources[0x4a]	24367	1			T19	2		T44	1		T23	1
valid_sources[0x4b]	24979	1			T19	1		T23	2		T43	1
valid_sources[0x4c]	23463	1			T19	1		T25	4		T16	565
valid_sources[0x4d]	21850	1			T16	549		T17	264		T163	2
valid_sources[0x4e]	23788	1			T19	2		T43	1		T16	482
valid_sources[0x4f]	24794	1			T9	1		T19	2		T16	607
valid_sources[0x50]	21499	1			T19	3		T21	1		T16	442
valid_sources[0x51]	22715	1			T1	1		T9	7		T19	3
valid_sources[0x52]	23388	1			T19	3		T44	1		T16	198
valid_sources[0x53]	22647	1			T3	2		T7	2		T19	1
valid_sources[0x54]	22391	1			T44	1		T27	3		T16	479
valid_sources[0x55]	21770	1			T19	2		T16	399		T17	437
valid_sources[0x56]	23310	1			T16	382		T17	507		T18	394
valid_sources[0x57]	23163	1			T19	3		T16	1222		T17	276
valid_sources[0x58]	24638	1			T19	2		T16	782		T17	326
valid_sources[0x59]	22291	1			T16	116		T17	349		T163	1
valid_sources[0x5a]	23427	1			T19	2		T43	4		T16	545
valid_sources[0x5b]	23843	1			T44	1		T27	2		T16	836
valid_sources[0x5c]	23513	1			T19	1		T16	573		T17	448
valid_sources[0x5d]	24050	1			T19	2		T16	697		T17	809
valid_sources[0x5e]	23371	1			T43	1		T16	999		T17	873
valid_sources[0x5f]	22086	1			T7	1		T19	1		T16	160
valid_sources[0x60]	23007	1			T3	2		T19	1		T44	1
valid_sources[0x61]	23482	1			T43	2		T16	1163		T17	379
valid_sources[0x62]	22237	1			T2	7		T8	4		T9	2
valid_sources[0x63]	24980	1			T19	3		T16	516		T53	1
valid_sources[0x64]	22159	1			T19	1		T16	1152		T17	447
valid_sources[0x65]	23683	1			T2	2		T7	3		T19	1
valid_sources[0x66]	24038	1			T44	3		T16	1650		T17	552
valid_sources[0x67]	23830	1			T19	3		T44	3		T23	1
valid_sources[0x68]	23669	1			T19	2		T5	54		T43	1
valid_sources[0x69]	22791	1			T19	1		T16	337		T17	557
valid_sources[0x6a]	24320	1			T1	2		T19	1		T44	1
valid_sources[0x6b]	22352	1			T19	1		T16	492		T17	353
valid_sources[0x6c]	23685	1			T3	6		T19	4		T43	1
valid_sources[0x6d]	22986	1			T3	1		T19	1		T16	799
valid_sources[0x6e]	22321	1			T7	1		T19	4		T23	1
valid_sources[0x6f]	23377	1			T16	526		T17	536		T163	1
valid_sources[0x70]	23481	1			T3	1		T44	1		T16	687
valid_sources[0x71]	24443	1			T19	3		T16	697		T17	395
valid_sources[0x72]	23364	1			T1	1		T19	3		T16	794
valid_sources[0x73]	25824	1			T19	1		T21	1		T16	828
valid_sources[0x74]	24103	1			T2	1		T9	1		T19	5
valid_sources[0x75]	25247	1			T19	2		T16	2314		T17	286
valid_sources[0x76]	20445	1			T19	3		T16	312		T17	277
valid_sources[0x77]	23768	1			T7	9		T19	2		T44	2
valid_sources[0x78]	22385	1			T19	4		T44	1		T41	5
valid_sources[0x79]	23339	1			T19	2		T16	1162		T17	454
valid_sources[0x7a]	24323	1			T2	3		T44	1		T16	1103
valid_sources[0x7b]	21956	1			T3	1		T19	3		T16	327
valid_sources[0x7c]	22484	1			T19	2		T27	5		T16	376
valid_sources[0x7d]	23047	1			T7	2		T19	1		T25	1
valid_sources[0x7e]	23055	1			T19	5		T16	826		T17	405
valid_sources[0x7f]	23750	1			T1	3		T19	2		T16	396
valid_sources[0x80]	23429	1			T19	8		T21	1		T16	1257

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1339118

1

T1

4

T2

5

T3

1

values[0x0]

all_enables

biggest_size

1985890

1

T1

6

T2

15

T3

31

values[0x1]

all_enables

biggest_size

1982688

1

T1

1

T2

20

T3

26