Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	674008	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5763424

1

T1

15

T2

8

T3

41

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1678562	1			T1	69		T2	5		T3	69
values[0x0]	2201840	1			T1	8		T2	7		T3	23
values[0x1]	2557030	1			T1	7		T2	8		T3	18

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	326353	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

6111079

1

T1

34

T2

13

T3

58

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	24086	1			T1	1		T23	4		T38	1094
valid_sources[0x01]	25643	1			T9	2		T38	1197		T39	630
valid_sources[0x02]	24688	1			T1	1		T3	7		T9	3
valid_sources[0x03]	24745	1			T23	1		T38	855		T39	655
valid_sources[0x04]	25048	1			T23	1		T38	913		T39	652
valid_sources[0x05]	25725	1			T1	2		T23	1		T38	591
valid_sources[0x06]	25015	1			T3	3		T23	1		T38	667
valid_sources[0x07]	23895	1			T9	1		T38	939		T39	597
valid_sources[0x08]	26447	1			T1	1		T9	1		T23	2
valid_sources[0x09]	24468	1			T24	2		T38	902		T39	752
valid_sources[0x0a]	25211	1			T3	3		T23	3		T38	527
valid_sources[0x0b]	25095	1			T22	1		T9	1		T38	677
valid_sources[0x0c]	25257	1			T9	1		T38	823		T39	517
valid_sources[0x0d]	25725	1			T3	2		T38	1002		T39	771
valid_sources[0x0e]	24756	1			T23	1		T38	1169		T39	547
valid_sources[0x0f]	24855	1			T38	820		T39	445		T41	1
valid_sources[0x10]	25264	1			T23	2		T5	1		T38	718
valid_sources[0x11]	27165	1			T38	1000		T39	664		T41	2
valid_sources[0x12]	25772	1			T3	1		T38	1069		T39	572
valid_sources[0x13]	24300	1			T9	1		T23	5		T38	978
valid_sources[0x14]	25089	1			T1	1		T9	5		T23	2
valid_sources[0x15]	26789	1			T9	1		T38	1225		T39	558
valid_sources[0x16]	25611	1			T1	3		T2	1		T3	2
valid_sources[0x17]	25770	1			T1	1		T24	1		T38	902
valid_sources[0x18]	24013	1			T9	1		T23	2		T38	622
valid_sources[0x19]	26478	1			T9	2		T23	1		T38	816
valid_sources[0x1a]	26614	1			T38	1007		T39	976		T46	2
valid_sources[0x1b]	25271	1			T38	950		T39	445		T41	1
valid_sources[0x1c]	23766	1			T38	819		T39	576		T53	11
valid_sources[0x1d]	24728	1			T38	735		T39	697		T60	1
valid_sources[0x1e]	26335	1			T1	1		T23	1		T38	871
valid_sources[0x1f]	26034	1			T9	3		T23	2		T38	1041
valid_sources[0x20]	26387	1			T23	1		T38	899		T39	504
valid_sources[0x21]	24581	1			T38	617		T39	776		T80	12
valid_sources[0x22]	23268	1			T9	4		T38	878		T39	546
valid_sources[0x23]	24197	1			T1	2		T9	2		T23	1
valid_sources[0x24]	25189	1			T23	1		T38	943		T39	559
valid_sources[0x25]	25476	1			T9	1		T38	971		T39	761
valid_sources[0x26]	26125	1			T3	1		T9	3		T38	833
valid_sources[0x27]	24046	1			T3	1		T38	1022		T39	505
valid_sources[0x28]	25198	1			T9	1		T38	906		T39	560
valid_sources[0x29]	23684	1			T38	691		T39	689		T41	1
valid_sources[0x2a]	24358	1			T38	1005		T39	726		T46	3
valid_sources[0x2b]	24781	1			T9	1		T23	1		T38	916
valid_sources[0x2c]	23818	1			T2	1		T9	1		T23	2
valid_sources[0x2d]	25598	1			T1	2		T2	2		T23	2
valid_sources[0x2e]	24579	1			T38	1033		T39	708		T51	9
valid_sources[0x2f]	26467	1			T9	6		T23	1		T38	908
valid_sources[0x30]	24788	1			T3	4		T9	5		T38	1343
valid_sources[0x31]	26298	1			T23	6		T38	1103		T39	612
valid_sources[0x32]	25678	1			T23	1		T38	892		T39	617
valid_sources[0x33]	24480	1			T3	1		T9	1		T38	775
valid_sources[0x34]	26562	1			T9	1		T23	2		T38	946
valid_sources[0x35]	26139	1			T9	2		T38	853		T39	637
valid_sources[0x36]	24838	1			T23	1		T38	931		T39	777
valid_sources[0x37]	23356	1			T9	3		T23	2		T38	877
valid_sources[0x38]	24133	1			T38	560		T39	723		T60	2
valid_sources[0x39]	25249	1			T38	1115		T39	388		T53	2
valid_sources[0x3a]	24489	1			T9	1		T24	1		T38	776
valid_sources[0x3b]	25269	1			T1	1		T9	2		T23	1
valid_sources[0x3c]	27023	1			T2	1		T38	695		T39	610
valid_sources[0x3d]	24919	1			T3	1		T23	1		T38	1014
valid_sources[0x3e]	27149	1			T9	4		T38	947		T39	639
valid_sources[0x3f]	25276	1			T1	2		T9	4		T23	1
valid_sources[0x40]	25059	1			T9	2		T38	735		T39	609
valid_sources[0x41]	24091	1			T23	6		T5	3		T38	940
valid_sources[0x42]	23938	1			T23	1		T24	1		T4	1
valid_sources[0x43]	24904	1			T9	3		T38	1024		T39	554
valid_sources[0x44]	25761	1			T23	1		T24	2		T38	903
valid_sources[0x45]	24271	1			T1	1		T38	1119		T79	4
valid_sources[0x46]	25395	1			T23	1		T38	1040		T39	647
valid_sources[0x47]	25746	1			T9	1		T38	774		T39	542
valid_sources[0x48]	23929	1			T9	4		T38	696		T39	514
valid_sources[0x49]	25045	1			T3	1		T9	1		T23	1
valid_sources[0x4a]	25088	1			T3	1		T9	2		T23	1
valid_sources[0x4b]	24531	1			T1	6		T3	1		T9	2
valid_sources[0x4c]	24515	1			T9	2		T38	729		T39	505
valid_sources[0x4d]	24240	1			T9	2		T38	833		T39	779
valid_sources[0x4e]	26648	1			T3	7		T9	2		T38	1239
valid_sources[0x4f]	25372	1			T38	683		T39	688		T53	5
valid_sources[0x50]	23702	1			T3	1		T38	960		T39	482
valid_sources[0x51]	26184	1			T38	817		T39	622		T60	1
valid_sources[0x52]	24506	1			T1	3		T22	1		T9	2
valid_sources[0x53]	26109	1			T1	1		T9	3		T23	2
valid_sources[0x54]	24006	1			T1	1		T9	1		T23	3
valid_sources[0x55]	25212	1			T1	1		T3	1		T38	723
valid_sources[0x56]	25878	1			T1	1		T3	1		T38	933
valid_sources[0x57]	25177	1			T2	1		T3	2		T9	1
valid_sources[0x58]	25800	1			T1	1		T23	4		T38	1143
valid_sources[0x59]	25656	1			T1	1		T23	4		T38	1170
valid_sources[0x5a]	25633	1			T9	1		T38	1299		T39	657
valid_sources[0x5b]	25634	1			T1	1		T38	904		T79	2
valid_sources[0x5c]	24063	1			T38	832		T39	528		T53	2
valid_sources[0x5d]	26814	1			T1	1		T2	1		T9	2
valid_sources[0x5e]	24353	1			T9	1		T38	1014		T79	5
valid_sources[0x5f]	24192	1			T2	1		T3	1		T38	830
valid_sources[0x60]	25308	1			T38	868		T39	739		T46	9
valid_sources[0x61]	25481	1			T3	4		T23	1		T38	1256
valid_sources[0x62]	24839	1			T3	2		T23	1		T38	753
valid_sources[0x63]	25407	1			T23	2		T38	834		T39	826
valid_sources[0x64]	24345	1			T1	1		T2	1		T9	5
valid_sources[0x65]	26318	1			T1	2		T9	2		T23	1
valid_sources[0x66]	23862	1			T9	4		T23	1		T38	884
valid_sources[0x67]	25026	1			T1	2		T22	15		T9	3
valid_sources[0x68]	24386	1			T23	3		T38	789		T39	732
valid_sources[0x69]	24974	1			T9	3		T23	2		T38	829
valid_sources[0x6a]	24740	1			T9	2		T23	3		T38	442
valid_sources[0x6b]	24212	1			T38	819		T79	3		T39	681
valid_sources[0x6c]	23032	1			T38	747		T39	617		T41	1
valid_sources[0x6d]	26360	1			T9	2		T38	1192		T39	800
valid_sources[0x6e]	24949	1			T38	941		T79	2		T39	390
valid_sources[0x6f]	25614	1			T9	1		T38	1155		T39	650
valid_sources[0x70]	24702	1			T38	1160		T39	619		T41	1
valid_sources[0x71]	26075	1			T9	1		T23	1		T38	745
valid_sources[0x72]	25186	1			T38	704		T39	626		T28	1
valid_sources[0x73]	26300	1			T9	1		T23	1		T38	794
valid_sources[0x74]	25496	1			T1	1		T3	2		T38	1117
valid_sources[0x75]	24220	1			T9	1		T23	3		T38	795
valid_sources[0x76]	24942	1			T1	1		T3	1		T9	1
valid_sources[0x77]	25420	1			T22	27		T23	1		T38	735
valid_sources[0x78]	25857	1			T5	9		T38	625		T79	2
valid_sources[0x79]	24172	1			T9	1		T23	1		T5	3
valid_sources[0x7a]	25645	1			T38	731		T39	659		T60	1
valid_sources[0x7b]	25586	1			T3	3		T23	2		T38	968
valid_sources[0x7c]	26600	1			T9	3		T23	1		T38	952
valid_sources[0x7d]	23937	1			T23	2		T38	797		T39	565
valid_sources[0x7e]	25509	1			T9	1		T23	3		T38	913
valid_sources[0x7f]	26911	1			T38	940		T39	626		T41	1
valid_sources[0x80]	25444	1			T1	1		T23	1		T38	1054

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1449793

1

T1

5

T2

1

T3

5

values[0x0]

all_enables

biggest_size

2158461

1

T1

7

T2

5

T3

20

values[0x1]

all_enables

biggest_size

2155170

1

T1

3

T2

2

T3

16