Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	591220	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

4637020

1

T1

32557

T2

24

T3

54

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1395370	1			T1	8996		T2	69		T3	6
values[0x0]	1772681	1			T1	12509		T2	7		T3	33
values[0x1]	2060189	1			T1	14769		T2	15		T3	30

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	297198	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

4931042

1

T1

34603

T2

47

T3

58

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	21389	1			T1	150		T21	4		T7	2
valid_sources[0x01]	19163	1			T1	129		T3	4		T37	115
valid_sources[0x02]	18116	1			T1	121		T2	1		T23	1
valid_sources[0x03]	19805	1			T1	149		T7	1		T27	4
valid_sources[0x04]	20562	1			T1	139		T7	1		T37	161
valid_sources[0x05]	21401	1			T1	143		T4	6		T37	120
valid_sources[0x06]	21107	1			T1	146		T37	79		T38	245
valid_sources[0x07]	19924	1			T1	119		T21	7		T37	118
valid_sources[0x08]	19600	1			T1	139		T21	8		T7	1
valid_sources[0x09]	19715	1			T1	138		T20	2		T37	117
valid_sources[0x0a]	21216	1			T1	142		T37	120		T38	223
valid_sources[0x0b]	20711	1			T1	161		T21	1		T7	1
valid_sources[0x0c]	19994	1			T1	140		T8	6		T37	118
valid_sources[0x0d]	20977	1			T1	152		T2	1		T37	96
valid_sources[0x0e]	20784	1			T1	137		T21	1		T27	3
valid_sources[0x0f]	19621	1			T1	154		T21	2		T22	1
valid_sources[0x10]	23236	1			T1	149		T21	1		T37	148
valid_sources[0x11]	20922	1			T1	165		T2	2		T21	3
valid_sources[0x12]	18876	1			T1	158		T7	1		T37	145
valid_sources[0x13]	20488	1			T1	131		T21	1		T27	19
valid_sources[0x14]	19630	1			T1	114		T21	4		T37	124
valid_sources[0x15]	21906	1			T1	142		T37	99		T5	3
valid_sources[0x16]	22702	1			T1	152		T21	4		T7	1
valid_sources[0x17]	20892	1			T1	146		T7	1		T8	10
valid_sources[0x18]	20208	1			T1	146		T2	2		T7	1
valid_sources[0x19]	21218	1			T1	152		T7	1		T27	2
valid_sources[0x1a]	20851	1			T1	160		T37	122		T38	124
valid_sources[0x1b]	20160	1			T1	140		T37	111		T38	72
valid_sources[0x1c]	20724	1			T1	127		T37	74		T38	558
valid_sources[0x1d]	21051	1			T1	153		T21	1		T37	146
valid_sources[0x1e]	19316	1			T1	134		T37	106		T38	21
valid_sources[0x1f]	20555	1			T1	131		T21	3		T22	1
valid_sources[0x20]	18000	1			T1	110		T21	1		T7	1
valid_sources[0x21]	21486	1			T1	131		T37	113		T38	638
valid_sources[0x22]	21948	1			T1	156		T21	2		T37	118
valid_sources[0x23]	19116	1			T1	145		T37	156		T38	272
valid_sources[0x24]	21210	1			T1	131		T37	145		T38	520
valid_sources[0x25]	20047	1			T1	141		T37	124		T38	1012
valid_sources[0x26]	20472	1			T1	143		T2	1		T37	124
valid_sources[0x27]	22387	1			T1	167		T4	5		T7	1
valid_sources[0x28]	21536	1			T1	169		T2	1		T7	3
valid_sources[0x29]	21796	1			T1	121		T2	2		T21	3
valid_sources[0x2a]	19995	1			T1	158		T21	2		T71	4
valid_sources[0x2b]	20132	1			T1	136		T2	1		T21	2
valid_sources[0x2c]	20609	1			T1	152		T71	3		T37	133
valid_sources[0x2d]	19344	1			T1	144		T2	1		T22	1
valid_sources[0x2e]	21327	1			T1	122		T8	1		T37	115
valid_sources[0x2f]	19278	1			T1	138		T2	2		T37	127
valid_sources[0x30]	18758	1			T1	161		T21	7		T37	127
valid_sources[0x31]	19807	1			T1	139		T21	3		T37	138
valid_sources[0x32]	21479	1			T1	111		T21	3		T37	165
valid_sources[0x33]	21160	1			T1	160		T21	1		T22	1
valid_sources[0x34]	22354	1			T1	180		T2	1		T21	2
valid_sources[0x35]	21050	1			T1	160		T21	12		T7	1
valid_sources[0x36]	20129	1			T1	115		T21	3		T37	105
valid_sources[0x37]	21058	1			T1	144		T71	17		T37	132
valid_sources[0x38]	19651	1			T1	151		T21	2		T22	1
valid_sources[0x39]	18842	1			T1	153		T3	8		T37	111
valid_sources[0x3a]	19296	1			T1	147		T2	1		T12	19
valid_sources[0x3b]	20491	1			T1	145		T3	13		T21	2
valid_sources[0x3c]	20707	1			T1	133		T2	1		T21	1
valid_sources[0x3d]	20309	1			T1	168		T21	5		T71	1
valid_sources[0x3e]	21466	1			T1	147		T2	2		T21	1
valid_sources[0x3f]	21207	1			T1	155		T27	5		T37	123
valid_sources[0x40]	20149	1			T1	134		T21	5		T8	1
valid_sources[0x41]	21680	1			T1	131		T2	1		T71	2
valid_sources[0x42]	19355	1			T1	126		T21	4		T37	107
valid_sources[0x43]	21583	1			T1	149		T4	2		T21	4
valid_sources[0x44]	20031	1			T1	151		T37	161		T38	6
valid_sources[0x45]	20978	1			T1	125		T21	4		T12	4
valid_sources[0x46]	21227	1			T1	129		T21	6		T7	1
valid_sources[0x47]	21218	1			T1	141		T22	1		T37	88
valid_sources[0x48]	20497	1			T1	129		T21	2		T37	77
valid_sources[0x49]	19442	1			T1	134		T21	1		T7	1
valid_sources[0x4a]	19528	1			T1	137		T20	2		T21	2
valid_sources[0x4b]	20569	1			T1	168		T37	132		T38	165
valid_sources[0x4c]	19449	1			T1	158		T37	115		T5	2
valid_sources[0x4d]	19521	1			T1	134		T2	1		T21	4
valid_sources[0x4e]	21692	1			T1	147		T21	5		T8	3
valid_sources[0x4f]	21414	1			T1	128		T37	101		T38	518
valid_sources[0x50]	20376	1			T1	114		T21	5		T37	109
valid_sources[0x51]	19792	1			T1	124		T37	112		T38	1
valid_sources[0x52]	20223	1			T1	147		T21	3		T22	1
valid_sources[0x53]	22058	1			T1	151		T7	1		T37	116
valid_sources[0x54]	21690	1			T1	145		T37	110		T5	1
valid_sources[0x55]	20756	1			T1	138		T23	1		T7	1
valid_sources[0x56]	19178	1			T1	134		T37	97		T38	312
valid_sources[0x57]	21431	1			T1	124		T3	11		T21	4
valid_sources[0x58]	18998	1			T1	156		T22	1		T7	1
valid_sources[0x59]	21766	1			T1	148		T23	1		T7	1
valid_sources[0x5a]	21580	1			T1	159		T20	1		T7	2
valid_sources[0x5b]	18999	1			T1	151		T22	1		T7	2
valid_sources[0x5c]	20356	1			T1	126		T7	2		T37	128
valid_sources[0x5d]	18234	1			T1	123		T7	1		T37	124
valid_sources[0x5e]	19343	1			T1	130		T7	1		T37	101
valid_sources[0x5f]	19370	1			T1	130		T2	1		T8	1
valid_sources[0x60]	21442	1			T1	110		T7	2		T37	136
valid_sources[0x61]	19051	1			T1	163		T2	2		T7	1
valid_sources[0x62]	20015	1			T1	137		T7	1		T37	116
valid_sources[0x63]	18609	1			T1	147		T37	94		T38	509
valid_sources[0x64]	20564	1			T1	137		T2	1		T21	1
valid_sources[0x65]	20559	1			T1	143		T21	2		T9	123
valid_sources[0x66]	18790	1			T1	156		T21	1		T27	6
valid_sources[0x67]	23205	1			T1	163		T37	125		T38	851
valid_sources[0x68]	20094	1			T1	140		T2	1		T21	5
valid_sources[0x69]	20675	1			T1	149		T7	1		T27	11
valid_sources[0x6a]	19622	1			T1	156		T21	1		T8	3
valid_sources[0x6b]	18628	1			T1	147		T23	1		T37	111
valid_sources[0x6c]	20215	1			T1	113		T37	136		T38	9
valid_sources[0x6d]	20338	1			T1	150		T23	1		T37	121
valid_sources[0x6e]	20377	1			T1	139		T21	1		T37	147
valid_sources[0x6f]	22276	1			T1	153		T21	12		T37	110
valid_sources[0x70]	21718	1			T1	138		T2	1		T21	6
valid_sources[0x71]	18877	1			T1	145		T37	97		T38	488
valid_sources[0x72]	20718	1			T1	165		T2	1		T37	150
valid_sources[0x73]	20830	1			T1	146		T21	7		T37	108
valid_sources[0x74]	21385	1			T1	148		T37	110		T5	2
valid_sources[0x75]	20870	1			T1	144		T21	5		T71	4
valid_sources[0x76]	21629	1			T1	143		T21	1		T37	89
valid_sources[0x77]	18649	1			T1	149		T2	1		T21	9
valid_sources[0x78]	20932	1			T1	161		T27	1		T37	131
valid_sources[0x79]	20132	1			T1	135		T21	3		T12	5
valid_sources[0x7a]	20310	1			T1	139		T21	2		T27	7
valid_sources[0x7b]	19701	1			T1	128		T23	1		T7	1
valid_sources[0x7c]	19214	1			T1	123		T21	2		T7	1
valid_sources[0x7d]	18610	1			T1	106		T2	1		T21	1
valid_sources[0x7e]	20051	1			T1	143		T20	1		T8	5
valid_sources[0x7f]	21991	1			T1	147		T2	1		T37	133
valid_sources[0x80]	20411	1			T1	142		T37	123		T38	315

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1168588

1

T1

8081

T2

5

T20

1

values[0x0]

all_enables

biggest_size

1734789

1

T1

12259

T2

7

T3

29

values[0x1]

all_enables

biggest_size

1733643

1

T1

12217

T2

12

T3

25