Summary for Variable cp_acmd
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
4 |
0 |
4 |
100.00 |
Automatically Generated Bins for cp_acmd
Excluded/Illegal bins
NAME | COUNT | STATUS |
auto[INV] |
0 |
Excluded |
auto[UPD] |
0 |
Excluded |
auto[GENB] |
0 |
Excluded |
auto[GENU] |
0 |
Excluded |
unused |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[INS] |
24 |
1 |
|
|
T29 |
1 |
|
T30 |
1 |
|
T75 |
1 |
auto[RES] |
9 |
1 |
|
|
T34 |
1 |
|
T259 |
1 |
|
T198 |
1 |
auto[GEN] |
23 |
1 |
|
|
T29 |
1 |
|
T73 |
1 |
|
T74 |
2 |
auto[UNI] |
20 |
1 |
|
|
T30 |
1 |
|
T31 |
1 |
|
T101 |
1 |
Summary for Variable cp_auto_mode
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
2 |
0 |
2 |
100.00 |
User Defined Bins for cp_auto_mode
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
not_auto_mode |
82 |
1 |
|
|
T29 |
2 |
|
T30 |
2 |
|
T31 |
2 |
auto_mode |
18 |
1 |
|
|
T34 |
1 |
|
T35 |
1 |
|
T36 |
1 |
Summary for Variable cp_boot_mode
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
2 |
0 |
2 |
100.00 |
User Defined Bins for cp_boot_mode
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
not_boot_mode |
49 |
1 |
|
|
T29 |
1 |
|
T31 |
1 |
|
T34 |
2 |
boot_mode |
51 |
1 |
|
|
T29 |
1 |
|
T30 |
2 |
|
T31 |
1 |
Summary for Variable cp_cmd_ack
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
2 |
0 |
2 |
100.00 |
User Defined Bins for cp_cmd_ack
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
no_ack |
46 |
1 |
|
|
T29 |
1 |
|
T30 |
1 |
|
T31 |
1 |
ack |
54 |
1 |
|
|
T29 |
1 |
|
T30 |
1 |
|
T31 |
1 |
Summary for Variable cp_cmd_sts
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
6 |
1 |
5 |
83.33 |
Automatically Generated Bins for cp_cmd_sts
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
auto[CMD_STS_UNDRIVEN] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[CMD_STS_SUCCESS] |
50 |
1 |
|
|
T29 |
1 |
|
T30 |
1 |
|
T31 |
1 |
auto[CMD_STS_INVALID_ACMD] |
11 |
1 |
|
|
T31 |
1 |
|
T74 |
1 |
|
T260 |
1 |
auto[CMD_STS_INVALID_GEN_CMD] |
14 |
1 |
|
|
T29 |
1 |
|
T73 |
1 |
|
T165 |
1 |
auto[CMD_STS_INVALID_CMD_SEQ] |
14 |
1 |
|
|
T34 |
1 |
|
T75 |
1 |
|
T101 |
1 |
auto[CMD_STS_RESEED_CNT_EXCEEDED] |
11 |
1 |
|
|
T30 |
1 |
|
T166 |
1 |
|
T80 |
1 |
Summary for Cross cr_acmd_boot_mode
Samples crossed: cp_acmd cp_boot_mode
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
3 |
0 |
3 |
100.00 |
|
Automatically Generated Cross Bins |
3 |
0 |
3 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cr_acmd_boot_mode
Excluded/Illegal bins
cp_acmd | cp_boot_mode | COUNT | STATUS | |
[auto[INV]] |
[not_boot_mode , boot_mode] |
-- |
Excluded |
(2 bins) |
[auto[UPD]] |
[not_boot_mode , boot_mode] |
-- |
Excluded |
(2 bins) |
[auto[GENB] , auto[GENU]] |
[not_boot_mode , boot_mode] |
-- |
Excluded |
(4 bins) |
Covered bins
cp_acmd | cp_boot_mode | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[INS] |
boot_mode |
24 |
1 |
|
|
T29 |
1 |
|
T30 |
1 |
|
T75 |
1 |
auto[GEN] |
boot_mode |
9 |
1 |
|
|
T73 |
1 |
|
T74 |
2 |
|
T75 |
1 |
auto[UNI] |
boot_mode |
18 |
1 |
|
|
T30 |
1 |
|
T31 |
1 |
|
T101 |
1 |
User Defined Cross Bins for cr_acmd_boot_mode
Excluded/Illegal bins
NAME | COUNT | STATUS |
not_boot_mode |
0 |
Excluded |
not_valid_boot_commands |
0 |
Excluded |
Summary for Cross cr_acmd_auto_mode
Samples crossed: cp_acmd cp_auto_mode
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
2 |
0 |
2 |
100.00 |
|
Automatically Generated Cross Bins |
2 |
0 |
2 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cr_acmd_auto_mode
Excluded/Illegal bins
cp_acmd | cp_auto_mode | COUNT | STATUS | |
[auto[INV]] |
[not_auto_mode , auto_mode] |
-- |
Excluded |
(2 bins) |
[auto[UPD]] |
[not_auto_mode , auto_mode] |
-- |
Excluded |
(2 bins) |
[auto[GENB] , auto[GENU]] |
[not_auto_mode , auto_mode] |
-- |
Excluded |
(4 bins) |
Covered bins
cp_acmd | cp_auto_mode | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[RES] |
auto_mode |
9 |
1 |
|
|
T34 |
1 |
|
T259 |
1 |
|
T198 |
1 |
auto[GEN] |
auto_mode |
9 |
1 |
|
|
T35 |
1 |
|
T36 |
1 |
|
T261 |
1 |
User Defined Cross Bins for cr_acmd_auto_mode
Excluded/Illegal bins
NAME | COUNT | STATUS |
not_auto_mode |
0 |
Excluded |
not_valid_boot_commands |
0 |
Excluded |