Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	642648	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5064650

1

T1

31140

T2

10

T3

38

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1519971	1			T1	9507		T2	5		T3	93
values[0x0]	1936127	1			T1	11956		T2	6		T3	20
values[0x1]	2251200	1			T1	13820		T2	9		T3	15

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	321709	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5385589

1

T1

33152

T2

13

T3

70

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22590	1			T1	126		T23	1		T24	289
valid_sources[0x01]	21452	1			T1	143		T18	1		T24	418
valid_sources[0x02]	24245	1			T1	135		T24	453		T8	2
valid_sources[0x03]	21480	1			T1	152		T24	804		T25	1
valid_sources[0x04]	21499	1			T1	115		T24	45		T25	1
valid_sources[0x05]	22821	1			T1	151		T3	2		T24	48
valid_sources[0x06]	21696	1			T1	128		T24	554		T25	2
valid_sources[0x07]	22533	1			T1	121		T24	434		T112	269
valid_sources[0x08]	22079	1			T1	161		T24	547		T25	2
valid_sources[0x09]	22380	1			T1	152		T3	2		T24	365
valid_sources[0x0a]	20883	1			T1	155		T23	1		T24	109
valid_sources[0x0b]	22253	1			T1	144		T24	737		T112	269
valid_sources[0x0c]	22824	1			T1	143		T24	230		T112	261
valid_sources[0x0d]	22188	1			T1	132		T24	387		T25	1
valid_sources[0x0e]	22067	1			T1	132		T2	1		T18	1
valid_sources[0x0f]	22332	1			T1	138		T24	522		T30	1
valid_sources[0x10]	21263	1			T1	139		T23	1		T24	66
valid_sources[0x11]	22287	1			T1	114		T3	1		T24	322
valid_sources[0x12]	23667	1			T1	142		T24	549		T25	2
valid_sources[0x13]	22754	1			T1	127		T24	261		T26	21
valid_sources[0x14]	22235	1			T1	142		T24	528		T25	3
valid_sources[0x15]	21960	1			T1	143		T18	1		T24	451
valid_sources[0x16]	22291	1			T1	134		T23	1		T24	120
valid_sources[0x17]	23150	1			T1	142		T24	417		T25	3
valid_sources[0x18]	21500	1			T1	146		T23	1		T24	41
valid_sources[0x19]	21478	1			T1	135		T24	83		T25	2
valid_sources[0x1a]	22502	1			T1	150		T24	193		T112	254
valid_sources[0x1b]	22708	1			T1	128		T3	5		T23	2
valid_sources[0x1c]	21913	1			T1	134		T23	2		T24	286
valid_sources[0x1d]	21772	1			T1	131		T24	208		T17	1
valid_sources[0x1e]	22253	1			T1	135		T24	289		T25	1
valid_sources[0x1f]	23806	1			T1	156		T24	560		T25	1
valid_sources[0x20]	21955	1			T1	121		T24	874		T25	1
valid_sources[0x21]	22620	1			T1	128		T23	1		T24	674
valid_sources[0x22]	22465	1			T1	138		T23	1		T24	218
valid_sources[0x23]	22808	1			T1	111		T24	519		T25	1
valid_sources[0x24]	23733	1			T1	125		T24	1436		T30	1
valid_sources[0x25]	22325	1			T1	124		T24	430		T25	1
valid_sources[0x26]	22522	1			T1	156		T24	120		T112	198
valid_sources[0x27]	22120	1			T1	135		T3	1		T24	430
valid_sources[0x28]	24795	1			T1	135		T3	2		T24	430
valid_sources[0x29]	22470	1			T1	140		T24	733		T30	1
valid_sources[0x2a]	23720	1			T1	145		T24	737		T112	284
valid_sources[0x2b]	22087	1			T1	151		T24	655		T25	2
valid_sources[0x2c]	23525	1			T1	146		T3	3		T24	594
valid_sources[0x2d]	23685	1			T1	141		T24	1037		T25	2
valid_sources[0x2e]	21025	1			T1	129		T24	131		T25	1
valid_sources[0x2f]	22000	1			T1	151		T24	263		T17	1
valid_sources[0x30]	20875	1			T1	130		T24	658		T25	1
valid_sources[0x31]	22070	1			T1	123		T3	2		T24	139
valid_sources[0x32]	20889	1			T1	132		T3	1		T24	528
valid_sources[0x33]	22384	1			T1	138		T24	606		T94	1
valid_sources[0x34]	23477	1			T1	129		T3	2		T24	581
valid_sources[0x35]	21831	1			T1	131		T24	246		T25	3
valid_sources[0x36]	21795	1			T1	150		T3	4		T24	147
valid_sources[0x37]	21473	1			T1	121		T24	282		T25	2
valid_sources[0x38]	23477	1			T1	142		T3	3		T23	1
valid_sources[0x39]	22652	1			T1	131		T3	2		T24	612
valid_sources[0x3a]	21986	1			T1	134		T3	1		T24	114
valid_sources[0x3b]	21746	1			T1	144		T23	1		T24	280
valid_sources[0x3c]	22134	1			T1	129		T3	1		T24	1106
valid_sources[0x3d]	21755	1			T1	139		T3	3		T24	128
valid_sources[0x3e]	23998	1			T1	139		T3	1		T24	579
valid_sources[0x3f]	22575	1			T1	147		T3	1		T18	1
valid_sources[0x40]	22592	1			T1	140		T24	433		T25	1
valid_sources[0x41]	22213	1			T1	156		T24	673		T25	1
valid_sources[0x42]	23743	1			T1	138		T24	1092		T8	1
valid_sources[0x43]	22661	1			T1	132		T24	534		T25	1
valid_sources[0x44]	22264	1			T1	141		T23	1		T24	701
valid_sources[0x45]	21815	1			T1	123		T24	730		T30	3
valid_sources[0x46]	22141	1			T1	129		T23	1		T24	272
valid_sources[0x47]	21412	1			T1	155		T24	342		T30	1
valid_sources[0x48]	21643	1			T1	150		T24	286		T25	4
valid_sources[0x49]	23417	1			T1	128		T23	1		T24	770
valid_sources[0x4a]	23866	1			T1	137		T2	3		T24	813
valid_sources[0x4b]	21102	1			T1	138		T23	1		T24	292
valid_sources[0x4c]	22294	1			T1	127		T24	701		T25	3
valid_sources[0x4d]	22449	1			T1	154		T24	475		T25	4
valid_sources[0x4e]	22835	1			T1	133		T3	1		T24	596
valid_sources[0x4f]	24078	1			T1	131		T24	599		T25	1
valid_sources[0x50]	21465	1			T1	151		T24	308		T25	3
valid_sources[0x51]	22067	1			T1	126		T3	2		T24	558
valid_sources[0x52]	21786	1			T1	147		T24	334		T25	4
valid_sources[0x53]	23120	1			T1	137		T3	1		T24	372
valid_sources[0x54]	22843	1			T1	148		T24	64		T25	2
valid_sources[0x55]	23060	1			T1	153		T3	1		T24	989
valid_sources[0x56]	21882	1			T1	125		T24	680		T30	1
valid_sources[0x57]	23050	1			T1	139		T24	919		T30	3
valid_sources[0x58]	23330	1			T1	148		T24	262		T112	260
valid_sources[0x59]	22219	1			T1	130		T24	712		T25	1
valid_sources[0x5a]	22175	1			T1	121		T24	377		T8	1
valid_sources[0x5b]	20974	1			T1	138		T2	1		T3	2
valid_sources[0x5c]	23445	1			T1	136		T24	307		T25	1
valid_sources[0x5d]	22768	1			T1	138		T24	346		T25	2
valid_sources[0x5e]	20912	1			T1	122		T24	289		T25	3
valid_sources[0x5f]	22162	1			T1	142		T18	1		T24	514
valid_sources[0x60]	21680	1			T1	124		T24	235		T25	2
valid_sources[0x61]	22256	1			T1	139		T3	1		T24	475
valid_sources[0x62]	22648	1			T1	150		T23	1		T24	462
valid_sources[0x63]	21714	1			T1	154		T3	9		T18	1
valid_sources[0x64]	21110	1			T1	144		T3	2		T24	240
valid_sources[0x65]	21940	1			T1	132		T24	276		T25	1
valid_sources[0x66]	23149	1			T1	130		T3	2		T23	3
valid_sources[0x67]	22601	1			T1	148		T2	1		T24	434
valid_sources[0x68]	21453	1			T1	136		T24	26		T25	4
valid_sources[0x69]	21364	1			T1	155		T24	419		T25	3
valid_sources[0x6a]	21394	1			T1	124		T24	632		T25	1
valid_sources[0x6b]	21025	1			T1	140		T18	1		T24	691
valid_sources[0x6c]	22530	1			T1	127		T3	1		T23	1
valid_sources[0x6d]	22298	1			T1	132		T24	204		T25	1
valid_sources[0x6e]	22828	1			T1	139		T23	1		T24	404
valid_sources[0x6f]	21576	1			T1	146		T24	429		T8	1
valid_sources[0x70]	21835	1			T1	128		T23	1		T24	287
valid_sources[0x71]	20819	1			T1	152		T3	1		T24	446
valid_sources[0x72]	21711	1			T1	152		T24	492		T25	1
valid_sources[0x73]	21303	1			T1	140		T24	38		T25	1
valid_sources[0x74]	22087	1			T1	136		T24	507		T25	2
valid_sources[0x75]	22866	1			T1	136		T24	238		T25	1
valid_sources[0x76]	22862	1			T1	117		T24	702		T25	1
valid_sources[0x77]	21327	1			T1	128		T24	326		T25	1
valid_sources[0x78]	22755	1			T1	156		T23	1		T24	719
valid_sources[0x79]	21064	1			T1	150		T24	339		T94	2
valid_sources[0x7a]	23151	1			T1	142		T24	544		T102	1
valid_sources[0x7b]	20739	1			T1	124		T24	458		T25	2
valid_sources[0x7c]	21154	1			T1	122		T18	1		T24	1075
valid_sources[0x7d]	20838	1			T1	132		T3	1		T24	49
valid_sources[0x7e]	23762	1			T1	150		T24	530		T25	1
valid_sources[0x7f]	21353	1			T1	153		T24	25		T25	1
valid_sources[0x80]	21215	1			T1	127		T24	284		T25	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1277567

1

T1

7912

T2

2

T3

6

values[0x0]

all_enables

biggest_size

1894654

1

T1

11669

T2

3

T3

18

values[0x1]

all_enables

biggest_size

1892429

1

T1

11559

T2

5

T3

14