Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	607469	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

4800244

1

T1

56

T2

12

T3

118

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1437152	1			T1	401		T2	15		T3	291
values[0x0]	1834619	1			T1	23		T2	1		T3	14
values[0x1]	2135942	1			T1	31		T2	9		T3	13

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	302738	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5104975

1

T1

203

T2

14

T3

179

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22012	1			T1	1		T3	2		T4	396
valid_sources[0x01]	20683	1			T4	484		T20	199		T38	1
valid_sources[0x02]	20407	1			T1	3		T4	376		T19	4
valid_sources[0x03]	20632	1			T4	422		T19	1		T20	188
valid_sources[0x04]	20195	1			T1	6		T3	1		T4	473
valid_sources[0x05]	21473	1			T1	3		T4	440		T19	1
valid_sources[0x06]	19451	1			T4	501		T19	4		T20	186
valid_sources[0x07]	20040	1			T1	1		T3	14		T4	480
valid_sources[0x08]	20132	1			T1	6		T3	1		T4	470
valid_sources[0x09]	22387	1			T1	6		T3	2		T4	466
valid_sources[0x0a]	20506	1			T1	1		T4	435		T20	180
valid_sources[0x0b]	19804	1			T3	3		T4	429		T19	2
valid_sources[0x0c]	23009	1			T1	13		T4	465		T19	5
valid_sources[0x0d]	20566	1			T3	2		T4	434		T20	202
valid_sources[0x0e]	18982	1			T1	3		T4	544		T19	3
valid_sources[0x0f]	20960	1			T3	2		T4	439		T20	192
valid_sources[0x10]	22018	1			T1	3		T3	1		T4	476
valid_sources[0x11]	20358	1			T3	1		T4	397		T19	2
valid_sources[0x12]	20818	1			T4	394		T20	213		T12	2
valid_sources[0x13]	20969	1			T4	441		T19	1		T20	220
valid_sources[0x14]	22002	1			T1	9		T4	486		T20	162
valid_sources[0x15]	22145	1			T1	1		T4	498		T19	1
valid_sources[0x16]	19650	1			T4	477		T19	2		T20	155
valid_sources[0x17]	20228	1			T1	1		T3	2		T4	322
valid_sources[0x18]	19802	1			T1	1		T2	1		T3	4
valid_sources[0x19]	20680	1			T1	9		T4	374		T19	3
valid_sources[0x1a]	19862	1			T1	4		T4	417		T19	1
valid_sources[0x1b]	20647	1			T4	437		T20	199		T37	373
valid_sources[0x1c]	20469	1			T3	2		T4	489		T19	3
valid_sources[0x1d]	21762	1			T1	2		T4	391		T19	4
valid_sources[0x1e]	21382	1			T3	2		T4	381		T19	1
valid_sources[0x1f]	21478	1			T4	366		T19	1		T20	200
valid_sources[0x20]	19347	1			T4	412		T19	1		T20	165
valid_sources[0x21]	21123	1			T3	2		T4	632		T19	3
valid_sources[0x22]	21907	1			T1	3		T4	425		T19	2
valid_sources[0x23]	22551	1			T3	1		T4	422		T19	2
valid_sources[0x24]	22334	1			T3	3		T4	440		T19	1
valid_sources[0x25]	21642	1			T1	1		T4	453		T20	235
valid_sources[0x26]	21990	1			T1	2		T4	384		T19	2
valid_sources[0x27]	21213	1			T4	463		T19	4		T20	180
valid_sources[0x28]	20704	1			T4	460		T19	2		T20	163
valid_sources[0x29]	21086	1			T4	463		T19	2		T20	174
valid_sources[0x2a]	23843	1			T3	4		T4	516		T19	1
valid_sources[0x2b]	21485	1			T1	1		T4	478		T20	199
valid_sources[0x2c]	19581	1			T3	5		T4	454		T19	1
valid_sources[0x2d]	18985	1			T1	1		T4	438		T19	6
valid_sources[0x2e]	21538	1			T3	2		T4	455		T19	1
valid_sources[0x2f]	20273	1			T3	3		T4	444		T19	1
valid_sources[0x30]	23796	1			T2	2		T3	5		T4	461
valid_sources[0x31]	21531	1			T1	2		T4	447		T19	1
valid_sources[0x32]	22267	1			T4	556		T19	3		T20	195
valid_sources[0x33]	19764	1			T3	1		T4	416		T20	196
valid_sources[0x34]	20215	1			T3	2		T4	542		T19	3
valid_sources[0x35]	20911	1			T1	1		T3	6		T4	381
valid_sources[0x36]	19939	1			T3	4		T4	559		T19	2
valid_sources[0x37]	22390	1			T1	1		T3	5		T4	375
valid_sources[0x38]	21241	1			T1	3		T3	6		T4	470
valid_sources[0x39]	21197	1			T4	385		T19	1		T20	202
valid_sources[0x3a]	22496	1			T4	477		T19	3		T20	194
valid_sources[0x3b]	20609	1			T4	508		T19	1		T20	195
valid_sources[0x3c]	20971	1			T1	4		T4	427		T19	1
valid_sources[0x3d]	20351	1			T1	1		T4	485		T19	2
valid_sources[0x3e]	21524	1			T1	2		T4	436		T19	5
valid_sources[0x3f]	22481	1			T1	1		T4	489		T19	3
valid_sources[0x40]	19432	1			T3	2		T4	350		T19	1
valid_sources[0x41]	23223	1			T1	1		T3	9		T4	387
valid_sources[0x42]	21213	1			T1	2		T3	1		T4	430
valid_sources[0x43]	20823	1			T1	4		T4	470		T20	160
valid_sources[0x44]	19600	1			T1	5		T3	3		T4	378
valid_sources[0x45]	22186	1			T1	6		T3	5		T4	455
valid_sources[0x46]	19806	1			T1	2		T4	432		T19	1
valid_sources[0x47]	19930	1			T1	2		T2	3		T3	3
valid_sources[0x48]	21111	1			T1	6		T4	395		T20	183
valid_sources[0x49]	23713	1			T4	466		T19	6		T20	193
valid_sources[0x4a]	21847	1			T1	1		T3	2		T4	479
valid_sources[0x4b]	22772	1			T1	1		T4	564		T19	1
valid_sources[0x4c]	20937	1			T4	430		T20	185		T54	1
valid_sources[0x4d]	20228	1			T1	3		T4	453		T19	2
valid_sources[0x4e]	21593	1			T1	1		T4	479		T19	4
valid_sources[0x4f]	22567	1			T4	468		T19	3		T20	203
valid_sources[0x50]	21679	1			T4	491		T20	192		T12	4
valid_sources[0x51]	21159	1			T1	1		T4	429		T19	6
valid_sources[0x52]	22716	1			T3	1		T4	450		T19	9
valid_sources[0x53]	21287	1			T1	5		T4	428		T20	185
valid_sources[0x54]	21173	1			T3	5		T4	452		T19	2
valid_sources[0x55]	24869	1			T4	613		T19	6		T20	137
valid_sources[0x56]	19447	1			T1	1		T2	2		T4	436
valid_sources[0x57]	21222	1			T4	471		T19	4		T20	162
valid_sources[0x58]	21446	1			T1	1		T4	515		T19	3
valid_sources[0x59]	22169	1			T4	482		T19	2		T20	180
valid_sources[0x5a]	21615	1			T1	1		T4	494		T19	2
valid_sources[0x5b]	19764	1			T1	4		T3	2		T4	479
valid_sources[0x5c]	21609	1			T3	1		T4	432		T19	3
valid_sources[0x5d]	22839	1			T1	7		T4	462		T20	185
valid_sources[0x5e]	21454	1			T4	475		T20	204		T12	2
valid_sources[0x5f]	22607	1			T1	2		T4	390		T19	2
valid_sources[0x60]	21096	1			T1	4		T4	442		T20	166
valid_sources[0x61]	22180	1			T1	1		T4	427		T19	2
valid_sources[0x62]	19949	1			T1	3		T2	1		T3	3
valid_sources[0x63]	21136	1			T1	3		T4	487		T19	1
valid_sources[0x64]	20245	1			T1	1		T4	445		T19	3
valid_sources[0x65]	21101	1			T1	5		T4	464		T20	196
valid_sources[0x66]	21756	1			T3	6		T4	511		T19	5
valid_sources[0x67]	20183	1			T3	2		T4	517		T20	198
valid_sources[0x68]	21231	1			T1	7		T3	1		T4	452
valid_sources[0x69]	22146	1			T4	517		T19	3		T20	178
valid_sources[0x6a]	20175	1			T3	3		T4	354		T20	175
valid_sources[0x6b]	21242	1			T4	470		T19	2		T20	184
valid_sources[0x6c]	18517	1			T3	2		T4	504		T19	3
valid_sources[0x6d]	21166	1			T4	561		T19	3		T20	155
valid_sources[0x6e]	21828	1			T1	4		T3	4		T4	490
valid_sources[0x6f]	22234	1			T4	518		T19	1		T20	189
valid_sources[0x70]	19614	1			T1	1		T3	3		T4	481
valid_sources[0x71]	20443	1			T3	2		T4	532		T20	174
valid_sources[0x72]	19831	1			T1	8		T2	1		T4	508
valid_sources[0x73]	22517	1			T1	3		T4	550		T19	1
valid_sources[0x74]	21037	1			T1	4		T3	4		T4	505
valid_sources[0x75]	21644	1			T4	500		T20	203		T54	1
valid_sources[0x76]	20532	1			T1	1		T4	457		T19	4
valid_sources[0x77]	20947	1			T2	1		T4	443		T20	243
valid_sources[0x78]	20841	1			T1	3		T3	3		T4	430
valid_sources[0x79]	20317	1			T4	359		T19	4		T20	199
valid_sources[0x7a]	22451	1			T1	6		T3	6		T4	445
valid_sources[0x7b]	21701	1			T4	515		T19	1		T20	195
valid_sources[0x7c]	20694	1			T1	1		T3	5		T4	483
valid_sources[0x7d]	18614	1			T1	4		T4	452		T20	196
valid_sources[0x7e]	21651	1			T1	2		T4	523		T19	1
valid_sources[0x7f]	21037	1			T4	448		T19	2		T20	188
valid_sources[0x80]	21261	1			T1	2		T3	1		T4	518

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1211009

1

T1

5

T2

6

T3

108

values[0x0]

all_enables

biggest_size

1795356

1

T1

22

T2

1

T3

8

values[0x1]

all_enables

biggest_size

1793879

1

T1

29

T2

5

T3

2