Group : push_pull_agent_pkg::req_ack_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[0].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[0].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[0].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4



Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[1].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[1].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[1].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4



Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[2].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[2].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[2].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4



Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[3].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[3].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[3].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4



Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[4].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[4].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[4].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4



Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[5].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[5].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[5].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4



Group Instance : push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[6].cov::m_req_ack_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[6].cov::m_req_ack_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance push_pull_agent_pkg.uvm_test_top.env.m_endpoint_agent[6].cov::m_req_ack_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_req_ack 3 0 3 100.00 100 1 1 4


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1967 1 T21 1 T22 1 T23 1
auto[2] 23757 1 T3 1 T21 4 T22 24
auto[3] 22675 1 T21 4 T22 24 T23 20


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 168 1 T7 2 T39 1 T40 1
auto[2] 5344 1 T7 5 T39 43 T40 56
auto[3] 5333 1 T7 5 T39 43 T40 56


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 167 1 T23 1 T8 1 T20 1
auto[2] 3028 1 T23 4 T8 4 T12 1
auto[3] 3019 1 T23 4 T8 4 T20 4


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 143 1 T23 1 T8 1 T40 1
auto[2] 53268 1 T23 22 T8 22 T40 33
auto[3] 53261 1 T23 22 T8 22 T40 33


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 144 1 T24 1 T8 1 T17 1
auto[2] 2297 1 T24 4 T8 27 T17 4
auto[3] 2294 1 T24 4 T8 27 T17 4


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 125 1 T23 1 T18 1 T19 1
auto[2] 3610 1 T23 4 T18 4 T19 4
auto[3] 3607 1 T23 4 T18 4 T19 4


Summary for Variable cp_req_ack

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 3 0 3 100.00


Automatically Generated Bins for cp_req_ack

Excluded/Illegal bins
NAMECOUNTSTATUS
ack_wo_req 0 Excluded
[auto[1]] 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 122 1 T2 1 T41 2 T51 2
auto[2] 4925 1 T2 4 T11 1 T41 5
auto[3] 4916 1 T2 4 T41 5 T51 5

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%