Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	656741	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5332397

1

T1

20

T2

10

T3

41

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1581662	1			T1	37		T2	4		T3	37
values[0x0]	2038856	1			T1	9		T2	4		T3	19
values[0x1]	2368620	1			T1	18		T2	10		T3	29

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	324893	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5664245

1

T1

35

T2

13

T3

54

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	24770	1			T1	1		T21	238		T25	3
valid_sources[0x01]	24895	1			T12	39		T21	257		T60	1
valid_sources[0x02]	22631	1			T19	1		T21	236		T54	2
valid_sources[0x03]	23751	1			T20	8		T24	1		T21	250
valid_sources[0x04]	26010	1			T21	285		T25	1		T50	2
valid_sources[0x05]	24579	1			T8	1		T21	202		T25	4
valid_sources[0x06]	22381	1			T21	255		T25	2		T39	1
valid_sources[0x07]	26963	1			T21	237		T25	1		T39	1
valid_sources[0x08]	24199	1			T21	288		T36	5		T22	580
valid_sources[0x09]	25299	1			T24	1		T31	10		T21	295
valid_sources[0x0a]	24706	1			T24	3		T21	246		T25	1
valid_sources[0x0b]	24669	1			T24	1		T18	214		T21	244
valid_sources[0x0c]	24406	1			T21	260		T50	1		T58	1
valid_sources[0x0d]	23971	1			T21	226		T36	1		T22	493
valid_sources[0x0e]	23993	1			T19	1		T21	269		T25	2
valid_sources[0x0f]	20701	1			T21	251		T25	1		T57	1
valid_sources[0x10]	22665	1			T5	1		T21	254		T25	1
valid_sources[0x11]	26347	1			T21	240		T25	1		T27	43
valid_sources[0x12]	24200	1			T24	1		T21	227		T25	1
valid_sources[0x13]	22191	1			T24	1		T21	268		T50	1
valid_sources[0x14]	23266	1			T24	1		T21	287		T28	2
valid_sources[0x15]	23831	1			T19	1		T49	1		T21	271
valid_sources[0x16]	22820	1			T24	8		T21	276		T25	1
valid_sources[0x17]	22103	1			T8	11		T49	1		T21	252
valid_sources[0x18]	23296	1			T24	2		T49	2		T21	276
valid_sources[0x19]	24482	1			T21	242		T25	1		T39	1
valid_sources[0x1a]	23366	1			T21	266		T25	1		T55	1
valid_sources[0x1b]	22447	1			T21	255		T140	4		T30	3
valid_sources[0x1c]	24287	1			T12	7		T21	278		T57	1
valid_sources[0x1d]	22508	1			T21	250		T25	1		T54	1
valid_sources[0x1e]	23602	1			T12	27		T21	283		T54	1
valid_sources[0x1f]	22876	1			T21	274		T25	2		T41	3
valid_sources[0x20]	23084	1			T21	274		T25	1		T50	1
valid_sources[0x21]	26706	1			T21	266		T25	1		T36	2
valid_sources[0x22]	25109	1			T19	2		T24	6		T5	3
valid_sources[0x23]	21679	1			T19	2		T21	244		T25	8
valid_sources[0x24]	23055	1			T21	233		T25	1		T41	35
valid_sources[0x25]	23275	1			T21	209		T25	2		T50	2
valid_sources[0x26]	23160	1			T19	2		T24	1		T21	222
valid_sources[0x27]	24671	1			T24	3		T21	246		T25	1
valid_sources[0x28]	24071	1			T24	1		T21	242		T25	1
valid_sources[0x29]	23803	1			T24	1		T21	233		T39	1
valid_sources[0x2a]	22963	1			T12	2		T49	1		T21	231
valid_sources[0x2b]	21322	1			T21	236		T28	1		T58	3
valid_sources[0x2c]	23039	1			T21	257		T25	2		T22	514
valid_sources[0x2d]	25212	1			T21	251		T57	4		T160	1
valid_sources[0x2e]	25232	1			T3	3		T21	236		T13	2
valid_sources[0x2f]	22739	1			T19	2		T24	2		T21	234
valid_sources[0x30]	21852	1			T21	237		T25	1		T134	1
valid_sources[0x31]	24225	1			T24	8		T21	230		T50	1
valid_sources[0x32]	23582	1			T21	215		T25	1		T51	1
valid_sources[0x33]	21800	1			T24	3		T21	284		T25	1
valid_sources[0x34]	21378	1			T24	1		T12	26		T21	257
valid_sources[0x35]	23815	1			T24	3		T21	240		T25	1
valid_sources[0x36]	25691	1			T21	237		T29	1		T22	604
valid_sources[0x37]	23718	1			T21	247		T25	2		T132	1
valid_sources[0x38]	21658	1			T21	222		T25	2		T29	1
valid_sources[0x39]	24158	1			T12	14		T21	251		T29	3
valid_sources[0x3a]	23248	1			T21	239		T50	1		T36	3
valid_sources[0x3b]	23989	1			T21	231		T25	1		T22	469
valid_sources[0x3c]	22468	1			T3	1		T24	14		T21	248
valid_sources[0x3d]	23334	1			T21	250		T25	2		T36	1
valid_sources[0x3e]	24929	1			T24	2		T21	285		T25	1
valid_sources[0x3f]	22120	1			T21	235		T25	4		T51	4
valid_sources[0x40]	22445	1			T21	268		T25	2		T28	2
valid_sources[0x41]	22980	1			T21	224		T25	1		T140	2
valid_sources[0x42]	21927	1			T21	261		T25	4		T50	1
valid_sources[0x43]	23173	1			T31	13		T21	241		T13	1
valid_sources[0x44]	27051	1			T8	1		T21	263		T25	3
valid_sources[0x45]	22179	1			T21	261		T25	1		T39	1
valid_sources[0x46]	21593	1			T24	2		T21	265		T50	1
valid_sources[0x47]	22530	1			T21	258		T39	1		T58	1
valid_sources[0x48]	24773	1			T21	236		T53	1		T22	622
valid_sources[0x49]	24855	1			T1	1		T21	237		T27	34
valid_sources[0x4a]	24871	1			T21	267		T39	1		T54	1
valid_sources[0x4b]	24586	1			T19	1		T21	244		T28	1
valid_sources[0x4c]	24266	1			T21	265		T25	1		T29	1
valid_sources[0x4d]	23326	1			T21	259		T39	1		T36	1
valid_sources[0x4e]	22684	1			T24	4		T21	284		T29	11
valid_sources[0x4f]	23363	1			T21	254		T25	2		T36	1
valid_sources[0x50]	21618	1			T21	242		T57	1		T51	1
valid_sources[0x51]	24047	1			T21	276		T28	3		T36	1
valid_sources[0x52]	23834	1			T31	7		T21	278		T25	2
valid_sources[0x53]	23622	1			T21	243		T25	2		T59	1
valid_sources[0x54]	22632	1			T19	2		T21	259		T25	1
valid_sources[0x55]	22524	1			T21	256		T22	531		T23	604
valid_sources[0x56]	23821	1			T21	245		T25	1		T28	1
valid_sources[0x57]	24188	1			T21	268		T25	1		T22	507
valid_sources[0x58]	21408	1			T19	4		T21	246		T25	3
valid_sources[0x59]	21727	1			T21	250		T36	1		T55	3
valid_sources[0x5a]	21937	1			T24	8		T21	217		T25	2
valid_sources[0x5b]	24767	1			T49	4		T21	267		T28	1
valid_sources[0x5c]	22101	1			T19	3		T21	261		T57	3
valid_sources[0x5d]	22159	1			T21	225		T25	1		T54	1
valid_sources[0x5e]	22311	1			T21	236		T25	4		T50	1
valid_sources[0x5f]	25310	1			T24	2		T8	1		T21	291
valid_sources[0x60]	22221	1			T3	6		T24	8		T21	224
valid_sources[0x61]	24190	1			T1	2		T21	270		T25	1
valid_sources[0x62]	22688	1			T24	1		T31	5		T21	249
valid_sources[0x63]	21874	1			T3	34		T24	2		T21	233
valid_sources[0x64]	23461	1			T21	276		T25	1		T39	1
valid_sources[0x65]	24663	1			T32	1		T21	249		T25	2
valid_sources[0x66]	25661	1			T19	2		T21	253		T39	1
valid_sources[0x67]	26141	1			T21	255		T22	502		T23	671
valid_sources[0x68]	22440	1			T21	275		T25	4		T28	1
valid_sources[0x69]	23465	1			T21	272		T50	2		T160	1
valid_sources[0x6a]	23100	1			T19	3		T24	6		T21	244
valid_sources[0x6b]	25079	1			T21	261		T25	1		T160	1
valid_sources[0x6c]	22627	1			T24	2		T21	222		T39	2
valid_sources[0x6d]	24039	1			T1	1		T24	2		T21	250
valid_sources[0x6e]	21422	1			T21	265		T30	19		T36	1
valid_sources[0x6f]	25319	1			T21	225		T25	1		T22	528
valid_sources[0x70]	24217	1			T21	254		T39	1		T22	471
valid_sources[0x71]	22767	1			T21	248		T25	1		T39	1
valid_sources[0x72]	22677	1			T21	200		T26	103		T73	1
valid_sources[0x73]	20907	1			T21	252		T25	1		T39	1
valid_sources[0x74]	22021	1			T21	261		T25	1		T13	3
valid_sources[0x75]	24553	1			T21	260		T25	2		T55	6
valid_sources[0x76]	22474	1			T21	255		T25	5		T28	1
valid_sources[0x77]	22516	1			T49	1		T21	266		T41	60
valid_sources[0x78]	21949	1			T24	7		T21	242		T25	1
valid_sources[0x79]	22459	1			T24	5		T5	10		T21	270
valid_sources[0x7a]	24537	1			T12	1		T21	230		T28	2
valid_sources[0x7b]	23810	1			T21	246		T28	1		T36	1
valid_sources[0x7c]	22621	1			T19	1		T21	224		T25	4
valid_sources[0x7d]	24793	1			T24	6		T12	18		T21	235
valid_sources[0x7e]	22081	1			T24	2		T21	243		T25	1
valid_sources[0x7f]	22363	1			T24	5		T21	227		T25	3
valid_sources[0x80]	22039	1			T21	254		T25	2		T134	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1343083

1

T1

9

T2

1

T3

9

values[0x0]

all_enables

biggest_size

1996361

1

T1

4

T2

3

T3

16

values[0x1]

all_enables

biggest_size

1992953

1

T1

7

T2

6

T3

16