Group : tb.dut.u_edn_cov_if::edn_endpoint_err_req_cg
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Group : tb.dut.u_edn_cov_if::edn_endpoint_err_req_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_edn_cov_0/edn_cov_if.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
edn_endpoint_err_req_cg 100.00 1 100 1 64 64




Group Instance : edn_endpoint_err_req_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance edn_endpoint_err_req_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 7 0 7 100.00


Variables for Group Instance edn_endpoint_err_req_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
endpoint_cg 7 0 7 100.00 100 1 1 0


Summary for Variable endpoint_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 0 7 100.00


User Defined Bins for endpoint_cg

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
range[0x0] 512 1 T13 110 T17 66 T18 65
range[0x1] 510 1 T13 117 T17 65 T18 70
range[0x2] 542 1 T13 150 T17 66 T18 60
range[0x3] 544 1 T13 144 T17 65 T18 61
range[0x4] 510 1 T13 127 T17 61 T18 62
range[0x5] 515 1 T13 124 T17 71 T18 67
range[0x6] 522 1 T13 138 T17 64 T18 55

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%