Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	675924	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5464391

1

T1

93920

T2

42

T3

25

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1619419	1			T1	26366		T2	53		T3	48
values[0x0]	2090565	1			T1	35840		T2	25		T3	13
values[0x1]	2430331	1			T1	41950		T2	23		T3	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	333083	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

5807232

1

T1

99654

T2

63

T3

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	21882	1			T1	449		T39	1		T50	1
valid_sources[0x01]	26552	1			T1	457		T15	7		T25	1
valid_sources[0x02]	25376	1			T1	386		T24	3		T51	1
valid_sources[0x03]	25070	1			T1	373		T26	1		T60	1
valid_sources[0x04]	24028	1			T1	424		T25	2		T50	2
valid_sources[0x05]	23845	1			T1	460		T25	1		T59	5
valid_sources[0x06]	21692	1			T1	346		T24	2		T25	2
valid_sources[0x07]	24029	1			T1	399		T41	6		T94	3
valid_sources[0x08]	22021	1			T1	387		T4	19		T25	1
valid_sources[0x09]	24358	1			T1	388		T26	1		T39	1
valid_sources[0x0a]	24980	1			T1	393		T9	1		T26	1
valid_sources[0x0b]	23359	1			T1	402		T25	1		T10	1
valid_sources[0x0c]	24007	1			T1	454		T39	1		T6	2
valid_sources[0x0d]	23986	1			T1	406		T3	1		T19	3
valid_sources[0x0e]	24395	1			T1	425		T26	1		T50	1
valid_sources[0x0f]	23537	1			T1	427		T25	3		T16	1
valid_sources[0x10]	23950	1			T1	387		T24	3		T25	1
valid_sources[0x11]	24860	1			T1	310		T3	2		T16	4
valid_sources[0x12]	24531	1			T1	437		T3	1		T15	4
valid_sources[0x13]	23707	1			T1	435		T9	1		T39	2
valid_sources[0x14]	24609	1			T1	410		T9	2		T26	1
valid_sources[0x15]	23431	1			T1	432		T39	1		T19	1
valid_sources[0x16]	22996	1			T1	419		T3	2		T15	3
valid_sources[0x17]	25134	1			T1	354		T16	13		T26	1
valid_sources[0x18]	23805	1			T1	351		T60	3		T62	1
valid_sources[0x19]	22416	1			T1	412		T25	1		T39	1
valid_sources[0x1a]	23608	1			T1	453		T24	3		T25	3
valid_sources[0x1b]	23957	1			T1	394		T16	9		T39	3
valid_sources[0x1c]	23918	1			T1	440		T24	3		T25	2
valid_sources[0x1d]	24400	1			T1	409		T3	1		T25	1
valid_sources[0x1e]	25907	1			T1	395		T26	1		T39	1
valid_sources[0x1f]	23730	1			T1	362		T3	1		T24	5
valid_sources[0x20]	23795	1			T1	438		T60	7		T61	3
valid_sources[0x21]	24495	1			T1	394		T26	2		T39	2
valid_sources[0x22]	25145	1			T1	355		T26	1		T42	1
valid_sources[0x23]	24245	1			T1	419		T25	2		T16	2
valid_sources[0x24]	24665	1			T1	462		T25	1		T26	1
valid_sources[0x25]	25498	1			T1	401		T9	1		T39	1
valid_sources[0x26]	24140	1			T1	350		T26	1		T39	3
valid_sources[0x27]	22192	1			T1	371		T26	1		T39	3
valid_sources[0x28]	23783	1			T1	430		T39	3		T19	3
valid_sources[0x29]	24885	1			T1	349		T50	1		T42	2
valid_sources[0x2a]	23516	1			T1	430		T26	1		T39	1
valid_sources[0x2b]	25943	1			T1	343		T16	2		T39	2
valid_sources[0x2c]	23164	1			T1	345		T3	1		T26	3
valid_sources[0x2d]	23623	1			T1	375		T39	1		T50	1
valid_sources[0x2e]	22838	1			T1	381		T3	2		T25	1
valid_sources[0x2f]	23173	1			T1	399		T51	1		T19	1
valid_sources[0x30]	22758	1			T1	436		T39	3		T19	1
valid_sources[0x31]	24906	1			T1	377		T39	1		T19	1
valid_sources[0x32]	23763	1			T1	449		T39	1		T10	1
valid_sources[0x33]	23425	1			T1	368		T15	2		T16	6
valid_sources[0x34]	26592	1			T1	391		T15	12		T39	3
valid_sources[0x35]	24916	1			T1	390		T3	1		T25	1
valid_sources[0x36]	24180	1			T1	486		T6	9		T42	2
valid_sources[0x37]	25012	1			T1	468		T24	1		T26	1
valid_sources[0x38]	22724	1			T1	403		T51	1		T39	3
valid_sources[0x39]	24140	1			T1	357		T3	1		T9	2
valid_sources[0x3a]	23849	1			T1	463		T25	1		T39	2
valid_sources[0x3b]	22128	1			T1	341		T3	1		T39	3
valid_sources[0x3c]	24433	1			T1	408		T3	1		T24	3
valid_sources[0x3d]	24918	1			T1	472		T24	2		T19	1
valid_sources[0x3e]	22949	1			T1	390		T50	1		T19	4
valid_sources[0x3f]	22742	1			T1	388		T3	2		T25	1
valid_sources[0x40]	23449	1			T1	365		T15	3		T24	1
valid_sources[0x41]	24466	1			T1	371		T9	1		T19	1
valid_sources[0x42]	22194	1			T1	383		T24	3		T25	2
valid_sources[0x43]	26082	1			T1	453		T26	3		T39	1
valid_sources[0x44]	23869	1			T1	422		T3	1		T39	2
valid_sources[0x45]	25744	1			T1	398		T39	1		T42	1
valid_sources[0x46]	24986	1			T1	482		T25	1		T10	2
valid_sources[0x47]	23373	1			T1	338		T39	1		T10	1
valid_sources[0x48]	22700	1			T1	405		T3	2		T25	1
valid_sources[0x49]	24478	1			T1	436		T25	1		T39	3
valid_sources[0x4a]	24860	1			T1	379		T3	1		T15	16
valid_sources[0x4b]	24029	1			T1	401		T25	3		T26	2
valid_sources[0x4c]	23418	1			T1	456		T51	1		T10	1
valid_sources[0x4d]	25371	1			T1	537		T26	1		T39	1
valid_sources[0x4e]	24858	1			T1	444		T15	3		T60	1
valid_sources[0x4f]	24242	1			T1	394		T25	1		T39	1
valid_sources[0x50]	24300	1			T1	447		T39	4		T6	3
valid_sources[0x51]	23413	1			T1	441		T25	3		T6	2
valid_sources[0x52]	23707	1			T1	453		T6	4		T42	1
valid_sources[0x53]	24268	1			T1	383		T26	1		T39	6
valid_sources[0x54]	26666	1			T1	404		T3	1		T39	1
valid_sources[0x55]	23580	1			T1	392		T9	1		T39	1
valid_sources[0x56]	23367	1			T1	402		T25	2		T51	1
valid_sources[0x57]	24075	1			T1	361		T16	1		T9	2
valid_sources[0x58]	23997	1			T1	371		T25	3		T16	2
valid_sources[0x59]	23693	1			T1	421		T16	2		T9	1
valid_sources[0x5a]	24832	1			T1	449		T9	1		T26	1
valid_sources[0x5b]	22840	1			T1	345		T15	11		T25	1
valid_sources[0x5c]	22316	1			T1	414		T26	1		T39	3
valid_sources[0x5d]	24602	1			T1	432		T26	1		T39	1
valid_sources[0x5e]	23450	1			T1	402		T39	4		T50	1
valid_sources[0x5f]	24310	1			T1	384		T3	2		T25	1
valid_sources[0x60]	25851	1			T1	409		T25	1		T51	1
valid_sources[0x61]	24537	1			T1	418		T16	2		T19	2
valid_sources[0x62]	23617	1			T1	510		T24	1		T39	2
valid_sources[0x63]	23653	1			T1	422		T3	1		T16	1
valid_sources[0x64]	23026	1			T1	446		T39	2		T60	3
valid_sources[0x65]	22441	1			T1	426		T26	1		T39	1
valid_sources[0x66]	25480	1			T1	498		T9	2		T50	1
valid_sources[0x67]	24502	1			T1	378		T3	1		T25	2
valid_sources[0x68]	24024	1			T1	366		T16	2		T26	1
valid_sources[0x69]	24381	1			T1	439		T60	2		T96	1
valid_sources[0x6a]	24021	1			T1	325		T25	1		T39	2
valid_sources[0x6b]	23710	1			T1	329		T9	3		T39	1
valid_sources[0x6c]	24302	1			T1	362		T25	2		T19	1
valid_sources[0x6d]	25418	1			T1	407		T39	1		T60	1
valid_sources[0x6e]	24647	1			T1	412		T9	1		T39	3
valid_sources[0x6f]	24182	1			T1	433		T26	1		T39	5
valid_sources[0x70]	24272	1			T1	402		T26	1		T39	2
valid_sources[0x71]	22628	1			T1	414		T25	2		T61	1
valid_sources[0x72]	23079	1			T1	373		T3	1		T39	1
valid_sources[0x73]	24479	1			T1	375		T26	1		T41	1
valid_sources[0x74]	21196	1			T1	377		T39	4		T50	1
valid_sources[0x75]	23365	1			T1	418		T26	1		T39	1
valid_sources[0x76]	21905	1			T1	326		T25	1		T39	1
valid_sources[0x77]	22031	1			T1	432		T25	2		T39	1
valid_sources[0x78]	24557	1			T1	452		T10	1		T96	2
valid_sources[0x79]	25534	1			T1	395		T25	1		T16	2
valid_sources[0x7a]	23425	1			T1	422		T39	2		T19	1
valid_sources[0x7b]	24119	1			T1	444		T60	1		T41	2
valid_sources[0x7c]	23410	1			T1	411		T25	1		T51	1
valid_sources[0x7d]	23821	1			T1	396		T3	1		T42	3
valid_sources[0x7e]	23699	1			T1	401		T25	1		T26	1
valid_sources[0x7f]	22880	1			T1	505		T25	1		T39	1
valid_sources[0x80]	23837	1			T1	376		T39	3		T42	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1375864

1

T1

23566

T2

2

T3

4

values[0x0]

all_enables

biggest_size

2047068

1

T1

35258

T2

19

T3

12

values[0x1]

all_enables

biggest_size

2041459

1

T1

35096

T2

21

T3

9