| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 | 
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| push_pull_agent_pkg.uvm_test_top.env.m_csrng_agent.m_cmd_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| push_pull_agent_pkg.uvm_test_top.env.m_csrng_agent.m_genbits_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 4 | 0 | 4 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 4 | 0 | 4 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 4 | 0 | 4 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 3934278 | 1 | T1 | 336 | T2 | 256 | T3 | 666 | ||||
| auto[1] | 10288 | 1 | T1 | 3 | T3 | 1 | T9 | 22 | ||||
| auto[2] | 3939767 | 1 | T1 | 336 | T2 | 257 | T3 | 670 | ||||
| auto[3] | 26918 | 1 | T1 | 3 | T2 | 3 | T3 | 3 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 4 | 0 | 4 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 13480 | 1 | T1 | 1 | T2 | 1 | T3 | 1 | ||||
| auto[1] | 1290 | 1 | T9 | 1 | T11 | 37 | T15 | 1 | ||||
| auto[2] | 13795 | 1 | T1 | 2 | T2 | 2 | T3 | 3 | ||||
| auto[3] | 12833 | 1 | T1 | 1 | T2 | 1 | T3 | 1 | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |