ENTROPY_SRC Simulation Results

Wednesday September 27 2023 19:02:42 UTC

GitHub Revision: `38769a5e7`

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 2962962794

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	8.000s	44.873us	50	50	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	3.000s	32.847us	5	5	100.00
V1	csr_rw	entropy_src_csr_rw	12.000s	15.485us	20	20	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	14.000s	1.051ms	5	5	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	8.000s	765.434us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	14.000s	36.137us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	12.000s	15.485us	20	20	100.00
		entropy_src_csr_aliasing	8.000s	765.434us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	firmware	entropy_src_smoke	8.000s	44.873us	50	50	100.00
		entropy_src_rng	11.367m	10.016ms	300	300	100.00
		entropy_src_fw_ov	2.283m	5.022ms	299	300	99.67
V2	firmware_mode	entropy_src_fw_ov	2.283m	5.022ms	299	300	99.67
V2	rng_mode	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	11.233m	10.016ms	400	400	100.00
V2	health_checks	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2	conditioning	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2	interrupts	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2	alerts	entropy_src_rng	11.367m	10.016ms	300	300	100.00
		entropy_src_functional_alerts	8.000s	66.977us	50	50	100.00
V2	stress_all	entropy_src_stress_all	18.000s	339.404us	50	50	100.00
V2	functional_errors	entropy_src_functional_errors	14.000s	471.043us	1000	1000	100.00
V2	intr_test	entropy_src_intr_test	5.000s	33.945us	50	50	100.00
V2	alert_test	entropy_src_alert_test	5.000s	19.863us	50	50	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	9.000s	61.206us	20	20	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	9.000s	61.206us	20	20	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	3.000s	32.847us	5	5	100.00
		entropy_src_csr_rw	12.000s	15.485us	20	20	100.00
		entropy_src_csr_aliasing	8.000s	765.434us	5	5	100.00
		entropy_src_same_csr_outstanding	13.000s	42.360us	20	20	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	3.000s	32.847us	5	5	100.00
		entropy_src_csr_rw	12.000s	15.485us	20	20	100.00
		entropy_src_csr_aliasing	8.000s	765.434us	5	5	100.00
		entropy_src_same_csr_outstanding	13.000s	42.360us	20	20	100.00
V2		TOTAL			2239	2240	99.96
V2S	tl_intg_err	entropy_src_sec_cm	8.000s	167.516us	5	5	100.00
		entropy_src_tl_intg_err	10.000s	114.190us	20	20	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	11.367m	10.016ms	300	300	100.00
		entropy_src_cfg_regwen	8.000s	31.317us	50	50	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2S	sec_cm_config_redun	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	11.367m	10.016ms	300	300	100.00
		entropy_src_fw_ov	2.283m	5.022ms	299	300	99.67
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	14.000s	471.043us	1000	1000	100.00
		entropy_src_sec_cm	8.000s	167.516us	5	5	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	14.000s	471.043us	1000	1000	100.00
		entropy_src_sec_cm	8.000s	167.516us	5	5	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	11.367m	10.016ms	300	300	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	14.000s	471.043us	1000	1000	100.00
		entropy_src_sec_cm	8.000s	167.516us	5	5	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	14.000s	471.043us	1000	1000	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	8.000s	66.977us	50	50	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	10.000s	114.190us	20	20	100.00
V2S		TOTAL			75	75	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	11.867m	10.012ms	50	50	100.00
V3	stress_all_with_rand_reset	entropy_src_stress_all_with_rand_reset			0	0	--
V3		TOTAL			50	50	100.00
		TOTAL			2469	2470	99.96

Testplan Progress

Items	Total	Written	Passing	Progress
V1	6	6	6	100.00
V2	10	10	9	90.00
V2S	3	3	3	100.00
V3	2	1	1	50.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
98.38	98.86	97.16	99.70	96.17	99.40	97.00	91.61	96.91

Failure Buckets

Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_*/rtl/entropy_src_core.sv,2990): Assertion AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed

has 1 failures:

Test entropy_src_fw_ov has 1 failures.

77.entropy_src_fw_ov.879987463
Line 426, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/77.entropy_src_fw_ov/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_0.1/rtl/entropy_src_core.sv,2990): (time 759704043 PS) Assertion tb.dut.u_entropy_src_core.AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
  UVM_ERROR @ 759704043 ps: (entropy_src_core.sv:2990) [ASSERT FAILED] AtReset_EsbitFifoPushedIntoPosthtFifo_A
  UVM_INFO @ 759704043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---