ENTROPY_SRC Simulation Results

Saturday February 08 2025 05:05:54 UTC

GitHub Revision: 9f20940d49

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 88344288495849993302635329522992994622996067932062874150778031027723701018040

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 6.000s 42.690us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 4.000s 33.346us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 4.000s 53.206us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 17.000s 5.067ms 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 10.000s 1.745ms 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 4.000s 36.913us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 4.000s 53.206us 20 20 100.00
entropy_src_csr_aliasing 10.000s 1.745ms 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 6.000s 42.690us 50 50 100.00
entropy_src_rng 13.767m 19.066ms 300 300 100.00
entropy_src_fw_ov 15.067m 20.056ms 258 300 86.00
V2 firmware_mode entropy_src_fw_ov 15.067m 20.056ms 258 300 86.00
V2 rng_mode entropy_src_rng 13.767m 19.066ms 300 300 100.00
V2 rng_max_rate entropy_src_rng_max_rate 25.317m 20.075ms 398 400 99.50
V2 health_checks entropy_src_rng 13.767m 19.066ms 300 300 100.00
V2 conditioning entropy_src_rng 13.767m 19.066ms 300 300 100.00
V2 interrupts entropy_src_rng 13.767m 19.066ms 300 300 100.00
entropy_src_intr 37.000s 499.062us 50 50 100.00
V2 alerts entropy_src_rng 13.767m 19.066ms 300 300 100.00
entropy_src_functional_alerts 7.000s 248.878us 50 50 100.00
V2 stress_all entropy_src_stress_all 11.550m 17.257ms 50 50 100.00
V2 functional_errors entropy_src_functional_errors 15.150m 10.012ms 967 1000 96.70
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 40.000s 672.431us 50 50 100.00
V2 intr_test entropy_src_intr_test 4.000s 23.425us 50 50 100.00
V2 alert_test entropy_src_alert_test 5.000s 81.788us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 8.000s 659.927us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 8.000s 659.927us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 4.000s 33.346us 5 5 100.00
entropy_src_csr_rw 4.000s 53.206us 20 20 100.00
entropy_src_csr_aliasing 10.000s 1.745ms 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 95.525us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 4.000s 33.346us 5 5 100.00
entropy_src_csr_rw 4.000s 53.206us 20 20 100.00
entropy_src_csr_aliasing 10.000s 1.745ms 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 95.525us 20 20 100.00
V2 TOTAL 2263 2340 96.71
V2S tl_intg_err entropy_src_sec_cm 5.000s 134.431us 5 5 100.00
entropy_src_tl_intg_err 8.000s 698.996us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 13.767m 19.066ms 300 300 100.00
entropy_src_cfg_regwen 6.000s 24.023us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 13.767m 19.066ms 300 300 100.00
V2S sec_cm_config_redun entropy_src_rng 13.767m 19.066ms 300 300 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 13.767m 19.066ms 300 300 100.00
entropy_src_fw_ov 15.067m 20.056ms 258 300 86.00
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 15.150m 10.012ms 967 1000 96.70
entropy_src_sec_cm 5.000s 134.431us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 15.150m 10.012ms 967 1000 96.70
entropy_src_sec_cm 5.000s 134.431us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 13.767m 19.066ms 300 300 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 15.150m 10.012ms 967 1000 96.70
entropy_src_sec_cm 5.000s 134.431us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 15.150m 10.012ms 967 1000 96.70
entropy_src_sec_cm 5.000s 134.431us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 15.150m 10.012ms 967 1000 96.70
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 7.000s 248.878us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 8.000s 698.996us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 9.100m 17.019ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2493 2570 97.00

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 9 75.00
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.15 98.15 95.32 98.33 95.79 96.71 96.88 90.49 96.00

Failure Buckets

Past Results