SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 64 | 1 | T5 | 1 | T32 | 1 | T344 | 1 | |||
others[1] | 71 | 1 | T5 | 2 | T37 | 3 | T32 | 2 | |||
others[2] | 50 | 1 | T5 | 1 | T32 | 2 | T344 | 2 | |||
others[3] | 117 | 1 | T5 | 2 | T37 | 3 | T32 | 2 | |||
false | 24503 | 1 | T12 | 3 | T22 | 1 | T23 | 1 | |||
true | 20205 | 1 | T23 | 1 | T63 | 2 | T64 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 5 | 1 | T27 | 1 | T345 | 1 | T346 | 1 | |||
others[1] | 6 | 1 | T98 | 1 | T25 | 1 | T103 | 1 | |||
others[2] | 2 | 1 | T181 | 1 | T101 | 1 | - | - | |||
others[3] | 8 | 1 | T99 | 1 | T183 | 1 | T28 | 1 | |||
false | 10715 | 1 | T12 | 3 | T22 | 1 | T23 | 1 | |||
true | 1 | 1 | T222 | 1 | - | - | - | - |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2168 | 1 | T40 | 57 | T48 | 34 | T37 | 3 | |||
others[1] | 2150 | 1 | T5 | 1 | T40 | 72 | T48 | 45 | |||
others[2] | 2186 | 1 | T5 | 1 | T40 | 69 | T48 | 49 | |||
others[3] | 3593 | 1 | T5 | 1 | T40 | 100 | T48 | 57 | |||
false | 6168 | 1 | T12 | 3 | T22 | 1 | T23 | 1 | |||
true | 1303 | 1 | T23 | 1 | T63 | 1 | T64 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2214 | 1 | T40 | 65 | T48 | 55 | T32 | 2 | |||
others[1] | 2153 | 1 | T5 | 2 | T40 | 55 | T48 | 42 | |||
others[2] | 2164 | 1 | T5 | 1 | T40 | 80 | T48 | 35 | |||
others[3] | 3482 | 1 | T5 | 2 | T40 | 92 | T48 | 52 | |||
false | 6263 | 1 | T12 | 3 | T22 | 1 | T23 | 1 | |||
true | 1298 | 1 | T23 | 1 | T63 | 1 | T64 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2032 | 1 | T40 | 81 | T48 | 38 | T191 | 41 | |||
others[1] | 2151 | 1 | T16 | 1 | T40 | 73 | T48 | 49 | |||
others[2] | 2114 | 1 | T40 | 63 | T48 | 32 | T191 | 71 | |||
others[3] | 3644 | 1 | T40 | 112 | T48 | 56 | T191 | 110 | |||
false | 6630 | 1 | T12 | 3 | T22 | 1 | T23 | 1 | |||
true | 29 | 1 | T223 | 1 | T347 | 1 | T228 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 68 | 1 | T5 | 3 | T37 | 2 | T32 | 1 | |||
others[1] | 68 | 1 | T5 | 3 | T37 | 2 | T32 | 1 | |||
others[2] | 67 | 1 | T5 | 2 | T37 | 2 | T32 | 2 | |||
others[3] | 103 | 1 | T5 | 1 | T37 | 3 | T32 | 4 | |||
false | 24603 | 1 | T12 | 3 | T22 | 1 | T23 | 1 | |||
true | 20309 | 1 | T23 | 1 | T63 | 1 | T64 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 6919 | 1 | T40 | 211 | T48 | 124 | T191 | 221 | |||
others[1] | 6867 | 1 | T40 | 224 | T48 | 127 | T191 | 168 | |||
others[2] | 6987 | 1 | T40 | 228 | T48 | 133 | T191 | 230 | |||
others[3] | 11670 | 1 | T40 | 377 | T48 | 219 | T191 | 357 | |||
false | 3593 | 1 | T40 | 128 | T48 | 56 | T191 | 110 | |||
true | 17036 | 1 | T12 | 3 | T22 | 1 | T23 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |