Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_flash_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	20197338	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	6779022	1		T12	250		T45	59		T46	60

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	23126795	1		T12	129		T45	77		T46	77
values[0x0]	1924226	1		T12	105		T45	35		T46	39
values[0x1]	1925339	1		T12	236		T45	30		T46	26

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13517258	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	13459102	1		T12	373		T45	78		T46	87

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	83532	1		T12	1		T45	1		T46	1
valid_sources[0x01]	81236	1		T12	5		T45	1		T46	2
valid_sources[0x02]	110937	1		T12	2		T47	97		T48	16
valid_sources[0x03]	83046	1		T12	4		T47	90		T51	1
valid_sources[0x04]	109204	1		T12	1		T45	2		T46	1
valid_sources[0x05]	120557	1		T12	1		T46	1		T47	81
valid_sources[0x06]	84400	1		T12	1		T47	99		T50	4
valid_sources[0x07]	86119	1		T12	3		T47	114		T48	18
valid_sources[0x08]	80982	1		T12	1		T47	91		T50	2
valid_sources[0x09]	82544	1		T47	97		T48	3		T49	1
valid_sources[0x0a]	81357	1		T12	3		T45	1		T46	1
valid_sources[0x0b]	83299	1		T47	75		T50	3		T48	9
valid_sources[0x0c]	82537	1		T47	106		T50	2		T51	1
valid_sources[0x0d]	82218	1		T12	3		T45	1		T46	1
valid_sources[0x0e]	84645	1		T12	1		T47	106		T50	6
valid_sources[0x0f]	101108	1		T12	2		T46	1		T47	108
valid_sources[0x10]	85121	1		T12	2		T47	80		T51	2
valid_sources[0x11]	81969	1		T47	100		T48	25		T49	1
valid_sources[0x12]	84498	1		T12	5		T46	1		T47	100
valid_sources[0x13]	82036	1		T12	2		T46	1		T47	82
valid_sources[0x14]	101899	1		T12	1		T45	1		T47	146
valid_sources[0x15]	82666	1		T12	4		T45	1		T46	2
valid_sources[0x16]	81827	1		T12	2		T45	1		T47	94
valid_sources[0x17]	86977	1		T47	102		T50	2		T48	11
valid_sources[0x18]	83557	1		T12	3		T45	2		T47	101
valid_sources[0x19]	193596	1		T12	1		T45	1		T47	98
valid_sources[0x1a]	83187	1		T12	1		T47	90		T48	17
valid_sources[0x1b]	84458	1		T12	1		T45	2		T46	1
valid_sources[0x1c]	196083	1		T45	1		T47	103		T50	1
valid_sources[0x1d]	82617	1		T12	3		T45	3		T47	99
valid_sources[0x1e]	213054	1		T12	3		T45	1		T47	116
valid_sources[0x1f]	86355	1		T12	2		T47	103		T50	1
valid_sources[0x20]	168003	1		T12	2		T45	1		T47	86
valid_sources[0x21]	84243	1		T47	109		T50	1		T51	3
valid_sources[0x22]	81670	1		T12	1		T47	113		T50	3
valid_sources[0x23]	82692	1		T12	2		T46	1		T47	112
valid_sources[0x24]	83029	1		T12	1		T45	2		T46	1
valid_sources[0x25]	86128	1		T47	102		T50	5		T48	12
valid_sources[0x26]	85516	1		T12	2		T45	1		T47	99
valid_sources[0x27]	228362	1		T12	2		T45	1		T47	102
valid_sources[0x28]	82890	1		T46	1		T47	110		T50	1
valid_sources[0x29]	128001	1		T12	4		T46	1		T47	88
valid_sources[0x2a]	97049	1		T12	1		T46	2		T47	129
valid_sources[0x2b]	82151	1		T12	4		T45	1		T47	95
valid_sources[0x2c]	114418	1		T12	4		T47	103		T51	7
valid_sources[0x2d]	102404	1		T12	1		T45	2		T47	77
valid_sources[0x2e]	83121	1		T12	2		T45	1		T46	1
valid_sources[0x2f]	83415	1		T12	1		T46	1		T47	114
valid_sources[0x30]	82001	1		T12	2		T45	1		T46	1
valid_sources[0x31]	206258	1		T12	3		T45	1		T47	101
valid_sources[0x32]	83231	1		T12	2		T47	123		T53	2
valid_sources[0x33]	88680	1		T12	3		T46	2		T47	84
valid_sources[0x34]	139729	1		T12	1		T47	92		T48	20
valid_sources[0x35]	111243	1		T12	5		T47	123		T48	27
valid_sources[0x36]	82690	1		T12	1		T46	1		T47	107
valid_sources[0x37]	85267	1		T12	1		T45	1		T47	88
valid_sources[0x38]	83048	1		T12	2		T46	1		T47	127
valid_sources[0x39]	82828	1		T45	1		T46	3		T47	106
valid_sources[0x3a]	82669	1		T12	1		T45	1		T47	96
valid_sources[0x3b]	227107	1		T45	1		T47	84		T50	2
valid_sources[0x3c]	95930	1		T12	5		T45	1		T47	122
valid_sources[0x3d]	136072	1		T46	1		T47	106		T50	4
valid_sources[0x3e]	83756	1		T12	3		T45	2		T46	1
valid_sources[0x3f]	82776	1		T12	3		T47	106		T50	3
valid_sources[0x40]	82080	1		T12	1		T46	1		T47	91
valid_sources[0x41]	93152	1		T12	2		T47	105		T51	2
valid_sources[0x42]	84683	1		T12	1		T47	99		T51	5
valid_sources[0x43]	83242	1		T12	4		T47	114		T50	1
valid_sources[0x44]	83033	1		T12	1		T47	102		T48	25
valid_sources[0x45]	82170	1		T12	1		T45	2		T47	108
valid_sources[0x46]	82607	1		T12	1		T47	107		T48	24
valid_sources[0x47]	84753	1		T46	1		T47	107		T50	1
valid_sources[0x48]	108756	1		T12	1		T47	114		T53	1
valid_sources[0x49]	96524	1		T12	1		T46	1		T47	93
valid_sources[0x4a]	109750	1		T12	2		T45	3		T47	112
valid_sources[0x4b]	83804	1		T12	4		T46	1		T47	98
valid_sources[0x4c]	83292	1		T12	5		T47	83		T51	12
valid_sources[0x4d]	83934	1		T12	1		T47	109		T51	1
valid_sources[0x4e]	81639	1		T45	3		T46	1		T47	100
valid_sources[0x4f]	83226	1		T12	2		T46	2		T47	114
valid_sources[0x50]	94689	1		T45	2		T47	99		T50	4
valid_sources[0x51]	82001	1		T12	1		T45	1		T46	1
valid_sources[0x52]	131343	1		T12	1		T47	116		T48	18
valid_sources[0x53]	105326	1		T12	1		T46	1		T47	123
valid_sources[0x54]	103450	1		T46	2		T47	102		T50	3
valid_sources[0x55]	81023	1		T12	4		T45	2		T47	109
valid_sources[0x56]	251404	1		T46	2		T47	116		T48	23
valid_sources[0x57]	81928	1		T46	2		T47	109		T50	4
valid_sources[0x58]	82139	1		T46	1		T47	122		T51	2
valid_sources[0x59]	85829	1		T12	1		T47	93		T50	3
valid_sources[0x5a]	226505	1		T12	1		T46	1		T47	89
valid_sources[0x5b]	81733	1		T45	1		T47	108		T50	2
valid_sources[0x5c]	81635	1		T12	3		T45	2		T47	100
valid_sources[0x5d]	82859	1		T12	1		T46	2		T47	101
valid_sources[0x5e]	82684	1		T12	1		T45	1		T47	76
valid_sources[0x5f]	81334	1		T47	91		T51	1		T48	9
valid_sources[0x60]	82937	1		T46	1		T47	100		T51	1
valid_sources[0x61]	83379	1		T12	1		T46	3		T47	91
valid_sources[0x62]	169920	1		T12	3		T47	76		T48	37
valid_sources[0x63]	84322	1		T12	1		T47	104		T50	1
valid_sources[0x64]	83036	1		T45	1		T47	93		T48	17
valid_sources[0x65]	115571	1		T12	4		T46	3		T47	113
valid_sources[0x66]	98249	1		T12	4		T45	1		T47	125
valid_sources[0x67]	82239	1		T12	1		T47	85		T50	1
valid_sources[0x68]	169006	1		T12	2		T45	2		T46	1
valid_sources[0x69]	83037	1		T45	3		T46	1		T47	122
valid_sources[0x6a]	83262	1		T12	1		T47	93		T50	1
valid_sources[0x6b]	279491	1		T12	2		T47	94		T51	12
valid_sources[0x6c]	81146	1		T46	2		T47	107		T51	3
valid_sources[0x6d]	86087	1		T12	1		T46	1		T47	88
valid_sources[0x6e]	111457	1		T12	3		T45	2		T47	96
valid_sources[0x6f]	95209	1		T12	3		T45	1		T46	1
valid_sources[0x70]	82097	1		T12	1		T47	87		T48	12
valid_sources[0x71]	83023	1		T12	1		T45	1		T47	96
valid_sources[0x72]	83782	1		T12	3		T46	1		T47	95
valid_sources[0x73]	83600	1		T45	1		T46	2		T47	84
valid_sources[0x74]	129332	1		T12	1		T45	1		T47	95
valid_sources[0x75]	84800	1		T12	1		T47	111		T50	1
valid_sources[0x76]	117397	1		T12	1		T45	1		T46	1
valid_sources[0x77]	82775	1		T12	2		T47	90		T50	1
valid_sources[0x78]	87952	1		T12	1		T46	1		T47	134
valid_sources[0x79]	107691	1		T12	1		T47	81		T48	23
valid_sources[0x7a]	102235	1		T47	101		T51	1		T48	41
valid_sources[0x7b]	82545	1		T12	4		T47	101		T51	5
valid_sources[0x7c]	85074	1		T12	1		T47	113		T50	1
valid_sources[0x7d]	85621	1		T45	1		T47	103		T51	2
valid_sources[0x7e]	84281	1		T12	2		T46	1		T47	99
valid_sources[0x7f]	82104	1		T12	4		T45	2		T46	2
valid_sources[0x80]	82175	1		T12	1		T45	1		T47	95

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3504166

1

T12

48

T45

11

T46

12

values[0x0]

all_enables

biggest_size

1718059

1

T12

95

T45

26

T46

31

values[0x1]

all_enables

biggest_size

1556797

1

T12

107

T45

22

T46

17

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2088	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4165523	1		T12	398		T50	18		T53	134

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	4159443	1		T12	93		T50	4		T53	26
values[0x0]	3322	1		T12	168		T50	11		T53	50
values[0x1]	4846	1		T12	211		T50	12		T53	76

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	797	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4166814	1		T12	438		T50	22		T53	144

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	16069	1		T12	4		T127	1		T131	3
valid_sources[0x01]	15895	1		T12	3		T53	2		T124	1
valid_sources[0x02]	16068	1		T12	3		T124	3		T127	1
valid_sources[0x03]	16083	1		T12	2		T127	2		T128	1
valid_sources[0x04]	16620	1		T51	3		T126	1		T128	1
valid_sources[0x05]	15458	1		T12	4		T51	6		T127	2
valid_sources[0x06]	15661	1		T12	3		T126	2		T128	1
valid_sources[0x07]	17215	1		T124	1		T126	2		T127	1
valid_sources[0x08]	16652	1		T12	2		T124	1		T127	1
valid_sources[0x09]	16155	1		T12	1		T53	1		T408	1
valid_sources[0x0a]	16043	1		T12	4		T126	6		T127	1
valid_sources[0x0b]	16458	1		T12	3		T126	5		T127	3
valid_sources[0x0c]	15843	1		T12	2		T124	2		T128	1
valid_sources[0x0d]	16274	1		T12	3		T124	2		T128	1
valid_sources[0x0e]	16112	1		T53	5		T126	1		T127	1
valid_sources[0x0f]	16873	1		T12	3		T53	2		T51	1
valid_sources[0x10]	16347	1		T12	3		T124	4		T127	2
valid_sources[0x11]	16541	1		T12	5		T124	2		T126	1
valid_sources[0x12]	16636	1		T12	5		T124	2		T126	1
valid_sources[0x13]	17402	1		T12	1		T51	3		T126	7
valid_sources[0x14]	15929	1		T12	2		T51	1		T126	3
valid_sources[0x15]	16487	1		T12	5		T126	1		T127	1
valid_sources[0x16]	16630	1		T12	1		T126	1		T408	2
valid_sources[0x17]	16253	1		T12	4		T243	1		T127	1
valid_sources[0x18]	16654	1		T124	1		T128	2		T408	1
valid_sources[0x19]	16715	1		T124	1		T126	3		T127	1
valid_sources[0x1a]	15419	1		T12	2		T124	1		T127	3
valid_sources[0x1b]	15965	1		T12	2		T124	2		T126	2
valid_sources[0x1c]	16355	1		T12	1		T53	1		T124	4
valid_sources[0x1d]	16735	1		T12	5		T127	1		T408	1
valid_sources[0x1e]	15873	1		T12	1		T124	6		T243	2
valid_sources[0x1f]	16133	1		T124	1		T128	1		T131	3
valid_sources[0x20]	15888	1		T12	3		T53	2		T124	1
valid_sources[0x21]	15735	1		T12	1		T53	4		T51	1
valid_sources[0x22]	16033	1		T12	2		T124	2		T127	1
valid_sources[0x23]	15916	1		T12	1		T126	1		T127	2
valid_sources[0x24]	16135	1		T12	2		T124	2		T128	1
valid_sources[0x25]	16435	1		T12	2		T124	7		T127	1
valid_sources[0x26]	15912	1		T12	2		T124	3		T126	3
valid_sources[0x27]	16346	1		T12	2		T124	2		T127	1
valid_sources[0x28]	16003	1		T12	2		T124	1		T126	1
valid_sources[0x29]	16836	1		T12	3		T124	2		T126	2
valid_sources[0x2a]	16532	1		T12	4		T124	4		T127	2
valid_sources[0x2b]	15769	1		T12	4		T408	1		T131	5
valid_sources[0x2c]	16523	1		T12	1		T53	1		T124	2
valid_sources[0x2d]	16826	1		T12	3		T124	2		T128	1
valid_sources[0x2e]	15645	1		T12	2		T51	1		T124	1
valid_sources[0x2f]	16186	1		T51	4		T124	1		T131	1
valid_sources[0x30]	16336	1		T12	2		T124	4		T128	4
valid_sources[0x31]	16408	1		T124	2		T127	1		T128	1
valid_sources[0x32]	16816	1		T124	1		T128	1		T408	1
valid_sources[0x33]	16358	1		T12	4		T124	4		T127	3
valid_sources[0x34]	16827	1		T12	2		T53	5		T124	1
valid_sources[0x35]	16633	1		T12	4		T127	2		T128	2
valid_sources[0x36]	16433	1		T12	2		T53	4		T124	1
valid_sources[0x37]	15622	1		T12	3		T124	2		T127	1
valid_sources[0x38]	16435	1		T127	2		T128	1		T408	1
valid_sources[0x39]	15797	1		T12	2		T124	1		T408	1
valid_sources[0x3a]	15989	1		T124	1		T126	2		T127	1
valid_sources[0x3b]	15962	1		T12	2		T124	1		T126	1
valid_sources[0x3c]	16411	1		T12	4		T124	1		T126	1
valid_sources[0x3d]	16210	1		T124	2		T127	1		T408	1
valid_sources[0x3e]	16679	1		T12	2		T53	8		T408	1
valid_sources[0x3f]	16697	1		T12	2		T53	2		T126	4
valid_sources[0x40]	15828	1		T124	1		T127	2		T132	1
valid_sources[0x41]	16027	1		T12	1		T124	2		T127	1
valid_sources[0x42]	16416	1		T12	1		T127	2		T408	2
valid_sources[0x43]	16720	1		T12	1		T126	3		T408	1
valid_sources[0x44]	16195	1		T12	2		T127	1		T128	1
valid_sources[0x45]	16214	1		T12	1		T131	1		T132	3
valid_sources[0x46]	17073	1		T12	3		T124	2		T126	1
valid_sources[0x47]	17115	1		T12	1		T53	1		T408	1
valid_sources[0x48]	17004	1		T12	2		T128	1		T408	1
valid_sources[0x49]	15582	1		T53	1		T124	6		T127	6
valid_sources[0x4a]	16351	1		T12	1		T51	2		T124	8
valid_sources[0x4b]	15628	1		T12	3		T124	1		T127	1
valid_sources[0x4c]	16567	1		T12	2		T126	2		T127	1
valid_sources[0x4d]	15777	1		T12	1		T127	2		T128	1
valid_sources[0x4e]	16768	1		T124	4		T128	1		T130	1
valid_sources[0x4f]	16125	1		T12	1		T124	2		T127	2
valid_sources[0x50]	16147	1		T12	3		T124	2		T126	3
valid_sources[0x51]	16103	1		T12	6		T126	1		T127	1
valid_sources[0x52]	16643	1		T12	1		T51	2		T244	5
valid_sources[0x53]	16659	1		T12	1		T124	2		T126	2
valid_sources[0x54]	16060	1		T12	3		T124	3		T244	1
valid_sources[0x55]	16424	1		T12	1		T51	1		T124	1
valid_sources[0x56]	15939	1		T12	2		T127	1		T408	2
valid_sources[0x57]	16476	1		T124	1		T243	1		T127	2
valid_sources[0x58]	16621	1		T12	1		T51	4		T127	1
valid_sources[0x59]	16669	1		T12	2		T124	1		T127	1
valid_sources[0x5a]	16174	1		T51	5		T127	1		T408	2
valid_sources[0x5b]	17073	1		T12	3		T124	1		T128	1
valid_sources[0x5c]	16489	1		T12	1		T124	1		T127	3
valid_sources[0x5d]	16426	1		T124	1		T127	1		T132	4
valid_sources[0x5e]	16210	1		T12	1		T124	2		T127	1
valid_sources[0x5f]	16504	1		T12	3		T124	3		T127	2
valid_sources[0x60]	16009	1		T12	1		T127	2		T408	1
valid_sources[0x61]	15893	1		T53	1		T124	1		T126	2
valid_sources[0x62]	16372	1		T12	1		T127	5		T408	2
valid_sources[0x63]	16699	1		T12	1		T124	2		T126	4
valid_sources[0x64]	16146	1		T12	4		T244	2		T408	1
valid_sources[0x65]	16492	1		T12	2		T53	3		T124	2
valid_sources[0x66]	16191	1		T12	2		T53	4		T126	1
valid_sources[0x67]	15977	1		T124	3		T126	4		T127	1
valid_sources[0x68]	16493	1		T12	1		T124	4		T244	1
valid_sources[0x69]	16758	1		T12	1		T124	4		T131	1
valid_sources[0x6a]	16054	1		T12	3		T123	15		T127	1
valid_sources[0x6b]	16175	1		T12	4		T124	2		T127	2
valid_sources[0x6c]	16509	1		T12	2		T124	3		T127	1
valid_sources[0x6d]	17054	1		T12	1		T124	2		T127	1
valid_sources[0x6e]	16698	1		T12	1		T124	2		T126	2
valid_sources[0x6f]	16163	1		T12	5		T124	2		T126	4
valid_sources[0x70]	15941	1		T12	2		T124	2		T126	2
valid_sources[0x71]	16277	1		T12	2		T126	1		T127	1
valid_sources[0x72]	16727	1		T12	1		T51	2		T48	10
valid_sources[0x73]	15968	1		T12	1		T126	8		T244	1
valid_sources[0x74]	16584	1		T12	2		T243	1		T127	1
valid_sources[0x75]	16536	1		T12	1		T124	1		T126	4
valid_sources[0x76]	15975	1		T12	2		T127	1		T128	2
valid_sources[0x77]	15934	1		T12	5		T130	1		T131	2
valid_sources[0x78]	16658	1		T12	2		T53	4		T124	1
valid_sources[0x79]	16092	1		T12	2		T53	1		T124	3
valid_sources[0x7a]	16167	1		T51	2		T127	1		T408	2
valid_sources[0x7b]	16215	1		T12	2		T127	1		T408	1
valid_sources[0x7c]	16474	1		T12	2		T124	1		T126	2
valid_sources[0x7d]	16901	1		T124	2		T128	2		T408	1
valid_sources[0x7e]	16208	1		T12	2		T127	1		T128	1
valid_sources[0x7f]	15944	1		T12	2		T53	8		T124	1
valid_sources[0x80]	16016	1		T12	1		T127	1		T408	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4159335

1

T12

93

T50

4

T53

26

values[0x0]

all_enables

biggest_size

3106

1

T12

159

T50

8

T53

48

values[0x1]

all_enables

biggest_size

3082

1

T12

146

T50

6

T53

60

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34986	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	34560	1		T12	539		T47	2894		T50	36

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	43614	1		T12	159		T47	2688		T50	51
values[0x0]	12606	1		T12	199		T47	1351		T50	10
values[0x1]	13326	1		T12	211		T47	1337		T50	10

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25213	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	44333	1		T12	553		T47	3414		T50	42

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	228	1		T12	1		T52	7		T126	3
valid_sources[0x01]	153	1		T53	1		T52	2		T243	6
valid_sources[0x02]	227	1		T12	3		T51	2		T49	1
valid_sources[0x03]	212	1		T12	7		T53	2		T52	1
valid_sources[0x04]	162	1		T12	2		T49	1		T243	1
valid_sources[0x05]	181	1		T12	2		T52	7		T243	5
valid_sources[0x06]	281	1		T12	2		T53	1		T51	5
valid_sources[0x07]	116	1		T12	1		T51	1		T243	1
valid_sources[0x08]	180	1		T12	2		T53	3		T51	1
valid_sources[0x09]	272	1		T53	2		T51	1		T243	8
valid_sources[0x0a]	229	1		T12	1		T53	4		T51	1
valid_sources[0x0b]	606	1		T12	1		T53	1		T52	8
valid_sources[0x0c]	168	1		T12	3		T51	1		T123	1
valid_sources[0x0d]	196	1		T12	1		T53	1		T243	2
valid_sources[0x0e]	202	1		T12	5		T53	2		T51	1
valid_sources[0x0f]	181	1		T12	3		T51	4		T52	4
valid_sources[0x10]	232	1		T51	3		T48	35		T52	10
valid_sources[0x11]	191	1		T51	1		T123	3		T124	4
valid_sources[0x12]	179	1		T12	2		T51	1		T243	1
valid_sources[0x13]	254	1		T51	3		T123	1		T52	3
valid_sources[0x14]	209	1		T12	5		T52	1		T243	3
valid_sources[0x15]	266	1		T12	2		T48	40		T52	3
valid_sources[0x16]	170	1		T12	8		T53	1		T51	1
valid_sources[0x17]	175	1		T12	1		T53	2		T51	1
valid_sources[0x18]	250	1		T12	4		T53	2		T52	2
valid_sources[0x19]	308	1		T12	4		T53	2		T52	2
valid_sources[0x1a]	168	1		T12	1		T51	1		T243	1
valid_sources[0x1b]	187	1		T51	2		T243	1		T126	2
valid_sources[0x1c]	203	1		T12	5		T52	2		T126	3
valid_sources[0x1d]	223	1		T12	2		T53	4		T51	1
valid_sources[0x1e]	168	1		T12	1		T53	1		T124	3
valid_sources[0x1f]	222	1		T48	36		T244	4		T245	35
valid_sources[0x20]	157	1		T12	5		T52	5		T243	2
valid_sources[0x21]	140	1		T12	2		T52	4		T243	2
valid_sources[0x22]	259	1		T51	2		T243	4		T244	4
valid_sources[0x23]	275	1		T12	3		T51	2		T49	2
valid_sources[0x24]	162	1		T12	4		T51	1		T52	1
valid_sources[0x25]	168	1		T51	3		T123	1		T52	5
valid_sources[0x26]	207	1		T12	5		T53	2		T51	1
valid_sources[0x27]	274	1		T12	1		T53	1		T243	1
valid_sources[0x28]	267	1		T243	2		T126	1		T244	7
valid_sources[0x29]	202	1		T12	1		T53	1		T52	2
valid_sources[0x2a]	157	1		T12	3		T53	1		T123	1
valid_sources[0x2b]	302	1		T52	2		T243	10		T126	1
valid_sources[0x2c]	171	1		T12	5		T52	3		T243	3
valid_sources[0x2d]	670	1		T12	1		T53	3		T51	1
valid_sources[0x2e]	221	1		T12	2		T243	2		T244	5
valid_sources[0x2f]	264	1		T12	2		T51	1		T124	34
valid_sources[0x30]	223	1		T12	4		T53	2		T243	5
valid_sources[0x31]	224	1		T12	6		T50	2		T53	1
valid_sources[0x32]	229	1		T51	3		T243	8		T126	1
valid_sources[0x33]	145	1		T12	2		T53	1		T51	1
valid_sources[0x34]	225	1		T12	2		T53	1		T51	2
valid_sources[0x35]	159	1		T12	2		T52	2		T243	1
valid_sources[0x36]	250	1		T12	5		T126	2		T244	7
valid_sources[0x37]	209	1		T53	1		T51	2		T52	2
valid_sources[0x38]	200	1		T12	3		T53	1		T243	6
valid_sources[0x39]	1488	1		T12	3		T53	2		T52	10
valid_sources[0x3a]	211	1		T12	1		T123	1		T52	1
valid_sources[0x3b]	202	1		T12	3		T53	1		T52	1
valid_sources[0x3c]	581	1		T12	1		T123	3		T250	2
valid_sources[0x3d]	256	1		T12	2		T51	7		T48	29
valid_sources[0x3e]	224	1		T12	2		T53	1		T243	1
valid_sources[0x3f]	152	1		T12	7		T53	1		T243	6
valid_sources[0x40]	173	1		T12	2		T53	1		T243	4
valid_sources[0x41]	455	1		T12	5		T51	3		T126	2
valid_sources[0x42]	232	1		T12	1		T53	1		T49	1
valid_sources[0x43]	221	1		T12	8		T123	1		T52	4
valid_sources[0x44]	264	1		T12	3		T53	1		T51	1
valid_sources[0x45]	231	1		T12	1		T123	4		T52	1
valid_sources[0x46]	213	1		T12	2		T52	1		T243	6
valid_sources[0x47]	202	1		T12	1		T124	13		T250	1
valid_sources[0x48]	245	1		T12	1		T53	2		T51	2
valid_sources[0x49]	549	1		T47	384		T51	1		T52	13
valid_sources[0x4a]	342	1		T12	5		T52	1		T243	1
valid_sources[0x4b]	168	1		T12	2		T53	3		T51	3
valid_sources[0x4c]	371	1		T12	2		T123	1		T124	10
valid_sources[0x4d]	188	1		T51	1		T52	2		T243	3
valid_sources[0x4e]	211	1		T12	2		T53	2		T52	2
valid_sources[0x4f]	274	1		T12	3		T52	1		T243	3
valid_sources[0x50]	220	1		T12	3		T53	2		T123	3
valid_sources[0x51]	225	1		T12	2		T53	2		T52	9
valid_sources[0x52]	182	1		T12	3		T243	5		T126	2
valid_sources[0x53]	191	1		T53	3		T124	11		T52	3
valid_sources[0x54]	219	1		T12	3		T53	1		T51	1
valid_sources[0x55]	187	1		T12	2		T53	1		T51	1
valid_sources[0x56]	145	1		T243	1		T244	6		T127	8
valid_sources[0x57]	170	1		T12	6		T123	1		T124	1
valid_sources[0x58]	374	1		T53	3		T51	2		T48	157
valid_sources[0x59]	179	1		T12	1		T53	1		T51	2
valid_sources[0x5a]	239	1		T12	1		T50	9		T53	3
valid_sources[0x5b]	225	1		T12	2		T52	3		T243	2
valid_sources[0x5c]	271	1		T12	1		T53	1		T51	1
valid_sources[0x5d]	188	1		T123	1		T52	1		T243	3
valid_sources[0x5e]	208	1		T52	4		T243	1		T126	5
valid_sources[0x5f]	582	1		T12	1		T51	1		T243	4
valid_sources[0x60]	193	1		T53	1		T51	3		T243	6
valid_sources[0x61]	184	1		T12	1		T53	2		T52	3
valid_sources[0x62]	237	1		T12	2		T51	2		T243	5
valid_sources[0x63]	324	1		T12	2		T51	1		T52	17
valid_sources[0x64]	158	1		T12	1		T51	1		T124	6
valid_sources[0x65]	231	1		T53	3		T51	1		T123	6
valid_sources[0x66]	259	1		T12	2		T53	4		T51	1
valid_sources[0x67]	211	1		T12	2		T53	1		T49	5
valid_sources[0x68]	239	1		T12	6		T49	4		T52	2
valid_sources[0x69]	217	1		T12	4		T51	1		T52	1
valid_sources[0x6a]	266	1		T12	1		T53	1		T123	2
valid_sources[0x6b]	159	1		T51	1		T123	2		T49	1
valid_sources[0x6c]	191	1		T12	3		T53	2		T51	1
valid_sources[0x6d]	725	1		T12	2		T47	512		T53	2
valid_sources[0x6e]	256	1		T12	2		T53	3		T51	1
valid_sources[0x6f]	252	1		T12	1		T53	1		T51	1
valid_sources[0x70]	379	1		T12	2		T53	1		T52	4
valid_sources[0x71]	248	1		T12	4		T53	3		T243	5
valid_sources[0x72]	133	1		T12	3		T51	1		T243	2
valid_sources[0x73]	199	1		T12	1		T53	1		T52	6
valid_sources[0x74]	204	1		T12	5		T53	3		T52	15
valid_sources[0x75]	269	1		T12	1		T53	1		T51	2
valid_sources[0x76]	217	1		T12	3		T53	3		T123	2
valid_sources[0x77]	261	1		T51	1		T52	3		T243	2
valid_sources[0x78]	146	1		T52	1		T243	6		T244	5
valid_sources[0x79]	181	1		T12	2		T53	1		T52	2
valid_sources[0x7a]	149	1		T51	1		T243	8		T126	2
valid_sources[0x7b]	202	1		T12	1		T52	6		T250	1
valid_sources[0x7c]	190	1		T12	6		T51	1		T123	1
valid_sources[0x7d]	153	1		T12	4		T124	1		T244	2
valid_sources[0x7e]	195	1		T12	1		T53	2		T243	2
valid_sources[0x7f]	282	1		T12	4		T52	2		T126	1
valid_sources[0x80]	293	1		T12	2		T53	2		T51	1