SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 78 | 1 | T5 | 2 | T62 | 3 | T168 | 1 | |||
others[1] | 78 | 1 | T62 | 2 | T168 | 2 | T352 | 1 | |||
others[2] | 88 | 1 | T5 | 1 | T168 | 1 | T352 | 2 | |||
others[3] | 151 | 1 | T5 | 3 | T62 | 4 | T168 | 4 | |||
false | 28282 | 1 | T1 | 9 | T2 | 1 | T3 | 1 | |||
true | 23732 | 1 | T2 | 1 | T3 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 4 | 1 | T35 | 1 | T36 | 1 | T33 | 1 | |||
others[1] | 4 | 1 | T28 | 1 | T99 | 1 | T32 | 1 | |||
others[2] | 3 | 1 | T29 | 1 | T353 | 1 | T354 | 1 | |||
others[3] | 4 | 1 | T101 | 1 | T355 | 1 | T356 | 1 | |||
false | 11955 | 1 | T1 | 9 | T2 | 1 | T3 | 1 | |||
true | 4 | 1 | T100 | 1 | T357 | 1 | T358 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2549 | 1 | T5 | 1 | T25 | 39 | T42 | 74 | |||
others[1] | 2539 | 1 | T5 | 2 | T25 | 33 | T42 | 67 | |||
others[2] | 2554 | 1 | T5 | 1 | T25 | 23 | T42 | 73 | |||
others[3] | 4251 | 1 | T5 | 2 | T17 | 2 | T25 | 60 | |||
false | 6664 | 1 | T1 | 9 | T2 | 1 | T3 | 1 | |||
true | 1447 | 1 | T2 | 1 | T3 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2535 | 1 | T5 | 2 | T25 | 29 | T42 | 64 | |||
others[1] | 2465 | 1 | T25 | 25 | T42 | 67 | T178 | 29 | |||
others[2] | 2478 | 1 | T5 | 1 | T25 | 34 | T42 | 75 | |||
others[3] | 4282 | 1 | T17 | 2 | T25 | 60 | T42 | 139 | |||
false | 6804 | 1 | T1 | 9 | T2 | 1 | T3 | 1 | |||
true | 1448 | 1 | T2 | 1 | T3 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2489 | 1 | T17 | 2 | T25 | 36 | T42 | 58 | |||
others[1] | 2471 | 1 | T25 | 29 | T359 | 1 | T42 | 75 | |||
others[2] | 2479 | 1 | T25 | 27 | T42 | 87 | T178 | 42 | |||
others[3] | 4092 | 1 | T105 | 1 | T25 | 60 | T42 | 120 | |||
false | 7226 | 1 | T1 | 9 | T2 | 1 | T3 | 1 | |||
true | 45 | 1 | T22 | 1 | T182 | 1 | T183 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 71 | 1 | T5 | 1 | T62 | 2 | T352 | 1 | |||
others[1] | 66 | 1 | T5 | 2 | T62 | 1 | T168 | 4 | |||
others[2] | 81 | 1 | T5 | 1 | T62 | 1 | T168 | 1 | |||
others[3] | 153 | 1 | T5 | 4 | T62 | 4 | T352 | 3 | |||
false | 28301 | 1 | T1 | 9 | T2 | 1 | T3 | 1 | |||
true | 23879 | 1 | T2 | 1 | T3 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 8299 | 1 | T25 | 108 | T42 | 247 | T178 | 79 | |||
others[1] | 8196 | 1 | T25 | 112 | T42 | 234 | T178 | 92 | |||
others[2] | 8252 | 1 | T25 | 108 | T42 | 253 | T178 | 86 | |||
others[3] | 13537 | 1 | T25 | 184 | T42 | 388 | T178 | 164 | |||
false | 4050 | 1 | T25 | 45 | T42 | 122 | T178 | 43 | |||
true | 19379 | 1 | T1 | 9 | T2 | 1 | T3 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |