Line Coverage for Module :
flash_ctrl_erase
| Line No. | Total | Covered | Percent |
TOTAL | | 9 | 9 | 100.00 |
CONT_ASSIGN | 41 | 0 | 0 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
ALWAYS | 47 | 3 | 3 | 100.00 |
CONT_ASSIGN | 54 | 1 | 1 | 100.00 |
CONT_ASSIGN | 55 | 1 | 1 | 100.00 |
CONT_ASSIGN | 56 | 1 | 1 | 100.00 |
CONT_ASSIGN | 60 | 1 | 1 | 100.00 |
CONT_ASSIGN | 64 | 1 | 1 | 100.00 |
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_erase.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_erase.sv' was not found, so annotated line coverage report could not be generated.
Line No. | Covered | Statements | |
41 |
|
unreachable |
44 |
1 |
1 |
47 |
1 |
1 |
48 |
1 |
1 |
49 |
1 |
1 |
54 |
1 |
1 |
55 |
1 |
1 |
56 |
1 |
1 |
60 |
1 |
1 |
64 |
1 |
1 |
Cond Coverage for Module :
flash_ctrl_erase
| Total | Covered | Percent |
Conditions | 16 | 16 | 100.00 |
Logical | 16 | 16 | 100.00 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 | |
LINE 41
EXPRESSION (op_start_i & op_addr_oob_i)
-----1---- ------2------
-1- | -2- | Status | Tests |
0 | 1 | Unreachable | |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Unreachable | |
LINE 44
EXPRESSION (flash_req_o & (flash_done_i | oob_err))
-----1----- ------------2-----------
-1- | -2- | Status | Tests |
0 | 1 | Covered | T1,T3,T5 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 44
SUB-EXPRESSION (flash_done_i | oob_err)
------1----- ---2---
-1- | -2- | Status | Tests |
0 | 0 | Covered | T1,T2,T3 |
0 | 1 | Unreachable | |
1 | 0 | Covered | T1,T2,T3 |
LINE 48
EXPRESSION (op_done_o & oob_err)
----1---- ---2---
-1- | -2- | Status | Tests |
0 | 1 | Unreachable | |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Unreachable | |
LINE 49
EXPRESSION (op_done_o & flash_mp_err_i)
----1---- -------2------
-1- | -2- | Status | Tests |
0 | 1 | Covered | T1,T3,T5 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T26,T72 |
LINE 54
EXPRESSION (op_start_i & ((~op_addr_oob_i)))
-----1---- ---------2--------
-1- | -2- | Status | Tests |
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Unreachable | |
1 | 1 | Covered | T1,T2,T3 |
LINE 56
EXPRESSION ((op_type_i == FlashErasePage) ? ((op_addr_i & PageAddrMask)) : ((op_addr_i & BankAddrMask)))
--------------1--------------
-1- | Status | Tests |
0 | Covered | T1,T5,T7 |
1 | Covered | T1,T2,T3 |
LINE 56
SUB-EXPRESSION (op_type_i == FlashErasePage)
--------------1--------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T1,T2,T3 |
Branch Coverage for Module :
flash_ctrl_erase
| Line No. | Total | Covered | Percent |
Branches |
|
2 |
2 |
100.00 |
TERNARY |
56 |
2 |
2 |
100.00 |
WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_erase.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_erase.sv was not found/opened, so annotated branch coverage report could not be generated.
LineNo. Expression
-1-: 56 ((op_type_i == FlashErasePage)) ?
Branches:
-1- | Status | Tests |
1 |
Covered |
T1,T2,T3 |
0 |
Covered |
T1,T5,T7 |