| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING | 
| 50.00 | 50.00 | 1 | 100 | 1 | 1 | 64 | 64 | 
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_0_shadowed_errs_cov | 50.00 | 1 | 100 | 1 | 64 | 64 | 
| flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_1_shadowed_errs_cov | 50.00 | 1 | 100 | 1 | 64 | 64 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 50.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 2 | 1 | 1 | 50.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_storage_err | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 | |
| cp_update_err | 1 | 1 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 50.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 2 | 1 | 1 | 50.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_storage_err | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 0 | |
| cp_update_err | 1 | 1 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| storage_err | 14440 | 1 | T3 | 4 | T4 | 170 | T16 | 4 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 1 | 1 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | 
| update_err | 0 | 1 | 1 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| storage_err | 14440 | 1 | T3 | 4 | T4 | 170 | T16 | 4 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 1 | 1 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | 
| update_err | 0 | 1 | 1 | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |