Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T17 |
9 |
|
T18 |
11 |
|
T21 |
7 |
| others[1] |
247 |
1 |
|
T17 |
11 |
|
T6 |
1 |
|
T18 |
9 |
| others[2] |
213 |
1 |
|
T17 |
9 |
|
T18 |
10 |
|
T21 |
9 |
| others[3] |
383 |
1 |
|
T4 |
1 |
|
T17 |
15 |
|
T18 |
18 |
| false |
135 |
1 |
|
T17 |
5 |
|
T18 |
7 |
|
T21 |
7 |
| true |
5689 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T4 |
1 |
|
T17 |
14 |
|
T18 |
11 |
| others[1] |
253 |
1 |
|
T17 |
10 |
|
T18 |
10 |
|
T21 |
4 |
| others[2] |
227 |
1 |
|
T17 |
10 |
|
T18 |
13 |
|
T21 |
10 |
| others[3] |
391 |
1 |
|
T17 |
10 |
|
T18 |
25 |
|
T21 |
23 |
| false |
104 |
1 |
|
T17 |
2 |
|
T18 |
2 |
|
T21 |
1 |
| true |
5698 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1291 |
1 |
|
T3 |
4 |
|
T17 |
18 |
|
T18 |
21 |
| others[1] |
1243 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T17 |
22 |
| others[2] |
1227 |
1 |
|
T3 |
2 |
|
T17 |
21 |
|
T6 |
1 |
| others[3] |
2045 |
1 |
|
T3 |
2 |
|
T16 |
1 |
|
T17 |
33 |
| false |
631 |
1 |
|
T3 |
3 |
|
T17 |
7 |
|
T18 |
14 |
| true |
446 |
1 |
|
T2 |
1 |
|
T11 |
2 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1260 |
1 |
|
T3 |
2 |
|
T17 |
23 |
|
T18 |
19 |
| others[1] |
1234 |
1 |
|
T3 |
1 |
|
T16 |
1 |
|
T17 |
26 |
| others[2] |
1323 |
1 |
|
T3 |
3 |
|
T17 |
23 |
|
T18 |
23 |
| others[3] |
2043 |
1 |
|
T3 |
6 |
|
T17 |
21 |
|
T18 |
31 |
| false |
596 |
1 |
|
T3 |
1 |
|
T17 |
8 |
|
T18 |
10 |
| true |
427 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
105 |
1 |
|
T17 |
1 |
|
T18 |
4 |
|
T21 |
6 |
| others[1] |
87 |
1 |
|
T17 |
5 |
|
T18 |
1 |
|
T21 |
4 |
| others[2] |
106 |
1 |
|
T17 |
5 |
|
T18 |
4 |
|
T21 |
7 |
| others[3] |
166 |
1 |
|
T17 |
6 |
|
T18 |
4 |
|
T21 |
2 |
| false |
37 |
1 |
|
T18 |
4 |
|
T21 |
1 |
|
T75 |
4 |
| true |
6382 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T17 |
9 |
|
T18 |
15 |
|
T21 |
8 |
| others[1] |
247 |
1 |
|
T17 |
12 |
|
T18 |
7 |
|
T19 |
1 |
| others[2] |
217 |
1 |
|
T17 |
11 |
|
T18 |
6 |
|
T21 |
13 |
| others[3] |
373 |
1 |
|
T17 |
12 |
|
T18 |
15 |
|
T21 |
16 |
| false |
100 |
1 |
|
T4 |
1 |
|
T17 |
6 |
|
T18 |
5 |
| true |
5712 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1086 |
1 |
|
T17 |
25 |
|
T18 |
18 |
|
T22 |
6 |
| others[1] |
1039 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T17 |
15 |
| others[2] |
1088 |
1 |
|
T3 |
5 |
|
T16 |
1 |
|
T17 |
22 |
| others[3] |
1788 |
1 |
|
T3 |
2 |
|
T17 |
22 |
|
T6 |
1 |
| false |
520 |
1 |
|
T17 |
17 |
|
T18 |
8 |
|
T22 |
1 |
| true |
1362 |
1 |
|
T2 |
1 |
|
T19 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T4 |
1 |
|
T17 |
8 |
|
T18 |
9 |
| others[1] |
213 |
1 |
|
T17 |
9 |
|
T18 |
11 |
|
T21 |
14 |
| others[2] |
237 |
1 |
|
T17 |
13 |
|
T6 |
1 |
|
T18 |
5 |
| others[3] |
375 |
1 |
|
T17 |
10 |
|
T18 |
21 |
|
T21 |
14 |
| false |
124 |
1 |
|
T17 |
7 |
|
T18 |
4 |
|
T21 |
2 |
| true |
5702 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T17 |
8 |
|
T18 |
10 |
|
T21 |
10 |
| others[1] |
188 |
1 |
|
T17 |
12 |
|
T18 |
4 |
|
T21 |
5 |
| others[2] |
209 |
1 |
|
T17 |
13 |
|
T18 |
11 |
|
T21 |
10 |
| others[3] |
363 |
1 |
|
T17 |
11 |
|
T18 |
19 |
|
T21 |
9 |
| false |
120 |
1 |
|
T17 |
3 |
|
T18 |
6 |
|
T21 |
4 |
| true |
5781 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1215 |
1 |
|
T3 |
2 |
|
T17 |
20 |
|
T18 |
17 |
| others[1] |
1242 |
1 |
|
T3 |
1 |
|
T17 |
20 |
|
T18 |
17 |
| others[2] |
1176 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T16 |
1 |
| others[3] |
2153 |
1 |
|
T3 |
4 |
|
T17 |
26 |
|
T18 |
29 |
| false |
645 |
1 |
|
T3 |
2 |
|
T17 |
11 |
|
T18 |
8 |
| true |
452 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1220 |
1 |
|
T3 |
5 |
|
T17 |
20 |
|
T18 |
19 |
| others[1] |
1242 |
1 |
|
T3 |
1 |
|
T17 |
27 |
|
T18 |
18 |
| others[2] |
1279 |
1 |
|
T3 |
4 |
|
T17 |
14 |
|
T18 |
20 |
| others[3] |
2033 |
1 |
|
T3 |
3 |
|
T17 |
25 |
|
T18 |
33 |
| false |
685 |
1 |
|
T16 |
1 |
|
T17 |
15 |
|
T18 |
11 |
| true |
424 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
97 |
1 |
|
T17 |
5 |
|
T21 |
2 |
|
T351 |
1 |
| others[1] |
118 |
1 |
|
T17 |
1 |
|
T18 |
4 |
|
T21 |
6 |
| others[2] |
102 |
1 |
|
T17 |
1 |
|
T18 |
2 |
|
T21 |
7 |
| others[3] |
157 |
1 |
|
T17 |
7 |
|
T18 |
6 |
|
T21 |
6 |
| false |
58 |
1 |
|
T18 |
3 |
|
T21 |
3 |
|
T40 |
1 |
| true |
6351 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T17 |
11 |
|
T18 |
10 |
|
T21 |
8 |
| others[1] |
228 |
1 |
|
T17 |
14 |
|
T18 |
7 |
|
T7 |
1 |
| others[2] |
219 |
1 |
|
T17 |
5 |
|
T18 |
10 |
|
T19 |
1 |
| others[3] |
411 |
1 |
|
T17 |
19 |
|
T18 |
12 |
|
T21 |
16 |
| false |
123 |
1 |
|
T17 |
8 |
|
T18 |
8 |
|
T21 |
9 |
| true |
5674 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1051 |
1 |
|
T3 |
1 |
|
T17 |
20 |
|
T18 |
19 |
| others[1] |
1043 |
1 |
|
T3 |
2 |
|
T17 |
20 |
|
T18 |
23 |
| others[2] |
1087 |
1 |
|
T3 |
3 |
|
T17 |
13 |
|
T18 |
14 |
| others[3] |
1721 |
1 |
|
T3 |
4 |
|
T17 |
39 |
|
T18 |
33 |
| false |
562 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T16 |
1 |
| true |
1419 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T17 |
10 |
|
T18 |
6 |
|
T21 |
11 |
| others[1] |
195 |
1 |
|
T17 |
7 |
|
T18 |
6 |
|
T21 |
8 |
| others[2] |
226 |
1 |
|
T17 |
10 |
|
T18 |
13 |
|
T21 |
9 |
| others[3] |
414 |
1 |
|
T17 |
22 |
|
T6 |
1 |
|
T18 |
20 |
| false |
121 |
1 |
|
T17 |
7 |
|
T18 |
8 |
|
T21 |
7 |
| true |
5713 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
207 |
1 |
|
T17 |
7 |
|
T18 |
15 |
|
T21 |
8 |
| others[1] |
218 |
1 |
|
T17 |
7 |
|
T18 |
9 |
|
T21 |
12 |
| others[2] |
236 |
1 |
|
T17 |
9 |
|
T18 |
5 |
|
T21 |
17 |
| others[3] |
372 |
1 |
|
T17 |
17 |
|
T18 |
18 |
|
T21 |
17 |
| false |
121 |
1 |
|
T17 |
6 |
|
T18 |
4 |
|
T21 |
6 |
| true |
5729 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1214 |
1 |
|
T3 |
4 |
|
T17 |
15 |
|
T18 |
16 |
| others[1] |
1265 |
1 |
|
T2 |
1 |
|
T3 |
2 |
|
T17 |
20 |
| others[2] |
1202 |
1 |
|
T3 |
2 |
|
T17 |
24 |
|
T18 |
24 |
| others[3] |
2069 |
1 |
|
T3 |
4 |
|
T16 |
1 |
|
T17 |
34 |
| false |
671 |
1 |
|
T3 |
1 |
|
T17 |
8 |
|
T18 |
11 |
| true |
462 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1252 |
1 |
|
T3 |
3 |
|
T17 |
15 |
|
T18 |
17 |
| others[1] |
1204 |
1 |
|
T3 |
2 |
|
T17 |
18 |
|
T18 |
22 |
| others[2] |
1344 |
1 |
|
T3 |
3 |
|
T17 |
28 |
|
T18 |
18 |
| others[3] |
2032 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T16 |
1 |
| false |
624 |
1 |
|
T3 |
1 |
|
T17 |
6 |
|
T18 |
14 |
| true |
427 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T11 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
88 |
1 |
|
T17 |
1 |
|
T18 |
6 |
|
T21 |
3 |
| others[1] |
106 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T18 |
6 |
| others[2] |
102 |
1 |
|
T17 |
2 |
|
T18 |
8 |
|
T21 |
5 |
| others[3] |
182 |
1 |
|
T17 |
4 |
|
T18 |
6 |
|
T21 |
13 |
| false |
48 |
1 |
|
T17 |
3 |
|
T18 |
1 |
|
T75 |
1 |
| true |
6357 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T4 |
1 |
|
T17 |
10 |
|
T18 |
3 |
| others[1] |
241 |
1 |
|
T17 |
12 |
|
T18 |
20 |
|
T21 |
9 |
| others[2] |
226 |
1 |
|
T17 |
11 |
|
T18 |
16 |
|
T21 |
15 |
| others[3] |
395 |
1 |
|
T17 |
18 |
|
T18 |
15 |
|
T21 |
15 |
| false |
123 |
1 |
|
T17 |
4 |
|
T18 |
4 |
|
T21 |
8 |
| true |
5669 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1076 |
1 |
|
T3 |
2 |
|
T17 |
23 |
|
T18 |
23 |
| others[1] |
1056 |
1 |
|
T3 |
2 |
|
T17 |
16 |
|
T18 |
23 |
| others[2] |
1069 |
1 |
|
T3 |
3 |
|
T16 |
1 |
|
T17 |
20 |
| others[3] |
1759 |
1 |
|
T2 |
1 |
|
T3 |
6 |
|
T17 |
38 |
| false |
510 |
1 |
|
T17 |
4 |
|
T18 |
6 |
|
T19 |
1 |
| true |
1413 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T11 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T17 |
9 |
|
T18 |
1 |
|
T21 |
10 |
| others[1] |
223 |
1 |
|
T17 |
9 |
|
T18 |
10 |
|
T21 |
8 |
| others[2] |
227 |
1 |
|
T17 |
8 |
|
T18 |
13 |
|
T21 |
14 |
| others[3] |
403 |
1 |
|
T17 |
18 |
|
T18 |
20 |
|
T19 |
1 |
| false |
106 |
1 |
|
T17 |
4 |
|
T18 |
4 |
|
T21 |
5 |
| true |
5692 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T17 |
10 |
|
T18 |
11 |
|
T21 |
14 |
| others[1] |
207 |
1 |
|
T17 |
6 |
|
T18 |
8 |
|
T21 |
7 |
| others[2] |
226 |
1 |
|
T17 |
15 |
|
T18 |
5 |
|
T21 |
9 |
| others[3] |
351 |
1 |
|
T17 |
12 |
|
T18 |
17 |
|
T21 |
14 |
| false |
118 |
1 |
|
T17 |
9 |
|
T18 |
4 |
|
T21 |
4 |
| true |
5743 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1259 |
1 |
|
T3 |
4 |
|
T17 |
16 |
|
T18 |
17 |
| others[1] |
1306 |
1 |
|
T3 |
1 |
|
T17 |
27 |
|
T18 |
23 |
| others[2] |
1201 |
1 |
|
T2 |
1 |
|
T3 |
2 |
|
T16 |
1 |
| others[3] |
2057 |
1 |
|
T3 |
4 |
|
T17 |
35 |
|
T18 |
35 |
| false |
607 |
1 |
|
T3 |
2 |
|
T17 |
8 |
|
T18 |
4 |
| true |
453 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T11 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1297 |
1 |
|
T3 |
3 |
|
T17 |
31 |
|
T18 |
20 |
| others[1] |
1256 |
1 |
|
T3 |
3 |
|
T17 |
18 |
|
T18 |
14 |
| others[2] |
1240 |
1 |
|
T3 |
3 |
|
T17 |
13 |
|
T18 |
30 |
| others[3] |
2008 |
1 |
|
T3 |
4 |
|
T16 |
1 |
|
T17 |
31 |
| false |
655 |
1 |
|
T17 |
8 |
|
T18 |
10 |
|
T22 |
3 |
| true |
427 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
103 |
1 |
|
T17 |
7 |
|
T18 |
1 |
|
T21 |
3 |
| others[1] |
102 |
1 |
|
T17 |
1 |
|
T18 |
2 |
|
T21 |
4 |
| others[2] |
116 |
1 |
|
T17 |
7 |
|
T18 |
6 |
|
T21 |
6 |
| others[3] |
178 |
1 |
|
T17 |
5 |
|
T18 |
6 |
|
T21 |
4 |
| false |
45 |
1 |
|
T226 |
1 |
|
T351 |
1 |
|
T75 |
1 |
| true |
6339 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T17 |
6 |
|
T18 |
14 |
|
T21 |
9 |
| others[1] |
239 |
1 |
|
T17 |
7 |
|
T18 |
1 |
|
T21 |
5 |
| others[2] |
274 |
1 |
|
T17 |
18 |
|
T18 |
10 |
|
T21 |
8 |
| others[3] |
378 |
1 |
|
T17 |
12 |
|
T18 |
13 |
|
T7 |
1 |
| false |
120 |
1 |
|
T4 |
1 |
|
T17 |
7 |
|
T18 |
6 |
| true |
5644 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1021 |
1 |
|
T3 |
3 |
|
T17 |
17 |
|
T18 |
19 |
| others[1] |
1081 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T17 |
23 |
| others[2] |
1064 |
1 |
|
T3 |
3 |
|
T16 |
1 |
|
T17 |
15 |
| others[3] |
1772 |
1 |
|
T3 |
5 |
|
T17 |
39 |
|
T18 |
35 |
| false |
553 |
1 |
|
T17 |
7 |
|
T18 |
8 |
|
T22 |
6 |
| true |
1392 |
1 |
|
T2 |
1 |
|
T11 |
2 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T17 |
9 |
|
T18 |
6 |
|
T21 |
4 |
| others[1] |
224 |
1 |
|
T17 |
10 |
|
T18 |
12 |
|
T19 |
1 |
| others[2] |
211 |
1 |
|
T17 |
8 |
|
T18 |
6 |
|
T21 |
7 |
| others[3] |
389 |
1 |
|
T17 |
13 |
|
T18 |
23 |
|
T21 |
21 |
| false |
136 |
1 |
|
T17 |
3 |
|
T18 |
4 |
|
T21 |
2 |
| true |
5713 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T4 |
1 |
|
T17 |
14 |
|
T18 |
8 |
| others[1] |
228 |
1 |
|
T17 |
12 |
|
T18 |
10 |
|
T21 |
13 |
| others[2] |
211 |
1 |
|
T17 |
12 |
|
T18 |
12 |
|
T21 |
12 |
| others[3] |
399 |
1 |
|
T17 |
15 |
|
T18 |
14 |
|
T21 |
19 |
| false |
118 |
1 |
|
T17 |
4 |
|
T18 |
9 |
|
T21 |
3 |
| true |
5713 |
1 |
|
T2 |
1 |
|
T3 |
13 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1238 |
1 |
|
T3 |
3 |
|
T17 |
18 |
|
T18 |
21 |
| others[1] |
1228 |
1 |
|
T3 |
1 |
|
T17 |
15 |
|
T18 |
19 |
| others[2] |
1313 |
1 |
|
T3 |
1 |
|
T17 |
20 |
|
T18 |
14 |
| others[3] |
2006 |
1 |
|
T3 |
7 |
|
T16 |
1 |
|
T17 |
34 |
| false |
648 |
1 |
|
T3 |
1 |
|
T17 |
14 |
|
T18 |
10 |
| true |
450 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T6 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |