Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables |
12 |
1 |
11 |
91.67 |
Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
Summary for Variable cp_arb_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_arb_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
105 |
1 |
|
T53 |
1 |
|
T200 |
1 |
|
T14 |
20 |
Summary for Variable cp_host_gnt_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
1 |
0 |
0.00 |
User Defined Bins for cp_host_gnt_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER |
seen |
0 |
1 |
1 |
Summary for Variable cp_mp_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_mp_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
12 |
1 |
|
T124 |
1 |
|
T162 |
1 |
|
T282 |
1 |
Summary for Variable cp_op_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_op_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
10 |
1 |
|
T271 |
1 |
|
T280 |
1 |
|
T281 |
1 |
Summary for Variable cp_phy_relbl_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_phy_relbl_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
23 |
1 |
|
T131 |
1 |
|
T279 |
5 |
|
T332 |
1 |
Summary for Variable cp_phy_storage_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_phy_storage_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
5 |
1 |
|
T224 |
1 |
|
T76 |
1 |
|
T77 |
1 |
Summary for Variable cp_prog_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_prog_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
10 |
1 |
|
T162 |
1 |
|
T282 |
1 |
|
T283 |
1 |
Summary for Variable cp_prog_type_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_prog_type_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
4 |
1 |
|
T142 |
1 |
|
T284 |
1 |
|
T285 |
1 |
Summary for Variable cp_prog_win_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_prog_win_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
6 |
1 |
|
T74 |
1 |
|
T144 |
1 |
|
T161 |
1 |
Summary for Variable cp_rd_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_rd_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
8 |
1 |
|
T131 |
1 |
|
T332 |
1 |
|
T333 |
1 |
Summary for Variable cp_seed_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_seed_err
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
11 |
1 |
|
T131 |
1 |
|
T332 |
1 |
|
T333 |
1 |
Summary for Variable cp_spurious_ack
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_spurious_ack
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
seen |
5 |
1 |
|
T128 |
1 |
|
T127 |
1 |
|
T129 |
1 |
0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |