Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T1 |
9 |
|
T37 |
1 |
|
T72 |
1 |
| others[1] |
245 |
1 |
|
T1 |
14 |
|
T8 |
1 |
|
T70 |
1 |
| others[2] |
199 |
1 |
|
T1 |
9 |
|
T20 |
1 |
|
T36 |
1 |
| others[3] |
398 |
1 |
|
T1 |
17 |
|
T44 |
1 |
|
T71 |
1 |
| false |
104 |
1 |
|
T1 |
4 |
|
T227 |
1 |
|
T241 |
4 |
| true |
13144 |
1 |
|
T1 |
48 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8675 |
1 |
|
T1 |
19 |
|
T101 |
1 |
|
T45 |
77 |
| others[1] |
1255 |
1 |
|
T1 |
13 |
|
T20 |
1 |
|
T25 |
1 |
| others[2] |
1188 |
1 |
|
T1 |
22 |
|
T192 |
1 |
|
T44 |
1 |
| others[3] |
2092 |
1 |
|
T1 |
37 |
|
T4 |
1 |
|
T19 |
1 |
| false |
656 |
1 |
|
T1 |
10 |
|
T6 |
1 |
|
T88 |
1 |
| true |
445 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8632 |
1 |
|
T1 |
19 |
|
T6 |
1 |
|
T20 |
1 |
| others[1] |
1288 |
1 |
|
T1 |
23 |
|
T173 |
9 |
|
T241 |
19 |
| others[2] |
1294 |
1 |
|
T1 |
18 |
|
T116 |
1 |
|
T173 |
15 |
| others[3] |
2046 |
1 |
|
T1 |
31 |
|
T4 |
1 |
|
T192 |
1 |
| false |
627 |
1 |
|
T1 |
10 |
|
T173 |
6 |
|
T241 |
9 |
| true |
424 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
85 |
1 |
|
T1 |
4 |
|
T227 |
1 |
|
T241 |
1 |
| others[1] |
86 |
1 |
|
T1 |
5 |
|
T20 |
1 |
|
T241 |
1 |
| others[2] |
120 |
1 |
|
T1 |
9 |
|
T70 |
1 |
|
T241 |
5 |
| others[3] |
171 |
1 |
|
T1 |
6 |
|
T239 |
1 |
|
T227 |
1 |
| false |
76 |
1 |
|
T1 |
4 |
|
T44 |
1 |
|
T37 |
1 |
| true |
13773 |
1 |
|
T1 |
73 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T1 |
9 |
|
T37 |
1 |
|
T241 |
7 |
| others[1] |
251 |
1 |
|
T1 |
8 |
|
T4 |
1 |
|
T26 |
1 |
| others[2] |
249 |
1 |
|
T1 |
12 |
|
T17 |
1 |
|
T241 |
15 |
| others[3] |
399 |
1 |
|
T1 |
20 |
|
T7 |
1 |
|
T241 |
16 |
| false |
110 |
1 |
|
T1 |
4 |
|
T2 |
1 |
|
T239 |
1 |
| true |
13091 |
1 |
|
T1 |
48 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8494 |
1 |
|
T1 |
20 |
|
T74 |
1 |
|
T136 |
1 |
| others[1] |
1063 |
1 |
|
T1 |
19 |
|
T6 |
1 |
|
T17 |
1 |
| others[2] |
1071 |
1 |
|
T1 |
18 |
|
T4 |
1 |
|
T20 |
1 |
| others[3] |
1750 |
1 |
|
T1 |
31 |
|
T7 |
1 |
|
T44 |
1 |
| false |
544 |
1 |
|
T1 |
13 |
|
T12 |
1 |
|
T13 |
1 |
| true |
1389 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T8 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T1 |
14 |
|
T44 |
1 |
|
T118 |
1 |
| others[1] |
229 |
1 |
|
T1 |
7 |
|
T27 |
1 |
|
T71 |
1 |
| others[2] |
217 |
1 |
|
T1 |
9 |
|
T20 |
1 |
|
T241 |
9 |
| others[3] |
396 |
1 |
|
T1 |
11 |
|
T26 |
1 |
|
T73 |
1 |
| false |
123 |
1 |
|
T1 |
6 |
|
T239 |
1 |
|
T116 |
1 |
| true |
13125 |
1 |
|
T1 |
54 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
248 |
1 |
|
T1 |
7 |
|
T391 |
1 |
|
T73 |
1 |
| others[1] |
200 |
1 |
|
T1 |
10 |
|
T4 |
1 |
|
T241 |
4 |
| others[2] |
203 |
1 |
|
T1 |
13 |
|
T70 |
1 |
|
T72 |
1 |
| others[3] |
334 |
1 |
|
T1 |
10 |
|
T239 |
1 |
|
T71 |
1 |
| false |
112 |
1 |
|
T1 |
2 |
|
T241 |
8 |
|
T134 |
1 |
| true |
13214 |
1 |
|
T1 |
59 |
|
T2 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8652 |
1 |
|
T1 |
18 |
|
T4 |
1 |
|
T192 |
1 |
| others[1] |
1204 |
1 |
|
T1 |
23 |
|
T13 |
1 |
|
T35 |
1 |
| others[2] |
1225 |
1 |
|
T1 |
10 |
|
T25 |
1 |
|
T239 |
1 |
| others[3] |
2124 |
1 |
|
T1 |
32 |
|
T6 |
1 |
|
T20 |
1 |
| false |
666 |
1 |
|
T1 |
18 |
|
T117 |
1 |
|
T173 |
12 |
| true |
440 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1317 |
1 |
|
T1 |
21 |
|
T137 |
1 |
|
T227 |
1 |
| others[1] |
1210 |
1 |
|
T1 |
32 |
|
T19 |
1 |
|
T239 |
1 |
| others[2] |
1204 |
1 |
|
T1 |
11 |
|
T20 |
1 |
|
T101 |
1 |
| others[3] |
2105 |
1 |
|
T1 |
27 |
|
T6 |
1 |
|
T192 |
1 |
| false |
647 |
1 |
|
T1 |
10 |
|
T4 |
1 |
|
T44 |
1 |
| true |
427 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T1 |
7 |
|
T20 |
1 |
|
T227 |
1 |
| others[1] |
96 |
1 |
|
T1 |
2 |
|
T241 |
5 |
|
T76 |
1 |
| others[2] |
96 |
1 |
|
T1 |
2 |
|
T71 |
1 |
|
T241 |
1 |
| others[3] |
172 |
1 |
|
T1 |
3 |
|
T44 |
1 |
|
T72 |
1 |
| false |
58 |
1 |
|
T1 |
5 |
|
T241 |
2 |
|
T76 |
1 |
| true |
6371 |
1 |
|
T1 |
82 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T1 |
9 |
|
T2 |
1 |
|
T37 |
1 |
| others[1] |
223 |
1 |
|
T1 |
9 |
|
T20 |
1 |
|
T239 |
1 |
| others[2] |
235 |
1 |
|
T1 |
9 |
|
T36 |
1 |
|
T241 |
14 |
| others[3] |
403 |
1 |
|
T1 |
11 |
|
T17 |
1 |
|
T26 |
1 |
| false |
108 |
1 |
|
T1 |
8 |
|
T241 |
2 |
|
T76 |
2 |
| true |
5699 |
1 |
|
T1 |
55 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1030 |
1 |
|
T1 |
20 |
|
T75 |
1 |
|
T192 |
1 |
| others[1] |
1024 |
1 |
|
T1 |
18 |
|
T4 |
1 |
|
T6 |
1 |
| others[2] |
1089 |
1 |
|
T1 |
20 |
|
T12 |
1 |
|
T54 |
1 |
| others[3] |
1830 |
1 |
|
T1 |
32 |
|
T20 |
1 |
|
T36 |
1 |
| false |
531 |
1 |
|
T1 |
11 |
|
T7 |
1 |
|
T70 |
1 |
| true |
1406 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T1 |
7 |
|
T17 |
1 |
|
T239 |
1 |
| others[1] |
236 |
1 |
|
T1 |
9 |
|
T7 |
1 |
|
T44 |
1 |
| others[2] |
221 |
1 |
|
T1 |
10 |
|
T37 |
1 |
|
T70 |
1 |
| others[3] |
402 |
1 |
|
T1 |
15 |
|
T27 |
1 |
|
T72 |
1 |
| false |
121 |
1 |
|
T1 |
9 |
|
T241 |
7 |
|
T82 |
3 |
| true |
5720 |
1 |
|
T1 |
51 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T1 |
11 |
|
T72 |
1 |
|
T227 |
1 |
| others[1] |
194 |
1 |
|
T1 |
6 |
|
T4 |
1 |
|
T20 |
1 |
| others[2] |
238 |
1 |
|
T1 |
9 |
|
T241 |
11 |
|
T82 |
12 |
| others[3] |
371 |
1 |
|
T1 |
14 |
|
T37 |
1 |
|
T239 |
1 |
| false |
134 |
1 |
|
T1 |
6 |
|
T391 |
1 |
|
T241 |
7 |
| true |
5731 |
1 |
|
T1 |
55 |
|
T2 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1223 |
1 |
|
T1 |
19 |
|
T101 |
1 |
|
T35 |
1 |
| others[1] |
1269 |
1 |
|
T1 |
15 |
|
T25 |
1 |
|
T19 |
1 |
| others[2] |
1246 |
1 |
|
T1 |
26 |
|
T6 |
1 |
|
T20 |
1 |
| others[3] |
2068 |
1 |
|
T1 |
32 |
|
T192 |
1 |
|
T44 |
1 |
| false |
671 |
1 |
|
T1 |
9 |
|
T4 |
1 |
|
T173 |
7 |
| true |
433 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1241 |
1 |
|
T1 |
15 |
|
T6 |
1 |
|
T20 |
1 |
| others[1] |
1204 |
1 |
|
T1 |
21 |
|
T4 |
1 |
|
T13 |
1 |
| others[2] |
1280 |
1 |
|
T1 |
19 |
|
T25 |
1 |
|
T19 |
1 |
| others[3] |
2062 |
1 |
|
T1 |
35 |
|
T192 |
1 |
|
T44 |
1 |
| false |
704 |
1 |
|
T1 |
11 |
|
T101 |
1 |
|
T117 |
1 |
| true |
419 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
102 |
1 |
|
T1 |
3 |
|
T227 |
1 |
|
T241 |
2 |
| others[1] |
111 |
1 |
|
T1 |
4 |
|
T37 |
1 |
|
T241 |
4 |
| others[2] |
102 |
1 |
|
T1 |
3 |
|
T44 |
1 |
|
T238 |
1 |
| others[3] |
190 |
1 |
|
T1 |
11 |
|
T20 |
1 |
|
T239 |
1 |
| false |
55 |
1 |
|
T1 |
2 |
|
T241 |
1 |
|
T134 |
1 |
| true |
6350 |
1 |
|
T1 |
78 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T1 |
9 |
|
T7 |
1 |
|
T238 |
1 |
| others[1] |
264 |
1 |
|
T1 |
10 |
|
T17 |
1 |
|
T8 |
1 |
| others[2] |
246 |
1 |
|
T1 |
9 |
|
T2 |
1 |
|
T72 |
1 |
| others[3] |
365 |
1 |
|
T1 |
14 |
|
T36 |
1 |
|
T44 |
1 |
| false |
109 |
1 |
|
T1 |
7 |
|
T391 |
1 |
|
T241 |
8 |
| true |
5688 |
1 |
|
T1 |
52 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1068 |
1 |
|
T1 |
30 |
|
T72 |
1 |
|
T227 |
1 |
| others[1] |
1057 |
1 |
|
T1 |
17 |
|
T4 |
1 |
|
T20 |
1 |
| others[2] |
1079 |
1 |
|
T1 |
10 |
|
T2 |
1 |
|
T192 |
1 |
| others[3] |
1781 |
1 |
|
T1 |
35 |
|
T13 |
1 |
|
T75 |
1 |
| false |
581 |
1 |
|
T1 |
9 |
|
T6 |
1 |
|
T173 |
6 |
| true |
1344 |
1 |
|
T5 |
1 |
|
T17 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
187 |
1 |
|
T1 |
9 |
|
T227 |
1 |
|
T241 |
7 |
| others[1] |
251 |
1 |
|
T1 |
8 |
|
T17 |
1 |
|
T7 |
1 |
| others[2] |
245 |
1 |
|
T1 |
9 |
|
T2 |
1 |
|
T27 |
1 |
| others[3] |
363 |
1 |
|
T1 |
16 |
|
T20 |
1 |
|
T26 |
1 |
| false |
142 |
1 |
|
T1 |
4 |
|
T241 |
8 |
|
T178 |
1 |
| true |
5722 |
1 |
|
T1 |
55 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
215 |
1 |
|
T1 |
8 |
|
T20 |
1 |
|
T238 |
1 |
| others[1] |
205 |
1 |
|
T1 |
13 |
|
T239 |
1 |
|
T71 |
1 |
| others[2] |
230 |
1 |
|
T1 |
12 |
|
T36 |
1 |
|
T44 |
1 |
| others[3] |
364 |
1 |
|
T1 |
17 |
|
T241 |
15 |
|
T134 |
1 |
| false |
120 |
1 |
|
T1 |
5 |
|
T41 |
1 |
|
T241 |
5 |
| true |
5776 |
1 |
|
T1 |
46 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1233 |
1 |
|
T1 |
21 |
|
T6 |
1 |
|
T7 |
1 |
| others[1] |
1238 |
1 |
|
T1 |
16 |
|
T173 |
15 |
|
T241 |
15 |
| others[2] |
1273 |
1 |
|
T1 |
14 |
|
T4 |
1 |
|
T20 |
1 |
| others[3] |
2063 |
1 |
|
T1 |
39 |
|
T36 |
1 |
|
T19 |
1 |
| false |
655 |
1 |
|
T1 |
11 |
|
T44 |
1 |
|
T173 |
7 |
| true |
448 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1235 |
1 |
|
T1 |
17 |
|
T6 |
1 |
|
T7 |
1 |
| others[1] |
1217 |
1 |
|
T1 |
21 |
|
T44 |
1 |
|
T19 |
1 |
| others[2] |
1249 |
1 |
|
T1 |
11 |
|
T20 |
1 |
|
T239 |
1 |
| others[3] |
2087 |
1 |
|
T1 |
34 |
|
T192 |
1 |
|
T25 |
1 |
| false |
688 |
1 |
|
T1 |
18 |
|
T4 |
1 |
|
T173 |
8 |
| true |
434 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
91 |
1 |
|
T1 |
3 |
|
T20 |
1 |
|
T44 |
1 |
| others[1] |
110 |
1 |
|
T1 |
6 |
|
T8 |
1 |
|
T241 |
4 |
| others[2] |
100 |
1 |
|
T1 |
3 |
|
T241 |
5 |
|
T76 |
2 |
| others[3] |
186 |
1 |
|
T1 |
7 |
|
T239 |
1 |
|
T72 |
1 |
| false |
63 |
1 |
|
T227 |
1 |
|
T241 |
1 |
|
T76 |
2 |
| true |
6360 |
1 |
|
T1 |
82 |
|
T2 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
244 |
1 |
|
T1 |
10 |
|
T4 |
1 |
|
T20 |
1 |
| others[1] |
261 |
1 |
|
T1 |
10 |
|
T2 |
1 |
|
T70 |
1 |
| others[2] |
251 |
1 |
|
T1 |
11 |
|
T227 |
1 |
|
T391 |
1 |
| others[3] |
388 |
1 |
|
T1 |
11 |
|
T241 |
13 |
|
T179 |
2 |
| false |
122 |
1 |
|
T1 |
10 |
|
T8 |
1 |
|
T73 |
1 |
| true |
5644 |
1 |
|
T1 |
49 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1045 |
1 |
|
T1 |
21 |
|
T25 |
1 |
|
T35 |
1 |
| others[1] |
1091 |
1 |
|
T1 |
23 |
|
T101 |
1 |
|
T173 |
15 |
| others[2] |
1090 |
1 |
|
T1 |
21 |
|
T36 |
1 |
|
T44 |
1 |
| others[3] |
1708 |
1 |
|
T1 |
29 |
|
T4 |
1 |
|
T6 |
1 |
| false |
579 |
1 |
|
T1 |
7 |
|
T17 |
1 |
|
T173 |
7 |
| true |
1397 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
235 |
1 |
|
T1 |
12 |
|
T238 |
1 |
|
T116 |
1 |
| others[1] |
239 |
1 |
|
T1 |
10 |
|
T7 |
1 |
|
T27 |
1 |
| others[2] |
229 |
1 |
|
T1 |
9 |
|
T227 |
1 |
|
T241 |
9 |
| others[3] |
401 |
1 |
|
T1 |
13 |
|
T17 |
1 |
|
T26 |
1 |
| false |
135 |
1 |
|
T1 |
3 |
|
T2 |
1 |
|
T36 |
1 |
| true |
5671 |
1 |
|
T1 |
54 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
203 |
1 |
|
T1 |
11 |
|
T241 |
8 |
|
T235 |
1 |
| others[1] |
224 |
1 |
|
T1 |
9 |
|
T44 |
1 |
|
T239 |
1 |
| others[2] |
217 |
1 |
|
T1 |
5 |
|
T4 |
1 |
|
T70 |
1 |
| others[3] |
367 |
1 |
|
T1 |
24 |
|
T238 |
1 |
|
T391 |
1 |
| false |
125 |
1 |
|
T1 |
5 |
|
T241 |
4 |
|
T213 |
1 |
| true |
5774 |
1 |
|
T1 |
47 |
|
T2 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1225 |
1 |
|
T1 |
18 |
|
T6 |
1 |
|
T192 |
1 |
| others[1] |
1261 |
1 |
|
T1 |
20 |
|
T13 |
1 |
|
T20 |
1 |
| others[2] |
1280 |
1 |
|
T1 |
22 |
|
T4 |
1 |
|
T44 |
1 |
| others[3] |
2038 |
1 |
|
T1 |
31 |
|
T27 |
1 |
|
T35 |
1 |
| false |
665 |
1 |
|
T1 |
10 |
|
T19 |
1 |
|
T116 |
1 |
| true |
441 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1270 |
1 |
|
T1 |
20 |
|
T4 |
1 |
|
T20 |
1 |
| others[1] |
1274 |
1 |
|
T1 |
18 |
|
T25 |
1 |
|
T19 |
1 |
| others[2] |
1226 |
1 |
|
T1 |
15 |
|
T2 |
1 |
|
T6 |
1 |
| others[3] |
2018 |
1 |
|
T1 |
40 |
|
T192 |
1 |
|
T35 |
1 |
| false |
696 |
1 |
|
T1 |
8 |
|
T173 |
7 |
|
T241 |
17 |
| true |
426 |
1 |
|
T5 |
1 |
|
T17 |
1 |
|
T12 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |