Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
97.50	97.12	93.60	98.44		100.00	98.33	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	422400708	4468	0	0
addr_rd_A	422400708	1290	0	0
bank0_info0_page_cfg_0_rd_A	422400708	2022	0	0
bank0_info0_page_cfg_1_rd_A	422400708	1657	0	0
bank0_info0_page_cfg_2_rd_A	422400708	2194	0	0
bank0_info0_page_cfg_3_rd_A	422400708	2207	0	0
bank0_info0_page_cfg_4_rd_A	422400708	2381	0	0
bank0_info0_page_cfg_5_rd_A	422400708	1858	0	0
bank0_info0_page_cfg_6_rd_A	422400708	2207	0	0
bank0_info0_page_cfg_7_rd_A	422400708	1898	0	0
bank0_info0_page_cfg_8_rd_A	422400708	2346	0	0
bank0_info0_page_cfg_9_rd_A	422400708	2142	0	0
bank0_info0_regwen_0_rd_A	422400708	1466	0	0
bank0_info0_regwen_1_rd_A	422400708	1424	0	0
bank0_info0_regwen_2_rd_A	422400708	1429	0	0
bank0_info0_regwen_3_rd_A	422400708	954	0	0
bank0_info0_regwen_4_rd_A	422400708	1348	0	0
bank0_info0_regwen_5_rd_A	422400708	931	0	0
bank0_info0_regwen_6_rd_A	422400708	1409	0	0
bank0_info0_regwen_7_rd_A	422400708	1419	0	0
bank0_info0_regwen_8_rd_A	422400708	812	0	0
bank0_info0_regwen_9_rd_A	422400708	1414	0	0
bank0_info1_page_cfg_rd_A	422400708	1853	0	0
bank0_info1_regwen_rd_A	422400708	900	0	0
bank0_info2_page_cfg_0_rd_A	422400708	1831	0	0
bank0_info2_page_cfg_1_rd_A	422400708	2212	0	0
bank0_info2_regwen_0_rd_A	422400708	1482	0	0
bank0_info2_regwen_1_rd_A	422400708	1283	0	0
bank1_info0_page_cfg_0_rd_A	422400708	2195	0	0
bank1_info0_page_cfg_1_rd_A	422400708	1305	0	0
bank1_info0_page_cfg_2_rd_A	422400708	1899	0	0
bank1_info0_page_cfg_3_rd_A	422400708	2161	0	0
bank1_info0_page_cfg_4_rd_A	422400708	2260	0	0
bank1_info0_page_cfg_5_rd_A	422400708	1238	0	0
bank1_info0_page_cfg_6_rd_A	422400708	1590	0	0
bank1_info0_page_cfg_7_rd_A	422400708	2085	0	0
bank1_info0_page_cfg_8_rd_A	422400708	2328	0	0
bank1_info0_page_cfg_9_rd_A	422400708	2121	0	0
bank1_info0_regwen_0_rd_A	422400708	1431	0	0
bank1_info0_regwen_1_rd_A	422400708	995	0	0
bank1_info0_regwen_2_rd_A	422400708	1384	0	0
bank1_info0_regwen_3_rd_A	422400708	1513	0	0
bank1_info0_regwen_4_rd_A	422400708	960	0	0
bank1_info0_regwen_5_rd_A	422400708	915	0	0
bank1_info0_regwen_6_rd_A	422400708	976	0	0
bank1_info0_regwen_7_rd_A	422400708	1518	0	0
bank1_info0_regwen_8_rd_A	422400708	1443	0	0
bank1_info0_regwen_9_rd_A	422400708	1377	0	0
bank1_info1_page_cfg_rd_A	422400708	1265	0	0
bank1_info1_regwen_rd_A	422400708	1441	0	0
bank1_info2_page_cfg_0_rd_A	422400708	2173	0	0
bank1_info2_page_cfg_1_rd_A	422400708	2336	0	0
bank1_info2_regwen_0_rd_A	422400708	1564	0	0
bank1_info2_regwen_1_rd_A	422400708	1497	0	0
bank_cfg_regwen_rd_A	422400708	1441	0	0
default_region_rd_A	422400708	1665	0	0
exec_rd_A	422400708	506	0	0
fifo_lvl_rd_A	422400708	1632	0	0
fifo_rst_rd_A	422400708	1022	0	0
hw_info_cfg_override_rd_A	422400708	1622	0	0
intr_enable_rd_A	422400708	2170	0	0
mp_region_0_rd_A	422400708	1547	0	0
mp_region_1_rd_A	422400708	1560	0	0
mp_region_2_rd_A	422400708	1527	0	0
mp_region_3_rd_A	422400708	1585	0	0
mp_region_4_rd_A	422400708	1580	0	0
mp_region_5_rd_A	422400708	1097	0	0
mp_region_6_rd_A	422400708	1069	0	0
mp_region_7_rd_A	422400708	1131	0	0
mp_region_cfg_0_rd_A	422400708	2226	0	0
mp_region_cfg_1_rd_A	422400708	1790	0	0
mp_region_cfg_2_rd_A	422400708	2312	0	0
mp_region_cfg_3_rd_A	422400708	2209	0	0
mp_region_cfg_4_rd_A	422400708	2283	0	0
mp_region_cfg_5_rd_A	422400708	2276	0	0
mp_region_cfg_6_rd_A	422400708	1437	0	0
mp_region_cfg_7_rd_A	422400708	1879	0	0
phy_alert_cfg_rd_A	422400708	1158	0	0
region_cfg_regwen_0_rd_A	422400708	859	0	0
region_cfg_regwen_1_rd_A	422400708	1433	0	0
region_cfg_regwen_2_rd_A	422400708	1388	0	0
region_cfg_regwen_3_rd_A	422400708	1034	0	0
region_cfg_regwen_4_rd_A	422400708	899	0	0
region_cfg_regwen_5_rd_A	422400708	900	0	0
region_cfg_regwen_6_rd_A	422400708	1459	0	0
region_cfg_regwen_7_rd_A	422400708	1445	0	0
scratch_rd_A	422400708	992	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	4468	0	0
T62	2985	56	0	0
T63	68610	1	0	0
T179	3537	87	0	0
T180	10489	4	0	0
T192	5071	164	0	0
T228	9064	5	0	0
T229	8418	3	0	0
T230	5292	14	0	0
T231	4747	6	0	0
T232	16446	2	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1290	0	0
T64	4776	3	0	0
T180	10489	12	0	0
T276	79979	61	0	0
T301	3292	1	0	0
T302	4091	4	0	0
T303	10733	9	0	0
T304	20995	42	0	0
T305	10845	19	0	0
T306	6637	8	0	0
T307	9135	35	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2022	0	0
T64	4776	13	0	0
T180	10489	38	0	0
T228	9064	67	0	0
T276	79979	378	0	0
T302	4091	17	0	0
T303	10733	26	0	0
T304	20995	30	0	0
T305	10845	50	0	0
T306	6637	25	0	0
T308	6320	22	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1657	0	0
T64	4776	12	0	0
T180	10489	45	0	0
T228	9064	26	0	0
T276	79979	218	0	0
T301	3292	40	0	0
T302	4091	5	0	0
T303	10733	10	0	0
T304	20995	48	0	0
T305	10845	37	0	0
T306	6637	37	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2194	0	0
T64	4776	3	0	0
T180	10489	38	0	0
T228	9064	26	0	0
T276	79979	340	0	0
T301	3292	29	0	0
T302	4091	28	0	0
T303	10733	21	0	0
T304	20995	42	0	0
T305	10845	3	0	0
T306	6637	46	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2207	0	0
T64	4776	8	0	0
T180	10489	48	0	0
T228	9064	23	0	0
T276	79979	299	0	0
T301	3292	5	0	0
T302	4091	28	0	0
T303	10733	49	0	0
T304	20995	59	0	0
T305	10845	32	0	0
T306	6637	21	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2381	0	0
T64	4776	8	0	0
T180	10489	72	0	0
T228	9064	11	0	0
T276	79979	278	0	0
T301	3292	18	0	0
T303	10733	10	0	0
T304	20995	26	0	0
T305	10845	31	0	0
T306	6637	48	0	0
T308	6320	8	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1858	0	0
T64	4776	8	0	0
T180	10489	21	0	0
T228	9064	2	0	0
T276	79979	459	0	0
T301	3292	29	0	0
T302	4091	9	0	0
T303	10733	14	0	0
T304	20995	54	0	0
T305	10845	29	0	0
T306	6637	51	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2207	0	0
T64	4776	9	0	0
T180	10489	9	0	0
T228	9064	5	0	0
T276	79979	331	0	0
T301	3292	13	0	0
T302	4091	21	0	0
T303	10733	15	0	0
T304	20995	18	0	0
T305	10845	30	0	0
T306	6637	39	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1898	0	0
T64	4776	17	0	0
T180	10489	48	0	0
T228	9064	21	0	0
T276	79979	387	0	0
T301	3292	30	0	0
T302	4091	23	0	0
T303	10733	45	0	0
T304	20995	62	0	0
T305	10845	18	0	0
T306	6637	7	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2346	0	0
T64	4776	1	0	0
T180	10489	59	0	0
T228	9064	41	0	0
T276	79979	319	0	0
T301	3292	1	0	0
T302	4091	8	0	0
T303	10733	35	0	0
T304	20995	65	0	0
T305	10845	26	0	0
T306	6637	67	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2142	0	0
T64	4776	1	0	0
T180	10489	13	0	0
T228	9064	19	0	0
T276	79979	438	0	0
T301	3292	1	0	0
T302	4091	26	0	0
T303	10733	5	0	0
T304	20995	40	0	0
T305	10845	28	0	0
T306	6637	34	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1466	0	0
T64	4776	8	0	0
T180	10489	8	0	0
T228	9064	8	0	0
T276	79979	104	0	0
T301	3292	6	0	0
T302	4091	3	0	0
T303	10733	19	0	0
T304	20995	63	0	0
T305	10845	29	0	0
T306	6637	15	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1424	0	0
T64	4776	13	0	0
T180	10489	8	0	0
T228	9064	4	0	0
T276	79979	84	0	0
T301	3292	4	0	0
T302	4091	7	0	0
T303	10733	20	0	0
T304	20995	44	0	0
T305	10845	12	0	0
T306	6637	6	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1429	0	0
T64	4776	5	0	0
T180	10489	21	0	0
T228	9064	6	0	0
T276	79979	74	0	0
T301	3292	3	0	0
T302	4091	9	0	0
T303	10733	22	0	0
T304	20995	30	0	0
T305	10845	22	0	0
T306	6637	7	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	954	0	0
T64	4776	18	0	0
T180	10489	17	0	0
T228	9064	11	0	0
T276	79979	67	0	0
T301	3292	5	0	0
T302	4091	5	0	0
T303	10733	6	0	0
T304	20995	28	0	0
T305	10845	27	0	0
T306	6637	15	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1348	0	0
T64	4776	10	0	0
T180	10489	5	0	0
T228	9064	13	0	0
T276	79979	71	0	0
T303	10733	2	0	0
T304	20995	38	0	0
T305	10845	40	0	0
T306	6637	4	0	0
T307	9135	20	0	0
T308	6320	8	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	931	0	0
T64	4776	19	0	0
T180	10489	14	0	0
T228	9064	4	0	0
T276	79979	65	0	0
T302	4091	3	0	0
T303	10733	33	0	0
T304	20995	40	0	0
T305	10845	33	0	0
T306	6637	13	0	0
T308	6320	7	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1409	0	0
T64	4776	11	0	0
T180	10489	12	0	0
T228	9064	14	0	0
T276	79979	84	0	0
T301	3292	3	0	0
T302	4091	5	0	0
T303	10733	14	0	0
T304	20995	48	0	0
T305	10845	30	0	0
T306	6637	5	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1419	0	0
T64	4776	8	0	0
T180	10489	27	0	0
T228	9064	1	0	0
T276	79979	89	0	0
T301	3292	1	0	0
T302	4091	6	0	0
T303	10733	2	0	0
T304	20995	46	0	0
T305	10845	26	0	0
T306	6637	8	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	812	0	0
T64	4776	5	0	0
T180	10489	8	0	0
T228	9064	8	0	0
T276	79979	85	0	0
T301	3292	2	0	0
T302	4091	2	0	0
T303	10733	33	0	0
T304	20995	22	0	0
T305	10845	1	0	0
T306	6637	9	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1414	0	0
T64	4776	2	0	0
T180	10489	15	0	0
T228	9064	3	0	0
T276	79979	75	0	0
T301	3292	6	0	0
T302	4091	6	0	0
T303	10733	6	0	0
T304	20995	37	0	0
T305	10845	27	0	0
T306	6637	12	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1853	0	0
T64	4776	3	0	0
T180	10489	59	0	0
T228	9064	32	0	0
T276	79979	259	0	0
T301	3292	6	0	0
T302	4091	28	0	0
T303	10733	41	0	0
T304	20995	32	0	0
T305	10845	6	0	0
T306	6637	36	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	900	0	0
T64	4776	6	0	0
T180	10489	21	0	0
T228	9064	9	0	0
T276	79979	78	0	0
T301	3292	7	0	0
T302	4091	3	0	0
T303	10733	4	0	0
T304	20995	7	0	0
T305	10845	36	0	0
T306	6637	9	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1831	0	0
T64	4776	5	0	0
T180	10489	55	0	0
T228	9064	17	0	0
T276	79979	331	0	0
T301	3292	1	0	0
T302	4091	2	0	0
T303	10733	38	0	0
T304	20995	31	0	0
T305	10845	20	0	0
T306	6637	58	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2212	0	0
T64	4776	6	0	0
T180	10489	4	0	0
T228	9064	14	0	0
T276	79979	338	0	0
T301	3292	2	0	0
T302	4091	37	0	0
T303	10733	26	0	0
T304	20995	23	0	0
T305	10845	35	0	0
T306	6637	38	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1482	0	0
T64	4776	5	0	0
T180	10489	16	0	0
T228	9064	11	0	0
T276	79979	68	0	0
T301	3292	3	0	0
T302	4091	1	0	0
T303	10733	10	0	0
T304	20995	52	0	0
T305	10845	34	0	0
T306	6637	6	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1283	0	0
T64	4776	12	0	0
T180	10489	9	0	0
T228	9064	7	0	0
T276	79979	80	0	0
T301	3292	5	0	0
T302	4091	7	0	0
T303	10733	18	0	0
T304	20995	35	0	0
T305	10845	6	0	0
T306	6637	12	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2195	0	0
T64	4776	10	0	0
T180	10489	32	0	0
T228	9064	24	0	0
T276	79979	283	0	0
T301	3292	16	0	0
T302	4091	39	0	0
T303	10733	23	0	0
T304	20995	45	0	0
T305	10845	28	0	0
T306	6637	42	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1305	0	0
T180	10489	59	0	0
T228	9064	13	0	0
T276	79979	310	0	0
T301	3292	3	0	0
T302	4091	9	0	0
T303	10733	62	0	0
T304	20995	56	0	0
T305	10845	54	0	0
T306	6637	29	0	0
T308	6320	21	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1899	0	0
T64	4776	4	0	0
T180	10489	39	0	0
T228	9064	21	0	0
T276	79979	379	0	0
T301	3292	35	0	0
T302	4091	32	0	0
T303	10733	54	0	0
T304	20995	64	0	0
T305	10845	5	0	0
T306	6637	28	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2161	0	0
T64	4776	7	0	0
T180	10489	53	0	0
T228	9064	12	0	0
T276	79979	379	0	0
T302	4091	24	0	0
T303	10733	17	0	0
T304	20995	30	0	0
T305	10845	22	0	0
T306	6637	25	0	0
T308	6320	4	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2260	0	0
T64	4776	7	0	0
T180	10489	48	0	0
T228	9064	28	0	0
T276	79979	376	0	0
T301	3292	21	0	0
T302	4091	29	0	0
T303	10733	2	0	0
T304	20995	51	0	0
T306	6637	64	0	0
T308	6320	6	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1238	0	0
T64	4776	8	0	0
T180	10489	48	0	0
T228	9064	8	0	0
T276	79979	251	0	0
T301	3292	1	0	0
T302	4091	7	0	0
T303	10733	50	0	0
T304	20995	51	0	0
T305	10845	7	0	0
T306	6637	61	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1590	0	0
T64	4776	4	0	0
T180	10489	62	0	0
T228	9064	13	0	0
T276	79979	283	0	0
T301	3292	2	0	0
T302	4091	5	0	0
T303	10733	14	0	0
T304	20995	21	0	0
T305	10845	3	0	0
T306	6637	75	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2085	0	0
T64	4776	4	0	0
T180	10489	46	0	0
T228	9064	18	0	0
T276	79979	292	0	0
T301	3292	6	0	0
T302	4091	3	0	0
T303	10733	7	0	0
T304	20995	31	0	0
T305	10845	11	0	0
T306	6637	33	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2328	0	0
T64	4776	8	0	0
T180	10489	37	0	0
T228	9064	24	0	0
T276	79979	392	0	0
T301	3292	3	0	0
T302	4091	4	0	0
T303	10733	9	0	0
T304	20995	54	0	0
T305	10845	19	0	0
T306	6637	24	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2121	0	0
T64	4776	5	0	0
T180	10489	14	0	0
T228	9064	5	0	0
T276	79979	287	0	0
T301	3292	43	0	0
T302	4091	1	0	0
T303	10733	26	0	0
T304	20995	35	0	0
T305	10845	20	0	0
T306	6637	65	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1431	0	0
T64	4776	3	0	0
T180	10489	23	0	0
T228	9064	10	0	0
T276	79979	82	0	0
T301	3292	1	0	0
T302	4091	4	0	0
T303	10733	5	0	0
T304	20995	86	0	0
T305	10845	29	0	0
T306	6637	9	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	995	0	0
T64	4776	11	0	0
T180	10489	22	0	0
T228	9064	13	0	0
T276	79979	55	0	0
T301	3292	3	0	0
T302	4091	2	0	0
T303	10733	24	0	0
T304	20995	28	0	0
T305	10845	17	0	0
T306	6637	5	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1384	0	0
T64	4776	11	0	0
T180	10489	20	0	0
T228	9064	8	0	0
T276	79979	64	0	0
T301	3292	5	0	0
T302	4091	8	0	0
T303	10733	12	0	0
T304	20995	17	0	0
T305	10845	17	0	0
T306	6637	9	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1513	0	0
T64	4776	12	0	0
T180	10489	13	0	0
T228	9064	3	0	0
T276	79979	72	0	0
T301	3292	2	0	0
T302	4091	9	0	0
T303	10733	8	0	0
T304	20995	16	0	0
T305	10845	23	0	0
T306	6637	4	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	960	0	0
T64	4776	2	0	0
T180	10489	25	0	0
T228	9064	2	0	0
T276	79979	78	0	0
T301	3292	6	0	0
T302	4091	9	0	0
T303	10733	37	0	0
T304	20995	68	0	0
T305	10845	7	0	0
T306	6637	9	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	915	0	0
T64	4776	7	0	0
T180	10489	15	0	0
T228	9064	2	0	0
T276	79979	76	0	0
T301	3292	8	0	0
T302	4091	4	0	0
T303	10733	11	0	0
T304	20995	31	0	0
T305	10845	6	0	0
T306	6637	9	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	976	0	0
T64	4776	10	0	0
T180	10489	1	0	0
T228	9064	4	0	0
T276	79979	79	0	0
T301	3292	6	0	0
T303	10733	17	0	0
T304	20995	31	0	0
T305	10845	7	0	0
T306	6637	1	0	0
T308	6320	6	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1518	0	0
T64	4776	4	0	0
T180	10489	7	0	0
T228	9064	6	0	0
T276	79979	84	0	0
T301	3292	10	0	0
T302	4091	2	0	0
T303	10733	15	0	0
T304	20995	71	0	0
T305	10845	34	0	0
T306	6637	10	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1443	0	0
T64	4776	6	0	0
T180	10489	16	0	0
T228	9064	3	0	0
T276	79979	73	0	0
T301	3292	10	0	0
T302	4091	6	0	0
T303	10733	32	0	0
T304	20995	39	0	0
T305	10845	3	0	0
T306	6637	11	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1377	0	0
T64	4776	3	0	0
T180	10489	9	0	0
T228	9064	5	0	0
T276	79979	77	0	0
T302	4091	9	0	0
T303	10733	1	0	0
T304	20995	68	0	0
T305	10845	15	0	0
T306	6637	11	0	0
T308	6320	6	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1265	0	0
T64	4776	16	0	0
T180	10489	44	0	0
T228	9064	27	0	0
T276	79979	310	0	0
T301	3292	4	0	0
T302	4091	6	0	0
T303	10733	18	0	0
T304	20995	94	0	0
T305	10845	37	0	0
T306	6637	44	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1441	0	0
T64	4776	3	0	0
T180	10489	4	0	0
T228	9064	3	0	0
T276	79979	98	0	0
T302	4091	6	0	0
T303	10733	49	0	0
T304	20995	32	0	0
T305	10845	53	0	0
T306	6637	11	0	0
T307	9135	4	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2173	0	0
T64	4776	10	0	0
T180	10489	32	0	0
T228	9064	22	0	0
T276	79979	336	0	0
T301	3292	9	0	0
T302	4091	23	0	0
T303	10733	12	0	0
T304	20995	71	0	0
T305	10845	33	0	0
T306	6637	55	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2336	0	0
T64	4776	4	0	0
T180	10489	72	0	0
T228	9064	14	0	0
T276	79979	388	0	0
T301	3292	7	0	0
T302	4091	3	0	0
T303	10733	4	0	0
T304	20995	63	0	0
T305	10845	2	0	0
T306	6637	53	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1564	0	0
T64	4776	7	0	0
T180	10489	23	0	0
T228	9064	24	0	0
T276	79979	90	0	0
T301	3292	3	0	0
T302	4091	2	0	0
T303	10733	31	0	0
T304	20995	43	0	0
T305	10845	2	0	0
T306	6637	13	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1497	0	0
T64	4776	19	0	0
T180	10489	11	0	0
T228	9064	5	0	0
T276	79979	68	0	0
T302	4091	4	0	0
T303	10733	19	0	0
T304	20995	92	0	0
T305	10845	7	0	0
T307	9135	9	0	0
T308	6320	2	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1441	0	0
T64	4776	5	0	0
T180	10489	17	0	0
T276	79979	86	0	0
T301	3292	2	0	0
T302	4091	1	0	0
T303	10733	20	0	0
T304	20995	36	0	0
T305	10845	40	0	0
T306	6637	9	0	0
T308	6320	3	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1665	0	0
T64	4776	6	0	0
T180	10489	48	0	0
T228	9064	22	0	0
T276	79979	308	0	0
T301	3292	1	0	0
T302	4091	10	0	0
T303	10733	33	0	0
T304	20995	55	0	0
T305	10845	53	0	0
T306	6637	4	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	506	0	0
T64	4776	9	0	0
T180	10489	24	0	0
T228	9064	8	0	0
T276	79979	86	0	0
T301	3292	5	0	0
T302	4091	7	0	0
T303	10733	37	0	0
T304	20995	28	0	0
T305	10845	46	0	0
T306	6637	11	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1632	0	0
T64	4776	12	0	0
T180	10489	21	0	0
T228	9064	21	0	0
T276	79979	134	0	0
T301	3292	10	0	0
T302	4091	5	0	0
T303	10733	16	0	0
T304	20995	75	0	0
T306	6637	18	0	0
T308	6320	3	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1022	0	0
T64	4776	3	0	0
T180	10489	11	0	0
T228	9064	6	0	0
T276	79979	106	0	0
T301	3292	7	0	0
T302	4091	3	0	0
T303	10733	48	0	0
T304	20995	45	0	0
T305	10845	6	0	0
T306	6637	13	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1622	0	0
T64	4776	2	0	0
T180	10489	15	0	0
T228	9064	10	0	0
T276	79979	137	0	0
T301	3292	4	0	0
T302	4091	7	0	0
T303	10733	5	0	0
T304	20995	58	0	0
T305	10845	16	0	0
T306	6637	13	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2170	0	0
T64	4776	7	0	0
T180	10489	39	0	0
T228	9064	25	0	0
T276	79979	240	0	0
T301	3292	33	0	0
T302	4091	24	0	0
T303	10733	6	0	0
T304	20995	42	0	0
T305	10845	32	0	0
T306	6637	8	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1547	0	0
T64	4776	10	0	0
T180	10489	18	0	0
T228	9064	11	0	0
T276	79979	104	0	0
T301	3292	4	0	0
T302	4091	1	0	0
T303	10733	10	0	0
T304	20995	26	0	0
T305	10845	27	0	0
T306	6637	11	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1560	0	0
T64	4776	7	0	0
T180	10489	16	0	0
T228	9064	34	0	0
T276	79979	103	0	0
T301	3292	8	0	0
T302	4091	3	0	0
T303	10733	38	0	0
T304	20995	4	0	0
T305	10845	34	0	0
T306	6637	7	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1527	0	0
T64	4776	9	0	0
T180	10489	16	0	0
T228	9064	11	0	0
T276	79979	99	0	0
T301	3292	3	0	0
T302	4091	4	0	0
T303	10733	41	0	0
T304	20995	49	0	0
T305	10845	8	0	0
T306	6637	25	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1585	0	0
T64	4776	13	0	0
T180	10489	13	0	0
T228	9064	7	0	0
T276	79979	119	0	0
T301	3292	4	0	0
T302	4091	2	0	0
T303	10733	38	0	0
T304	20995	19	0	0
T305	10845	12	0	0
T306	6637	5	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1580	0	0
T64	4776	9	0	0
T180	10489	24	0	0
T228	9064	3	0	0
T276	79979	109	0	0
T301	3292	4	0	0
T302	4091	1	0	0
T303	10733	14	0	0
T304	20995	59	0	0
T305	10845	18	0	0
T306	6637	23	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1097	0	0
T64	4776	12	0	0
T180	10489	20	0	0
T228	9064	4	0	0
T276	79979	117	0	0
T301	3292	8	0	0
T302	4091	4	0	0
T303	10733	50	0	0
T304	20995	42	0	0
T305	10845	18	0	0
T306	6637	10	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1069	0	0
T64	4776	16	0	0
T180	10489	20	0	0
T228	9064	9	0	0
T276	79979	127	0	0
T301	3292	4	0	0
T302	4091	7	0	0
T303	10733	16	0	0
T304	20995	68	0	0
T305	10845	3	0	0
T306	6637	12	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1131	0	0
T64	4776	6	0	0
T180	10489	21	0	0
T228	9064	11	0	0
T276	79979	118	0	0
T301	3292	4	0	0
T302	4091	1	0	0
T303	10733	32	0	0
T304	20995	28	0	0
T305	10845	8	0	0
T306	6637	17	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2226	0	0
T64	4776	8	0	0
T180	10489	51	0	0
T228	9064	20	0	0
T276	79979	242	0	0
T301	3292	35	0	0
T302	4091	33	0	0
T303	10733	37	0	0
T304	20995	46	0	0
T305	10845	10	0	0
T306	6637	30	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1790	0	0
T64	4776	10	0	0
T180	10489	30	0	0
T228	9064	9	0	0
T276	79979	345	0	0
T301	3292	25	0	0
T302	4091	32	0	0
T303	10733	8	0	0
T304	20995	31	0	0
T305	10845	21	0	0
T306	6637	30	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2312	0	0
T64	4776	9	0	0
T180	10489	29	0	0
T228	9064	15	0	0
T276	79979	282	0	0
T301	3292	25	0	0
T302	4091	38	0	0
T303	10733	8	0	0
T304	20995	9	0	0
T305	10845	34	0	0
T306	6637	41	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2209	0	0
T64	4776	9	0	0
T180	10489	72	0	0
T228	9064	8	0	0
T276	79979	360	0	0
T301	3292	31	0	0
T302	4091	1	0	0
T303	10733	49	0	0
T304	20995	20	0	0
T305	10845	16	0	0
T306	6637	28	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2283	0	0
T64	4776	10	0	0
T180	10489	38	0	0
T228	9064	20	0	0
T276	79979	391	0	0
T301	3292	4	0	0
T302	4091	29	0	0
T303	10733	18	0	0
T304	20995	54	0	0
T305	10845	4	0	0
T306	6637	9	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	2276	0	0
T64	4776	11	0	0
T180	10489	39	0	0
T228	9064	20	0	0
T276	79979	269	0	0
T301	3292	33	0	0
T302	4091	1	0	0
T303	10733	19	0	0
T304	20995	71	0	0
T305	10845	17	0	0
T306	6637	74	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1437	0	0
T64	4776	6	0	0
T180	10489	37	0	0
T228	9064	20	0	0
T276	79979	280	0	0
T301	3292	5	0	0
T302	4091	4	0	0
T303	10733	29	0	0
T304	20995	32	0	0
T305	10845	2	0	0
T306	6637	59	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1879	0	0
T64	4776	12	0	0
T180	10489	23	0	0
T228	9064	45	0	0
T276	79979	390	0	0
T301	3292	22	0	0
T302	4091	20	0	0
T303	10733	6	0	0
T304	20995	18	0	0
T305	10845	37	0	0
T306	6637	61	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1158	0	0
T64	4776	8	0	0
T180	10489	8	0	0
T228	9064	14	0	0
T303	10733	14	0	0
T304	20995	12	0	0
T305	10845	4	0	0
T307	9135	12	0	0
T309	5563	9	0	0
T310	10718	12	0	0
T311	9564	11	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	859	0	0
T64	4776	9	0	0
T180	10489	14	0	0
T228	9064	13	0	0
T276	79979	85	0	0
T301	3292	1	0	0
T302	4091	8	0	0
T303	10733	6	0	0
T304	20995	4	0	0
T305	10845	15	0	0
T306	6637	16	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1433	0	0
T64	4776	5	0	0
T180	10489	12	0	0
T228	9064	13	0	0
T276	79979	64	0	0
T301	3292	6	0	0
T302	4091	2	0	0
T303	10733	18	0	0
T304	20995	56	0	0
T305	10845	43	0	0
T306	6637	9	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1388	0	0
T64	4776	3	0	0
T180	10489	16	0	0
T228	9064	8	0	0
T276	79979	95	0	0
T301	3292	4	0	0
T302	4091	1	0	0
T303	10733	9	0	0
T304	20995	26	0	0
T305	10845	22	0	0
T306	6637	12	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1034	0	0
T64	4776	5	0	0
T180	10489	15	0	0
T228	9064	11	0	0
T276	79979	83	0	0
T301	3292	9	0	0
T302	4091	7	0	0
T303	10733	26	0	0
T304	20995	58	0	0
T305	10845	38	0	0
T306	6637	14	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	899	0	0
T64	4776	7	0	0
T180	10489	15	0	0
T228	9064	16	0	0
T276	79979	77	0	0
T301	3292	1	0	0
T303	10733	6	0	0
T304	20995	33	0	0
T305	10845	8	0	0
T306	6637	2	0	0
T308	6320	3	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	900	0	0
T64	4776	6	0	0
T180	10489	20	0	0
T228	9064	8	0	0
T276	79979	98	0	0
T301	3292	5	0	0
T302	4091	8	0	0
T303	10733	17	0	0
T304	20995	47	0	0
T306	6637	8	0	0
T308	6320	3	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1459	0	0
T64	4776	8	0	0
T180	10489	9	0	0
T228	9064	4	0	0
T276	79979	94	0	0
T301	3292	5	0	0
T302	4091	2	0	0
T303	10733	32	0	0
T304	20995	36	0	0
T305	10845	38	0	0
T306	6637	9	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	1445	0	0
T64	4776	6	0	0
T180	10489	26	0	0
T228	9064	17	0	0
T276	79979	58	0	0
T301	3292	3	0	0
T302	4091	8	0	0
T304	20995	50	0	0
T305	10845	19	0	0
T306	6637	3	0	0
T309	5563	3	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	422400708	992	0	0
T64	4776	3	0	0
T180	10489	12	0	0
T228	9064	6	0	0
T276	79979	70	0	0
T301	3292	8	0	0
T303	10733	34	0	0
T304	20995	48	0	0
T305	10845	22	0	0
T306	6637	7	0	0
T308	6320	11	0	0