Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
84.73	97.12	86.40	98.44		100.00	41.67	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	364036417	4007	0	0
addr_rd_A	364036417	1397	0	0
bank0_info0_page_cfg_0_rd_A	364036417	3139	0	0
bank0_info0_page_cfg_1_rd_A	364036417	2703	0	0
bank0_info0_page_cfg_2_rd_A	364036417	3166	0	0
bank0_info0_page_cfg_3_rd_A	364036417	2442	0	0
bank0_info0_page_cfg_4_rd_A	364036417	3214	0	0
bank0_info0_page_cfg_5_rd_A	364036417	3395	0	0
bank0_info0_page_cfg_6_rd_A	364036417	3172	0	0
bank0_info0_page_cfg_7_rd_A	364036417	3516	0	0
bank0_info0_page_cfg_8_rd_A	364036417	3216	0	0
bank0_info0_page_cfg_9_rd_A	364036417	2299	0	0
bank0_info0_regwen_0_rd_A	364036417	2234	0	0
bank0_info0_regwen_1_rd_A	364036417	2426	0	0
bank0_info0_regwen_2_rd_A	364036417	2338	0	0
bank0_info0_regwen_3_rd_A	364036417	1769	0	0
bank0_info0_regwen_4_rd_A	364036417	1295	0	0
bank0_info0_regwen_5_rd_A	364036417	2313	0	0
bank0_info0_regwen_6_rd_A	364036417	1747	0	0
bank0_info0_regwen_7_rd_A	364036417	2304	0	0
bank0_info0_regwen_8_rd_A	364036417	1174	0	0
bank0_info0_regwen_9_rd_A	364036417	2293	0	0
bank0_info1_page_cfg_rd_A	364036417	2380	0	0
bank0_info1_regwen_rd_A	364036417	2280	0	0
bank0_info2_page_cfg_0_rd_A	364036417	2662	0	0
bank0_info2_page_cfg_1_rd_A	364036417	2979	0	0
bank0_info2_regwen_0_rd_A	364036417	1780	0	0
bank0_info2_regwen_1_rd_A	364036417	1784	0	0
bank1_info0_page_cfg_0_rd_A	364036417	3227	0	0
bank1_info0_page_cfg_1_rd_A	364036417	2707	0	0
bank1_info0_page_cfg_2_rd_A	364036417	2385	0	0
bank1_info0_page_cfg_3_rd_A	364036417	2195	0	0
bank1_info0_page_cfg_4_rd_A	364036417	2937	0	0
bank1_info0_page_cfg_5_rd_A	364036417	2647	0	0
bank1_info0_page_cfg_6_rd_A	364036417	3126	0	0
bank1_info0_page_cfg_7_rd_A	364036417	3244	0	0
bank1_info0_page_cfg_8_rd_A	364036417	3389	0	0
bank1_info0_page_cfg_9_rd_A	364036417	2850	0	0
bank1_info0_regwen_0_rd_A	364036417	1803	0	0
bank1_info0_regwen_1_rd_A	364036417	1812	0	0
bank1_info0_regwen_2_rd_A	364036417	2282	0	0
bank1_info0_regwen_3_rd_A	364036417	2395	0	0
bank1_info0_regwen_4_rd_A	364036417	2259	0	0
bank1_info0_regwen_5_rd_A	364036417	2300	0	0
bank1_info0_regwen_6_rd_A	364036417	2333	0	0
bank1_info0_regwen_7_rd_A	364036417	2209	0	0
bank1_info0_regwen_8_rd_A	364036417	1683	0	0
bank1_info0_regwen_9_rd_A	364036417	2195	0	0
bank1_info1_page_cfg_rd_A	364036417	2755	0	0
bank1_info1_regwen_rd_A	364036417	827	0	0
bank1_info2_page_cfg_0_rd_A	364036417	3348	0	0
bank1_info2_page_cfg_1_rd_A	364036417	2823	0	0
bank1_info2_regwen_0_rd_A	364036417	1702	0	0
bank1_info2_regwen_1_rd_A	364036417	1944	0	0
bank_cfg_regwen_rd_A	364036417	2333	0	0
default_region_rd_A	364036417	3094	0	0
exec_rd_A	364036417	2334	0	0
fifo_lvl_rd_A	364036417	1579	0	0
fifo_rst_rd_A	364036417	1797	0	0
hw_info_cfg_override_rd_A	364036417	2089	0	0
intr_enable_rd_A	364036417	3160	0	0
mp_region_0_rd_A	364036417	1978	0	0
mp_region_1_rd_A	364036417	2143	0	0
mp_region_2_rd_A	364036417	1987	0	0
mp_region_3_rd_A	364036417	2404	0	0
mp_region_4_rd_A	364036417	1983	0	0
mp_region_5_rd_A	364036417	1890	0	0
mp_region_6_rd_A	364036417	1994	0	0
mp_region_7_rd_A	364036417	1966	0	0
mp_region_cfg_0_rd_A	364036417	3239	0	0
mp_region_cfg_1_rd_A	364036417	3300	0	0
mp_region_cfg_2_rd_A	364036417	3200	0	0
mp_region_cfg_3_rd_A	364036417	3341	0	0
mp_region_cfg_4_rd_A	364036417	2738	0	0
mp_region_cfg_5_rd_A	364036417	3468	0	0
mp_region_cfg_6_rd_A	364036417	3296	0	0
mp_region_cfg_7_rd_A	364036417	3435	0	0
phy_alert_cfg_rd_A	364036417	1726	0	0
region_cfg_regwen_0_rd_A	364036417	1926	0	0
region_cfg_regwen_1_rd_A	364036417	2297	0	0
region_cfg_regwen_2_rd_A	364036417	1788	0	0
region_cfg_regwen_3_rd_A	364036417	2373	0	0
region_cfg_regwen_4_rd_A	364036417	1795	0	0
region_cfg_regwen_5_rd_A	364036417	1216	0	0
region_cfg_regwen_6_rd_A	364036417	1720	0	0
region_cfg_regwen_7_rd_A	364036417	2184	0	0
scratch_rd_A	364036417	2178	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	4007	0	0
T56	4890	25	0	0
T57	3367	81	0	0
T58	31075	2	0	0
T59	4376	5	0	0
T194	3464	177	0	0
T195	5472	387	0	0
T205	2595	3	0	0
T206	8372	4	0	0
T207	34169	2	0	0
T208	68874	2	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1397	0	0
T55	3627	1	0	0
T209	10042	19	0	0
T220	18120	57	0	0
T222	8920	5	0	0
T227	10875	6	0	0
T305	5078	7	0	0
T306	81636	481	0	0
T307	4710	9	0	0
T308	10709	35	0	0
T309	78700	42	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3139	0	0
T55	3627	4	0	0
T209	10042	17	0	0
T220	18120	28	0	0
T227	10875	1	0	0
T305	5078	13	0	0
T306	81636	509	0	0
T307	4710	11	0	0
T308	10709	28	0	0
T309	78700	131	0	0
T310	4877	20	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2703	0	0
T55	3627	38	0	0
T209	10042	34	0	0
T220	18120	30	0	0
T222	8920	16	0	0
T227	10875	19	0	0
T305	5078	14	0	0
T306	81636	524	0	0
T307	4710	6	0	0
T308	10709	51	0	0
T310	4877	19	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3166	0	0
T55	3627	3	0	0
T209	10042	80	0	0
T220	18120	56	0	0
T222	8920	4	0	0
T305	5078	13	0	0
T306	81636	494	0	0
T307	4710	12	0	0
T308	10709	6	0	0
T309	78700	149	0	0
T310	4877	22	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2442	0	0
T55	3627	4	0	0
T209	10042	13	0	0
T220	18120	10	0	0
T222	8920	28	0	0
T227	10875	8	0	0
T305	5078	6	0	0
T306	81636	440	0	0
T307	4710	14	0	0
T308	10709	2	0	0
T310	4877	5	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3214	0	0
T55	3627	1	0	0
T209	10042	17	0	0
T220	18120	15	0	0
T222	8920	10	0	0
T227	10875	5	0	0
T305	5078	12	0	0
T306	81636	545	0	0
T307	4710	3	0	0
T308	10709	2	0	0
T310	4877	23	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3395	0	0
T55	3627	26	0	0
T209	10042	31	0	0
T220	18120	4	0	0
T222	8920	14	0	0
T305	5078	7	0	0
T306	81636	534	0	0
T307	4710	8	0	0
T308	10709	31	0	0
T309	78700	164	0	0
T311	4404	1	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3172	0	0
T209	10042	12	0	0
T220	18120	10	0	0
T222	8920	20	0	0
T227	10875	5	0	0
T305	5078	15	0	0
T306	81636	503	0	0
T307	4710	8	0	0
T308	10709	5	0	0
T309	78700	142	0	0
T310	4877	1	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3516	0	0
T55	3627	22	0	0
T209	10042	60	0	0
T220	18120	9	0	0
T227	10875	18	0	0
T305	5078	3	0	0
T306	81636	493	0	0
T307	4710	3	0	0
T308	10709	11	0	0
T309	78700	132	0	0
T310	4877	8	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3216	0	0
T55	3627	21	0	0
T209	10042	23	0	0
T220	18120	25	0	0
T222	8920	14	0	0
T227	10875	7	0	0
T306	81636	550	0	0
T307	4710	17	0	0
T308	10709	17	0	0
T309	78700	124	0	0
T310	4877	1	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2299	0	0
T55	3627	41	0	0
T209	10042	6	0	0
T220	18120	22	0	0
T222	8920	22	0	0
T305	5078	14	0	0
T307	4710	7	0	0
T308	10709	5	0	0
T309	78700	209	0	0
T310	4877	27	0	0
T311	4404	5	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2234	0	0
T55	3627	2	0	0
T209	10042	18	0	0
T220	18120	53	0	0
T222	8920	7	0	0
T227	10875	13	0	0
T305	5078	5	0	0
T306	81636	497	0	0
T307	4710	7	0	0
T308	10709	29	0	0
T310	4877	4	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2426	0	0
T55	3627	4	0	0
T209	10042	22	0	0
T220	18120	48	0	0
T222	8920	16	0	0
T227	10875	47	0	0
T305	5078	5	0	0
T306	81636	533	0	0
T307	4710	8	0	0
T308	10709	32	0	0
T310	4877	1	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2338	0	0
T55	3627	6	0	0
T209	10042	24	0	0
T222	8920	8	0	0
T227	10875	14	0	0
T305	5078	11	0	0
T306	81636	531	0	0
T307	4710	10	0	0
T308	10709	25	0	0
T309	78700	68	0	0
T311	4404	7	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1769	0	0
T55	3627	3	0	0
T209	10042	10	0	0
T220	18120	36	0	0
T222	8920	18	0	0
T227	10875	28	0	0
T305	5078	6	0	0
T306	81636	502	0	0
T307	4710	5	0	0
T308	10709	7	0	0
T309	78700	44	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1295	0	0
T55	3627	7	0	0
T209	10042	18	0	0
T220	18120	30	0	0
T227	10875	6	0	0
T305	5078	2	0	0
T307	4710	16	0	0
T308	10709	1	0	0
T309	78700	34	0	0
T310	4877	6	0	0
T311	4404	11	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2313	0	0
T55	3627	6	0	0
T209	10042	16	0	0
T220	18120	3	0	0
T222	8920	9	0	0
T227	10875	2	0	0
T305	5078	11	0	0
T306	81636	532	0	0
T307	4710	6	0	0
T308	10709	66	0	0
T310	4877	1	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1747	0	0
T55	3627	2	0	0
T209	10042	12	0	0
T220	18120	59	0	0
T222	8920	1	0	0
T227	10875	10	0	0
T305	5078	10	0	0
T306	81636	514	0	0
T307	4710	4	0	0
T308	10709	6	0	0
T310	4877	9	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2304	0	0
T209	10042	13	0	0
T220	18120	26	0	0
T222	8920	15	0	0
T227	10875	27	0	0
T305	5078	4	0	0
T306	81636	569	0	0
T307	4710	11	0	0
T308	10709	17	0	0
T309	78700	36	0	0
T311	4404	2	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1174	0	0
T55	3627	2	0	0
T209	10042	9	0	0
T220	18120	36	0	0
T222	8920	2	0	0
T227	10875	6	0	0
T305	5078	1	0	0
T307	4710	6	0	0
T308	10709	11	0	0
T309	78700	48	0	0
T310	4877	3	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2293	0	0
T55	3627	1	0	0
T209	10042	18	0	0
T220	18120	19	0	0
T222	8920	15	0	0
T227	10875	3	0	0
T305	5078	12	0	0
T306	81636	465	0	0
T307	4710	6	0	0
T308	10709	45	0	0
T310	4877	5	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2380	0	0
T55	3627	8	0	0
T209	10042	28	0	0
T220	18120	27	0	0
T222	8920	3	0	0
T227	10875	9	0	0
T305	5078	3	0	0
T306	81636	501	0	0
T307	4710	14	0	0
T308	10709	6	0	0
T310	4877	1	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2280	0	0
T209	10042	19	0	0
T220	18120	16	0	0
T222	8920	18	0	0
T227	10875	20	0	0
T305	5078	2	0	0
T306	81636	520	0	0
T307	4710	4	0	0
T308	10709	27	0	0
T309	78700	65	0	0
T310	4877	6	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2662	0	0
T55	3627	7	0	0
T209	10042	14	0	0
T220	18120	49	0	0
T222	8920	9	0	0
T227	10875	24	0	0
T305	5078	3	0	0
T307	4710	9	0	0
T308	10709	3	0	0
T309	78700	158	0	0
T310	4877	32	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2979	0	0
T55	3627	19	0	0
T209	10042	57	0	0
T220	18120	9	0	0
T222	8920	3	0	0
T227	10875	1	0	0
T305	5078	8	0	0
T306	81636	543	0	0
T307	4710	6	0	0
T308	10709	66	0	0
T309	78700	196	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1780	0	0
T55	3627	5	0	0
T209	10042	21	0	0
T220	18120	24	0	0
T222	8920	1	0	0
T227	10875	12	0	0
T305	5078	2	0	0
T307	4710	5	0	0
T308	10709	16	0	0
T309	78700	44	0	0
T310	4877	8	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1784	0	0
T55	3627	3	0	0
T209	10042	14	0	0
T220	18120	53	0	0
T222	8920	5	0	0
T227	10875	5	0	0
T305	5078	14	0	0
T306	81636	496	0	0
T307	4710	10	0	0
T308	10709	26	0	0
T310	4877	7	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3227	0	0
T55	3627	4	0	0
T209	10042	41	0	0
T220	18120	45	0	0
T222	8920	23	0	0
T227	10875	8	0	0
T305	5078	6	0	0
T306	81636	490	0	0
T307	4710	9	0	0
T308	10709	9	0	0
T310	4877	28	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2707	0	0
T55	3627	7	0	0
T209	10042	48	0	0
T220	18120	27	0	0
T222	8920	1	0	0
T227	10875	30	0	0
T305	5078	4	0	0
T307	4710	2	0	0
T308	10709	22	0	0
T309	78700	135	0	0
T310	4877	23	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2385	0	0
T55	3627	8	0	0
T209	10042	50	0	0
T220	18120	32	0	0
T227	10875	10	0	0
T305	5078	5	0	0
T306	81636	505	0	0
T307	4710	11	0	0
T308	10709	36	0	0
T309	78700	202	0	0
T310	4877	5	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2195	0	0
T55	3627	5	0	0
T209	10042	13	0	0
T220	18120	17	0	0
T222	8920	26	0	0
T227	10875	10	0	0
T305	5078	4	0	0
T307	4710	8	0	0
T308	10709	6	0	0
T309	78700	111	0	0
T310	4877	5	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2937	0	0
T55	3627	32	0	0
T209	10042	49	0	0
T220	18120	24	0	0
T222	8920	5	0	0
T227	10875	13	0	0
T305	5078	14	0	0
T306	81636	471	0	0
T307	4710	3	0	0
T308	10709	34	0	0
T310	4877	13	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2647	0	0
T55	3627	4	0	0
T209	10042	19	0	0
T220	18120	5	0	0
T222	8920	16	0	0
T227	10875	20	0	0
T305	5078	14	0	0
T306	81636	499	0	0
T307	4710	3	0	0
T308	10709	40	0	0
T310	4877	7	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3126	0	0
T55	3627	8	0	0
T209	10042	61	0	0
T220	18120	18	0	0
T222	8920	4	0	0
T227	10875	12	0	0
T305	5078	7	0	0
T306	81636	506	0	0
T307	4710	6	0	0
T308	10709	17	0	0
T310	4877	13	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3244	0	0
T55	3627	38	0	0
T209	10042	37	0	0
T220	18120	10	0	0
T222	8920	5	0	0
T227	10875	15	0	0
T305	5078	4	0	0
T306	81636	478	0	0
T307	4710	6	0	0
T308	10709	38	0	0
T310	4877	4	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3389	0	0
T55	3627	8	0	0
T209	10042	43	0	0
T220	18120	1	0	0
T222	8920	13	0	0
T227	10875	11	0	0
T305	5078	10	0	0
T306	81636	489	0	0
T307	4710	9	0	0
T308	10709	24	0	0
T310	4877	17	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2850	0	0
T55	3627	3	0	0
T209	10042	50	0	0
T220	18120	22	0	0
T222	8920	4	0	0
T227	10875	7	0	0
T305	5078	6	0	0
T307	4710	12	0	0
T308	10709	11	0	0
T309	78700	154	0	0
T312	75180	175	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1803	0	0
T55	3627	1	0	0
T209	10042	22	0	0
T220	18120	11	0	0
T222	8920	8	0	0
T227	10875	11	0	0
T305	5078	9	0	0
T306	81636	499	0	0
T307	4710	13	0	0
T308	10709	45	0	0
T310	4877	14	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1812	0	0
T55	3627	2	0	0
T209	10042	20	0	0
T220	18120	46	0	0
T222	8920	23	0	0
T227	10875	13	0	0
T305	5078	9	0	0
T307	4710	9	0	0
T308	10709	26	0	0
T309	78700	49	0	0
T310	4877	7	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2282	0	0
T55	3627	3	0	0
T209	10042	2	0	0
T220	18120	7	0	0
T227	10875	1	0	0
T305	5078	9	0	0
T306	81636	556	0	0
T307	4710	4	0	0
T308	10709	36	0	0
T309	78700	40	0	0
T310	4877	5	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2395	0	0
T55	3627	5	0	0
T209	10042	15	0	0
T220	18120	52	0	0
T222	8920	3	0	0
T227	10875	17	0	0
T305	5078	9	0	0
T306	81636	535	0	0
T307	4710	13	0	0
T308	10709	36	0	0
T310	4877	6	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2259	0	0
T55	3627	2	0	0
T209	10042	30	0	0
T220	18120	20	0	0
T222	8920	1	0	0
T227	10875	25	0	0
T305	5078	6	0	0
T306	81636	503	0	0
T307	4710	8	0	0
T308	10709	76	0	0
T310	4877	1	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2300	0	0
T209	10042	18	0	0
T220	18120	42	0	0
T222	8920	42	0	0
T227	10875	22	0	0
T305	5078	5	0	0
T306	81636	472	0	0
T307	4710	14	0	0
T308	10709	7	0	0
T309	78700	58	0	0
T310	4877	1	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2333	0	0
T55	3627	6	0	0
T209	10042	10	0	0
T220	18120	39	0	0
T227	10875	1	0	0
T305	5078	2	0	0
T306	81636	536	0	0
T307	4710	5	0	0
T308	10709	58	0	0
T309	78700	38	0	0
T310	4877	11	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2209	0	0
T55	3627	2	0	0
T209	10042	9	0	0
T220	18120	29	0	0
T222	8920	7	0	0
T227	10875	3	0	0
T305	5078	4	0	0
T306	81636	480	0	0
T307	4710	2	0	0
T308	10709	38	0	0
T310	4877	8	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1683	0	0
T55	3627	4	0	0
T209	10042	20	0	0
T220	18120	10	0	0
T222	8920	8	0	0
T227	10875	7	0	0
T305	5078	12	0	0
T306	81636	501	0	0
T307	4710	8	0	0
T308	10709	8	0	0
T310	4877	1	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2195	0	0
T55	3627	4	0	0
T209	10042	29	0	0
T220	18120	17	0	0
T222	8920	12	0	0
T227	10875	16	0	0
T305	5078	11	0	0
T306	81636	507	0	0
T307	4710	9	0	0
T308	10709	22	0	0
T309	78700	32	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2755	0	0
T55	3627	28	0	0
T209	10042	4	0	0
T220	18120	36	0	0
T227	10875	22	0	0
T305	5078	15	0	0
T306	81636	479	0	0
T307	4710	13	0	0
T308	10709	26	0	0
T309	78700	178	0	0
T310	4877	12	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	827	0	0
T55	3627	2	0	0
T209	10042	18	0	0
T220	18120	32	0	0
T222	8920	4	0	0
T227	10875	6	0	0
T305	5078	5	0	0
T307	4710	12	0	0
T308	10709	31	0	0
T309	78700	30	0	0
T310	4877	1	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3348	0	0
T55	3627	7	0	0
T209	10042	45	0	0
T220	18120	22	0	0
T222	8920	1	0	0
T227	10875	41	0	0
T305	5078	9	0	0
T306	81636	462	0	0
T307	4710	6	0	0
T308	10709	47	0	0
T309	78700	205	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2823	0	0
T55	3627	2	0	0
T209	10042	39	0	0
T220	18120	28	0	0
T222	8920	2	0	0
T227	10875	4	0	0
T305	5078	7	0	0
T306	81636	514	0	0
T307	4710	6	0	0
T308	10709	4	0	0
T310	4877	35	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1702	0	0
T55	3627	7	0	0
T209	10042	20	0	0
T220	18120	34	0	0
T222	8920	6	0	0
T227	10875	5	0	0
T305	5078	6	0	0
T307	4710	1	0	0
T309	78700	71	0	0
T310	4877	6	0	0
T311	4404	4	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1944	0	0
T55	3627	3	0	0
T209	10042	8	0	0
T220	18120	55	0	0
T222	8920	7	0	0
T227	10875	10	0	0
T305	5078	2	0	0
T306	81636	539	0	0
T308	10709	3	0	0
T309	78700	74	0	0
T310	4877	15	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2333	0	0
T55	3627	1	0	0
T209	10042	18	0	0
T220	18120	42	0	0
T222	8920	14	0	0
T227	10875	32	0	0
T305	5078	4	0	0
T306	81636	491	0	0
T307	4710	12	0	0
T308	10709	37	0	0
T310	4877	10	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3094	0	0
T55	3627	24	0	0
T209	10042	15	0	0
T220	18120	56	0	0
T227	10875	17	0	0
T305	5078	5	0	0
T306	81636	556	0	0
T307	4710	6	0	0
T308	10709	1	0	0
T309	78700	183	0	0
T310	4877	20	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2334	0	0
T55	3627	2	0	0
T209	10042	28	0	0
T220	18120	13	0	0
T222	8920	17	0	0
T227	10875	4	0	0
T305	5078	3	0	0
T306	81636	494	0	0
T307	4710	1	0	0
T308	10709	50	0	0
T309	78700	33	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1579	0	0
T55	3627	12	0	0
T209	10042	8	0	0
T220	18120	6	0	0
T222	8920	7	0	0
T305	5078	15	0	0
T307	4710	6	0	0
T308	10709	51	0	0
T309	78700	74	0	0
T310	4877	16	0	0
T312	75180	68	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1797	0	0
T55	3627	10	0	0
T209	10042	23	0	0
T220	18120	19	0	0
T222	8920	19	0	0
T227	10875	29	0	0
T305	5078	4	0	0
T307	4710	6	0	0
T308	10709	5	0	0
T309	78700	31	0	0
T310	4877	7	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2089	0	0
T55	3627	16	0	0
T209	10042	11	0	0
T220	18120	39	0	0
T222	8920	9	0	0
T227	10875	27	0	0
T305	5078	11	0	0
T306	81636	524	0	0
T307	4710	8	0	0
T308	10709	21	0	0
T309	78700	60	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3160	0	0
T209	10042	40	0	0
T220	18120	26	0	0
T222	8920	10	0	0
T227	10875	4	0	0
T305	5078	11	0	0
T306	81636	493	0	0
T307	4710	14	0	0
T309	78700	152	0	0
T310	4877	3	0	0
T311	4404	7	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1978	0	0
T55	3627	4	0	0
T209	10042	24	0	0
T220	18120	13	0	0
T222	8920	3	0	0
T227	10875	21	0	0
T305	5078	9	0	0
T306	81636	510	0	0
T307	4710	14	0	0
T308	10709	22	0	0
T310	4877	15	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2143	0	0
T55	3627	9	0	0
T209	10042	26	0	0
T220	18120	40	0	0
T222	8920	12	0	0
T227	10875	28	0	0
T305	5078	6	0	0
T307	4710	7	0	0
T308	10709	21	0	0
T309	78700	64	0	0
T310	4877	6	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1987	0	0
T55	3627	3	0	0
T209	10042	25	0	0
T220	18120	8	0	0
T222	8920	19	0	0
T227	10875	23	0	0
T305	5078	11	0	0
T306	81636	466	0	0
T307	4710	9	0	0
T308	10709	32	0	0
T310	4877	1	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2404	0	0
T209	10042	27	0	0
T220	18120	19	0	0
T222	8920	7	0	0
T227	10875	7	0	0
T305	5078	5	0	0
T306	81636	543	0	0
T307	4710	3	0	0
T309	78700	73	0	0
T310	4877	6	0	0
T312	75180	58	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1983	0	0
T55	3627	6	0	0
T209	10042	26	0	0
T220	18120	30	0	0
T222	8920	8	0	0
T227	10875	11	0	0
T305	5078	13	0	0
T306	81636	505	0	0
T307	4710	13	0	0
T308	10709	8	0	0
T310	4877	9	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1890	0	0
T55	3627	10	0	0
T209	10042	18	0	0
T220	18120	24	0	0
T222	8920	18	0	0
T305	5078	5	0	0
T307	4710	12	0	0
T308	10709	29	0	0
T309	78700	41	0	0
T310	4877	18	0	0
T312	75180	64	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1994	0	0
T55	3627	9	0	0
T209	10042	27	0	0
T220	18120	13	0	0
T222	8920	4	0	0
T227	10875	6	0	0
T305	5078	8	0	0
T306	81636	493	0	0
T307	4710	9	0	0
T308	10709	13	0	0
T310	4877	6	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1966	0	0
T55	3627	7	0	0
T209	10042	17	0	0
T220	18120	37	0	0
T222	8920	11	0	0
T227	10875	5	0	0
T305	5078	7	0	0
T306	81636	529	0	0
T307	4710	6	0	0
T308	10709	24	0	0
T309	78700	82	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3239	0	0
T55	3627	22	0	0
T209	10042	7	0	0
T220	18120	16	0	0
T222	8920	9	0	0
T227	10875	2	0	0
T305	5078	8	0	0
T306	81636	470	0	0
T307	4710	10	0	0
T308	10709	23	0	0
T310	4877	8	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3300	0	0
T55	3627	3	0	0
T209	10042	79	0	0
T220	18120	14	0	0
T227	10875	21	0	0
T305	5078	2	0	0
T306	81636	502	0	0
T307	4710	12	0	0
T308	10709	26	0	0
T309	78700	179	0	0
T312	75180	134	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3200	0	0
T55	3627	20	0	0
T209	10042	30	0	0
T220	18120	16	0	0
T222	8920	15	0	0
T227	10875	12	0	0
T305	5078	12	0	0
T306	81636	507	0	0
T307	4710	8	0	0
T308	10709	44	0	0
T310	4877	2	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3341	0	0
T55	3627	30	0	0
T209	10042	52	0	0
T222	8920	23	0	0
T227	10875	14	0	0
T305	5078	7	0	0
T306	81636	582	0	0
T307	4710	9	0	0
T308	10709	10	0	0
T309	78700	160	0	0
T310	4877	4	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2738	0	0
T55	3627	8	0	0
T209	10042	45	0	0
T220	18120	37	0	0
T222	8920	17	0	0
T227	10875	10	0	0
T305	5078	9	0	0
T307	4710	5	0	0
T308	10709	49	0	0
T309	78700	194	0	0
T310	4877	14	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3468	0	0
T55	3627	8	0	0
T209	10042	51	0	0
T220	18120	30	0	0
T222	8920	3	0	0
T227	10875	22	0	0
T305	5078	3	0	0
T306	81636	508	0	0
T307	4710	8	0	0
T308	10709	37	0	0
T310	4877	22	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3296	0	0
T55	3627	18	0	0
T209	10042	72	0	0
T220	18120	32	0	0
T222	8920	22	0	0
T227	10875	18	0	0
T305	5078	2	0	0
T306	81636	457	0	0
T307	4710	10	0	0
T308	10709	7	0	0
T310	4877	8	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	3435	0	0
T55	3627	5	0	0
T209	10042	40	0	0
T220	18120	23	0	0
T222	8920	3	0	0
T227	10875	16	0	0
T305	5078	15	0	0
T306	81636	465	0	0
T307	4710	14	0	0
T308	10709	31	0	0
T309	78700	173	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1726	0	0
T209	10042	10	0	0
T220	18120	56	0	0
T222	8920	9	0	0
T227	10875	1	0	0
T305	5078	11	0	0
T306	81636	479	0	0
T307	4710	8	0	0
T308	10709	7	0	0
T311	4404	3	0	0
T313	9508	7	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1926	0	0
T55	3627	2	0	0
T209	10042	10	0	0
T220	18120	34	0	0
T222	8920	22	0	0
T227	10875	17	0	0
T305	5078	2	0	0
T306	81636	447	0	0
T307	4710	10	0	0
T308	10709	34	0	0
T310	4877	4	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2297	0	0
T55	3627	3	0	0
T209	10042	26	0	0
T220	18120	39	0	0
T222	8920	5	0	0
T227	10875	16	0	0
T305	5078	5	0	0
T306	81636	559	0	0
T307	4710	12	0	0
T308	10709	42	0	0
T309	78700	30	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1788	0	0
T55	3627	2	0	0
T209	10042	19	0	0
T220	18120	19	0	0
T222	8920	14	0	0
T227	10875	2	0	0
T305	5078	11	0	0
T306	81636	539	0	0
T307	4710	5	0	0
T308	10709	25	0	0
T309	78700	20	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2373	0	0
T55	3627	5	0	0
T209	10042	16	0	0
T220	18120	34	0	0
T222	8920	14	0	0
T227	10875	25	0	0
T305	5078	5	0	0
T306	81636	541	0	0
T307	4710	5	0	0
T308	10709	42	0	0
T310	4877	10	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1795	0	0
T55	3627	5	0	0
T209	10042	17	0	0
T220	18120	7	0	0
T222	8920	15	0	0
T227	10875	17	0	0
T305	5078	3	0	0
T307	4710	7	0	0
T308	10709	13	0	0
T309	78700	29	0	0
T310	4877	5	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1216	0	0
T55	3627	2	0	0
T209	10042	15	0	0
T220	18120	9	0	0
T222	8920	27	0	0
T227	10875	1	0	0
T305	5078	13	0	0
T306	81636	506	0	0
T307	4710	9	0	0
T308	10709	26	0	0
T310	4877	10	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	1720	0	0
T55	3627	9	0	0
T209	10042	17	0	0
T220	18120	41	0	0
T222	8920	12	0	0
T227	10875	43	0	0
T305	5078	3	0	0
T306	81636	497	0	0
T307	4710	8	0	0
T308	10709	23	0	0
T309	78700	37	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2184	0	0
T55	3627	8	0	0
T209	10042	17	0	0
T220	18120	23	0	0
T227	10875	23	0	0
T305	5078	3	0	0
T306	81636	505	0	0
T307	4710	8	0	0
T309	78700	46	0	0
T311	4404	4	0	0
T312	75180	33	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364036417	2178	0	0
T55	3627	8	0	0
T209	10042	13	0	0
T220	18120	24	0	0
T222	8920	11	0	0
T227	10875	1	0	0
T305	5078	15	0	0
T306	81636	546	0	0
T307	4710	6	0	0
T308	10709	37	0	0
T309	78700	34	0	0