Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T11 |
1 |
| others[1] |
197 |
1 |
|
T39 |
10 |
|
T191 |
1 |
|
T192 |
1 |
| others[2] |
223 |
1 |
|
T39 |
12 |
|
T192 |
1 |
|
T129 |
14 |
| others[3] |
364 |
1 |
|
T39 |
9 |
|
T129 |
15 |
|
T193 |
1 |
| false |
102 |
1 |
|
T80 |
1 |
|
T39 |
3 |
|
T129 |
4 |
| true |
12638 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8291 |
1 |
|
T6 |
1 |
|
T24 |
197 |
|
T25 |
1 |
| others[1] |
1223 |
1 |
|
T8 |
1 |
|
T63 |
2 |
|
T64 |
6 |
| others[2] |
1187 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T63 |
2 |
| others[3] |
2077 |
1 |
|
T2 |
1 |
|
T11 |
1 |
|
T63 |
2 |
| false |
642 |
1 |
|
T63 |
1 |
|
T64 |
3 |
|
T80 |
1 |
| true |
327 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8324 |
1 |
|
T24 |
197 |
|
T63 |
3 |
|
T64 |
7 |
| others[1] |
1188 |
1 |
|
T6 |
1 |
|
T30 |
1 |
|
T64 |
7 |
| others[2] |
1190 |
1 |
|
T11 |
1 |
|
T63 |
1 |
|
T64 |
4 |
| others[3] |
2145 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T11 |
1 |
| false |
606 |
1 |
|
T25 |
1 |
|
T63 |
2 |
|
T64 |
2 |
| true |
294 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
95 |
1 |
|
T11 |
2 |
|
T80 |
1 |
|
T39 |
1 |
| others[1] |
103 |
1 |
|
T17 |
1 |
|
T39 |
5 |
|
T129 |
3 |
| others[2] |
118 |
1 |
|
T67 |
2 |
|
T80 |
1 |
|
T39 |
5 |
| others[3] |
167 |
1 |
|
T31 |
1 |
|
T39 |
7 |
|
T192 |
1 |
| false |
64 |
1 |
|
T39 |
2 |
|
T192 |
1 |
|
T142 |
3 |
| true |
13200 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T30 |
1 |
|
T78 |
1 |
|
T39 |
12 |
| others[1] |
215 |
1 |
|
T17 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| others[2] |
233 |
1 |
|
T2 |
1 |
|
T39 |
13 |
|
T129 |
13 |
| others[3] |
372 |
1 |
|
T11 |
1 |
|
T18 |
1 |
|
T31 |
1 |
| false |
118 |
1 |
|
T39 |
5 |
|
T192 |
1 |
|
T129 |
5 |
| true |
12588 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8084 |
1 |
|
T24 |
197 |
|
T63 |
1 |
|
T64 |
6 |
| others[1] |
1022 |
1 |
|
T5 |
1 |
|
T25 |
1 |
|
T8 |
1 |
| others[2] |
1048 |
1 |
|
T64 |
5 |
|
T80 |
1 |
|
T13 |
1 |
| others[3] |
1725 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T17 |
1 |
| false |
548 |
1 |
|
T11 |
1 |
|
T63 |
1 |
|
T64 |
2 |
| true |
1320 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
257 |
1 |
|
T78 |
1 |
|
T39 |
6 |
|
T191 |
1 |
| others[1] |
219 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T39 |
11 |
| others[2] |
233 |
1 |
|
T2 |
1 |
|
T13 |
1 |
|
T39 |
10 |
| others[3] |
398 |
1 |
|
T39 |
19 |
|
T129 |
15 |
|
T43 |
1 |
| false |
117 |
1 |
|
T39 |
5 |
|
T129 |
1 |
|
T142 |
3 |
| true |
12523 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T2 |
1 |
|
T67 |
1 |
|
T39 |
11 |
| others[1] |
209 |
1 |
|
T11 |
1 |
|
T30 |
1 |
|
T18 |
1 |
| others[2] |
208 |
1 |
|
T39 |
3 |
|
T192 |
1 |
|
T129 |
15 |
| others[3] |
374 |
1 |
|
T6 |
1 |
|
T17 |
1 |
|
T39 |
16 |
| false |
124 |
1 |
|
T39 |
5 |
|
T129 |
5 |
|
T142 |
3 |
| true |
12600 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8317 |
1 |
|
T11 |
1 |
|
T24 |
197 |
|
T25 |
1 |
| others[1] |
1200 |
1 |
|
T63 |
1 |
|
T64 |
5 |
|
T80 |
1 |
| others[2] |
1188 |
1 |
|
T64 |
11 |
|
T67 |
1 |
|
T80 |
1 |
| others[3] |
2070 |
1 |
|
T6 |
1 |
|
T5 |
1 |
|
T63 |
1 |
| false |
652 |
1 |
|
T11 |
1 |
|
T63 |
2 |
|
T64 |
6 |
| true |
320 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1188 |
1 |
|
T25 |
1 |
|
T63 |
1 |
|
T64 |
8 |
| others[1] |
1262 |
1 |
|
T6 |
1 |
|
T11 |
2 |
|
T63 |
2 |
| others[2] |
1193 |
1 |
|
T2 |
1 |
|
T63 |
2 |
|
T64 |
6 |
| others[3] |
2119 |
1 |
|
T5 |
1 |
|
T8 |
1 |
|
T64 |
11 |
| false |
618 |
1 |
|
T63 |
2 |
|
T64 |
2 |
|
T9 |
1 |
| true |
286 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
102 |
1 |
|
T18 |
1 |
|
T31 |
1 |
|
T39 |
3 |
| others[1] |
120 |
1 |
|
T67 |
1 |
|
T80 |
1 |
|
T39 |
3 |
| others[2] |
97 |
1 |
|
T11 |
1 |
|
T67 |
1 |
|
T39 |
4 |
| others[3] |
179 |
1 |
|
T11 |
1 |
|
T80 |
1 |
|
T39 |
6 |
| false |
47 |
1 |
|
T39 |
1 |
|
T191 |
1 |
|
T129 |
1 |
| true |
6121 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
231 |
1 |
|
T67 |
1 |
|
T80 |
1 |
|
T39 |
8 |
| others[1] |
232 |
1 |
|
T39 |
9 |
|
T192 |
1 |
|
T129 |
7 |
| others[2] |
219 |
1 |
|
T12 |
1 |
|
T39 |
10 |
|
T192 |
1 |
| others[3] |
382 |
1 |
|
T6 |
1 |
|
T11 |
2 |
|
T18 |
1 |
| false |
120 |
1 |
|
T39 |
7 |
|
T129 |
8 |
|
T142 |
7 |
| true |
5482 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
997 |
1 |
|
T5 |
1 |
|
T78 |
1 |
|
T63 |
1 |
| others[1] |
1007 |
1 |
|
T11 |
1 |
|
T17 |
1 |
|
T76 |
1 |
| others[2] |
1034 |
1 |
|
T6 |
1 |
|
T63 |
1 |
|
T64 |
8 |
| others[3] |
1834 |
1 |
|
T4 |
1 |
|
T11 |
1 |
|
T22 |
1 |
| false |
503 |
1 |
|
T30 |
1 |
|
T18 |
1 |
|
T63 |
1 |
| true |
1291 |
1 |
|
T2 |
1 |
|
T56 |
1 |
|
T31 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T39 |
9 |
|
T129 |
7 |
|
T193 |
1 |
| others[1] |
210 |
1 |
|
T39 |
10 |
|
T129 |
7 |
|
T142 |
12 |
| others[2] |
217 |
1 |
|
T6 |
1 |
|
T80 |
1 |
|
T13 |
1 |
| others[3] |
352 |
1 |
|
T78 |
1 |
|
T18 |
1 |
|
T39 |
12 |
| false |
131 |
1 |
|
T67 |
1 |
|
T39 |
8 |
|
T129 |
8 |
| true |
5534 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
200 |
1 |
|
T17 |
1 |
|
T39 |
14 |
|
T191 |
1 |
| others[1] |
221 |
1 |
|
T78 |
1 |
|
T18 |
1 |
|
T39 |
12 |
| others[2] |
235 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T39 |
8 |
| others[3] |
343 |
1 |
|
T11 |
1 |
|
T67 |
1 |
|
T39 |
26 |
| false |
114 |
1 |
|
T39 |
9 |
|
T129 |
9 |
|
T142 |
3 |
| true |
5553 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1211 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T64 |
7 |
| others[1] |
1238 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T17 |
1 |
| others[2] |
1224 |
1 |
|
T63 |
1 |
|
T64 |
9 |
|
T67 |
1 |
| others[3] |
2030 |
1 |
|
T25 |
1 |
|
T8 |
1 |
|
T63 |
1 |
| false |
642 |
1 |
|
T63 |
3 |
|
T64 |
4 |
|
T39 |
10 |
| true |
321 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1201 |
1 |
|
T64 |
6 |
|
T39 |
16 |
|
T120 |
6 |
| others[1] |
1230 |
1 |
|
T6 |
1 |
|
T17 |
1 |
|
T63 |
2 |
| others[2] |
1228 |
1 |
|
T5 |
1 |
|
T8 |
1 |
|
T63 |
1 |
| others[3] |
2056 |
1 |
|
T2 |
1 |
|
T11 |
1 |
|
T63 |
4 |
| false |
655 |
1 |
|
T11 |
1 |
|
T25 |
1 |
|
T64 |
4 |
| true |
296 |
1 |
|
T4 |
1 |
|
T22 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
93 |
1 |
|
T11 |
1 |
|
T80 |
1 |
|
T39 |
3 |
| others[1] |
100 |
1 |
|
T11 |
1 |
|
T31 |
1 |
|
T39 |
6 |
| others[2] |
121 |
1 |
|
T67 |
1 |
|
T80 |
1 |
|
T39 |
4 |
| others[3] |
185 |
1 |
|
T67 |
1 |
|
T39 |
8 |
|
T191 |
1 |
| false |
59 |
1 |
|
T78 |
1 |
|
T39 |
1 |
|
T192 |
1 |
| true |
6108 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
233 |
1 |
|
T39 |
11 |
|
T129 |
11 |
|
T142 |
13 |
| others[1] |
211 |
1 |
|
T2 |
1 |
|
T80 |
1 |
|
T39 |
9 |
| others[2] |
220 |
1 |
|
T11 |
2 |
|
T39 |
10 |
|
T129 |
12 |
| others[3] |
371 |
1 |
|
T80 |
1 |
|
T12 |
1 |
|
T13 |
1 |
| false |
130 |
1 |
|
T39 |
6 |
|
T129 |
8 |
|
T142 |
6 |
| true |
5501 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1048 |
1 |
|
T5 |
1 |
|
T22 |
1 |
|
T63 |
2 |
| others[1] |
1009 |
1 |
|
T6 |
1 |
|
T25 |
1 |
|
T63 |
1 |
| others[2] |
1027 |
1 |
|
T11 |
1 |
|
T8 |
1 |
|
T18 |
1 |
| others[3] |
1715 |
1 |
|
T2 |
1 |
|
T56 |
1 |
|
T76 |
1 |
| false |
527 |
1 |
|
T4 |
1 |
|
T11 |
1 |
|
T63 |
1 |
| true |
1340 |
1 |
|
T17 |
1 |
|
T30 |
1 |
|
T78 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
247 |
1 |
|
T2 |
1 |
|
T39 |
16 |
|
T129 |
12 |
| others[1] |
211 |
1 |
|
T11 |
1 |
|
T39 |
13 |
|
T129 |
12 |
| others[2] |
217 |
1 |
|
T80 |
1 |
|
T39 |
10 |
|
T129 |
13 |
| others[3] |
368 |
1 |
|
T6 |
1 |
|
T30 |
1 |
|
T12 |
1 |
| false |
102 |
1 |
|
T14 |
1 |
|
T31 |
1 |
|
T39 |
3 |
| true |
5521 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
191 |
1 |
|
T18 |
1 |
|
T39 |
8 |
|
T129 |
5 |
| others[1] |
206 |
1 |
|
T2 |
1 |
|
T80 |
1 |
|
T39 |
6 |
| others[2] |
239 |
1 |
|
T11 |
1 |
|
T17 |
1 |
|
T67 |
1 |
| others[3] |
347 |
1 |
|
T78 |
1 |
|
T31 |
1 |
|
T39 |
12 |
| false |
120 |
1 |
|
T39 |
3 |
|
T191 |
1 |
|
T192 |
1 |
| true |
5563 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1229 |
1 |
|
T11 |
1 |
|
T22 |
1 |
|
T8 |
1 |
| others[1] |
1178 |
1 |
|
T25 |
1 |
|
T63 |
2 |
|
T64 |
7 |
| others[2] |
1257 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T63 |
1 |
| others[3] |
2043 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T63 |
2 |
| false |
637 |
1 |
|
T63 |
1 |
|
T64 |
1 |
|
T67 |
1 |
| true |
322 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1186 |
1 |
|
T11 |
1 |
|
T63 |
2 |
|
T64 |
8 |
| others[1] |
1223 |
1 |
|
T64 |
11 |
|
T67 |
1 |
|
T354 |
1 |
| others[2] |
1248 |
1 |
|
T5 |
1 |
|
T30 |
1 |
|
T63 |
3 |
| others[3] |
2048 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T17 |
1 |
| false |
662 |
1 |
|
T64 |
3 |
|
T80 |
1 |
|
T39 |
11 |
| true |
299 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T11 |
1 |
|
T39 |
7 |
|
T129 |
6 |
| others[1] |
91 |
1 |
|
T39 |
1 |
|
T192 |
1 |
|
T129 |
5 |
| others[2] |
105 |
1 |
|
T6 |
1 |
|
T80 |
1 |
|
T39 |
5 |
| others[3] |
183 |
1 |
|
T11 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| false |
61 |
1 |
|
T67 |
1 |
|
T39 |
1 |
|
T129 |
2 |
| true |
6115 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T17 |
1 |
|
T67 |
1 |
|
T39 |
13 |
| others[1] |
229 |
1 |
|
T11 |
1 |
|
T18 |
1 |
|
T31 |
1 |
| others[2] |
231 |
1 |
|
T2 |
1 |
|
T13 |
1 |
|
T39 |
10 |
| others[3] |
364 |
1 |
|
T11 |
1 |
|
T78 |
1 |
|
T80 |
1 |
| false |
112 |
1 |
|
T80 |
1 |
|
T39 |
10 |
|
T129 |
5 |
| true |
5511 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1057 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T25 |
1 |
| others[1] |
1005 |
1 |
|
T63 |
2 |
|
T64 |
7 |
|
T68 |
1 |
| others[2] |
1021 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T8 |
1 |
| others[3] |
1742 |
1 |
|
T17 |
1 |
|
T22 |
1 |
|
T18 |
1 |
| false |
511 |
1 |
|
T14 |
1 |
|
T64 |
3 |
|
T9 |
1 |
| true |
1330 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
220 |
1 |
|
T39 |
6 |
|
T129 |
8 |
|
T142 |
12 |
| others[1] |
225 |
1 |
|
T18 |
1 |
|
T13 |
1 |
|
T39 |
10 |
| others[2] |
240 |
1 |
|
T6 |
1 |
|
T39 |
9 |
|
T129 |
13 |
| others[3] |
362 |
1 |
|
T17 |
1 |
|
T30 |
1 |
|
T14 |
1 |
| false |
111 |
1 |
|
T39 |
4 |
|
T129 |
5 |
|
T142 |
6 |
| true |
5508 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
192 |
1 |
|
T39 |
7 |
|
T129 |
12 |
|
T142 |
7 |
| others[1] |
215 |
1 |
|
T11 |
1 |
|
T39 |
8 |
|
T129 |
13 |
| others[2] |
205 |
1 |
|
T67 |
1 |
|
T39 |
2 |
|
T192 |
1 |
| others[3] |
352 |
1 |
|
T11 |
1 |
|
T17 |
1 |
|
T30 |
1 |
| false |
126 |
1 |
|
T39 |
6 |
|
T129 |
2 |
|
T142 |
11 |
| true |
5576 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1167 |
1 |
|
T8 |
1 |
|
T63 |
2 |
|
T64 |
9 |
| others[1] |
1223 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T63 |
1 |
| others[2] |
1258 |
1 |
|
T25 |
1 |
|
T64 |
8 |
|
T80 |
1 |
| others[3] |
2033 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T63 |
2 |
| false |
657 |
1 |
|
T63 |
2 |
|
T64 |
7 |
|
T9 |
1 |
| true |
328 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1235 |
1 |
|
T6 |
1 |
|
T5 |
1 |
|
T11 |
1 |
| others[1] |
1232 |
1 |
|
T11 |
1 |
|
T76 |
1 |
|
T25 |
1 |
| others[2] |
1248 |
1 |
|
T63 |
1 |
|
T64 |
6 |
|
T67 |
2 |
| others[3] |
2005 |
1 |
|
T63 |
4 |
|
T64 |
12 |
|
T68 |
1 |
| false |
652 |
1 |
|
T63 |
1 |
|
T64 |
4 |
|
T354 |
1 |
| true |
294 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |