Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T39 |
12 |
|
T129 |
11 |
|
T43 |
1 |
| others[1] |
233 |
1 |
|
T12 |
1 |
|
T39 |
8 |
|
T129 |
12 |
| others[2] |
228 |
1 |
|
T39 |
8 |
|
T129 |
9 |
|
T142 |
8 |
| others[3] |
400 |
1 |
|
T11 |
1 |
|
T13 |
1 |
|
T39 |
20 |
| false |
125 |
1 |
|
T2 |
1 |
|
T11 |
1 |
|
T18 |
1 |
| true |
5446 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T18 |
1 |
|
T67 |
1 |
|
T39 |
15 |
| others[1] |
242 |
1 |
|
T39 |
12 |
|
T129 |
8 |
|
T142 |
7 |
| others[2] |
213 |
1 |
|
T39 |
11 |
|
T192 |
1 |
|
T129 |
7 |
| others[3] |
334 |
1 |
|
T6 |
1 |
|
T67 |
1 |
|
T39 |
11 |
| false |
107 |
1 |
|
T11 |
1 |
|
T39 |
8 |
|
T129 |
5 |
| true |
5556 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1217 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T11 |
1 |
| others[1] |
1238 |
1 |
|
T8 |
1 |
|
T63 |
3 |
|
T64 |
7 |
| others[2] |
1229 |
1 |
|
T63 |
1 |
|
T64 |
8 |
|
T67 |
1 |
| others[3] |
1997 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T25 |
1 |
| false |
655 |
1 |
|
T63 |
1 |
|
T64 |
4 |
|
T39 |
8 |
| true |
330 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1183 |
1 |
|
T25 |
1 |
|
T63 |
1 |
|
T64 |
4 |
| others[1] |
1282 |
1 |
|
T11 |
1 |
|
T8 |
1 |
|
T63 |
1 |
| others[2] |
1266 |
1 |
|
T5 |
1 |
|
T63 |
1 |
|
T64 |
9 |
| others[3] |
2033 |
1 |
|
T11 |
1 |
|
T63 |
3 |
|
T64 |
15 |
| false |
602 |
1 |
|
T6 |
1 |
|
T63 |
1 |
|
T64 |
3 |
| true |
300 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T39 |
9 |
|
T192 |
1 |
|
T129 |
3 |
| others[1] |
114 |
1 |
|
T67 |
2 |
|
T39 |
2 |
|
T129 |
5 |
| others[2] |
111 |
1 |
|
T11 |
1 |
|
T39 |
5 |
|
T191 |
1 |
| others[3] |
184 |
1 |
|
T11 |
1 |
|
T80 |
1 |
|
T39 |
4 |
| false |
60 |
1 |
|
T80 |
1 |
|
T39 |
4 |
|
T129 |
4 |
| true |
6080 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T11 |
1 |
|
T39 |
16 |
|
T129 |
8 |
| others[1] |
216 |
1 |
|
T67 |
1 |
|
T39 |
9 |
|
T191 |
1 |
| others[2] |
262 |
1 |
|
T30 |
1 |
|
T39 |
14 |
|
T129 |
11 |
| others[3] |
363 |
1 |
|
T12 |
1 |
|
T39 |
16 |
|
T129 |
24 |
| false |
121 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T18 |
1 |
| true |
5476 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1041 |
1 |
|
T11 |
1 |
|
T8 |
1 |
|
T14 |
1 |
| others[1] |
1050 |
1 |
|
T2 |
1 |
|
T22 |
1 |
|
T63 |
3 |
| others[2] |
1025 |
1 |
|
T5 |
1 |
|
T17 |
1 |
|
T76 |
1 |
| others[3] |
1753 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T30 |
1 |
| false |
506 |
1 |
|
T64 |
3 |
|
T67 |
1 |
|
T13 |
1 |
| true |
1291 |
1 |
|
T4 |
1 |
|
T56 |
1 |
|
T25 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T31 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| others[1] |
239 |
1 |
|
T39 |
14 |
|
T191 |
1 |
|
T129 |
12 |
| others[2] |
221 |
1 |
|
T2 |
1 |
|
T13 |
1 |
|
T39 |
15 |
| others[3] |
372 |
1 |
|
T80 |
1 |
|
T39 |
14 |
|
T129 |
15 |
| false |
112 |
1 |
|
T11 |
1 |
|
T39 |
4 |
|
T129 |
9 |
| true |
5500 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T31 |
1 |
|
T39 |
9 |
|
T129 |
12 |
| others[1] |
222 |
1 |
|
T2 |
1 |
|
T78 |
1 |
|
T39 |
8 |
| others[2] |
199 |
1 |
|
T17 |
1 |
|
T67 |
1 |
|
T39 |
11 |
| others[3] |
392 |
1 |
|
T67 |
1 |
|
T39 |
15 |
|
T129 |
20 |
| false |
117 |
1 |
|
T6 |
1 |
|
T39 |
7 |
|
T129 |
4 |
| true |
5515 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T11 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1294 |
1 |
|
T63 |
1 |
|
T64 |
8 |
|
T9 |
1 |
| others[1] |
1264 |
1 |
|
T63 |
1 |
|
T64 |
4 |
|
T10 |
1 |
| others[2] |
1157 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T17 |
1 |
| others[3] |
1995 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T8 |
1 |
| false |
636 |
1 |
|
T11 |
1 |
|
T63 |
1 |
|
T64 |
5 |
| true |
320 |
1 |
|
T4 |
1 |
|
T22 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1192 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T63 |
2 |
| others[1] |
1202 |
1 |
|
T63 |
1 |
|
T64 |
8 |
|
T9 |
1 |
| others[2] |
1261 |
1 |
|
T63 |
1 |
|
T64 |
6 |
|
T68 |
1 |
| others[3] |
2093 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T25 |
1 |
| false |
616 |
1 |
|
T63 |
1 |
|
T64 |
4 |
|
T39 |
11 |
| true |
302 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
108 |
1 |
|
T39 |
4 |
|
T129 |
1 |
|
T193 |
1 |
| others[1] |
114 |
1 |
|
T6 |
1 |
|
T17 |
1 |
|
T67 |
1 |
| others[2] |
104 |
1 |
|
T39 |
4 |
|
T129 |
2 |
|
T193 |
1 |
| others[3] |
170 |
1 |
|
T11 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| false |
56 |
1 |
|
T11 |
1 |
|
T80 |
1 |
|
T39 |
2 |
| true |
6114 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
230 |
1 |
|
T80 |
1 |
|
T39 |
9 |
|
T129 |
11 |
| others[1] |
245 |
1 |
|
T39 |
13 |
|
T192 |
1 |
|
T129 |
6 |
| others[2] |
204 |
1 |
|
T30 |
1 |
|
T31 |
1 |
|
T39 |
10 |
| others[3] |
386 |
1 |
|
T2 |
1 |
|
T17 |
1 |
|
T67 |
1 |
| false |
104 |
1 |
|
T39 |
2 |
|
T129 |
2 |
|
T142 |
4 |
| true |
5497 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1017 |
1 |
|
T11 |
1 |
|
T76 |
1 |
|
T64 |
9 |
| others[1] |
1017 |
1 |
|
T56 |
1 |
|
T78 |
1 |
|
T64 |
7 |
| others[2] |
1082 |
1 |
|
T18 |
1 |
|
T63 |
2 |
|
T64 |
8 |
| others[3] |
1657 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T5 |
1 |
| false |
533 |
1 |
|
T22 |
1 |
|
T64 |
4 |
|
T39 |
11 |
| true |
1360 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T25 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T2 |
1 |
|
T39 |
12 |
|
T192 |
1 |
| others[1] |
237 |
1 |
|
T12 |
1 |
|
T39 |
10 |
|
T129 |
9 |
| others[2] |
220 |
1 |
|
T39 |
6 |
|
T191 |
1 |
|
T129 |
13 |
| others[3] |
362 |
1 |
|
T39 |
16 |
|
T129 |
13 |
|
T142 |
14 |
| false |
129 |
1 |
|
T80 |
1 |
|
T39 |
9 |
|
T129 |
7 |
| true |
5477 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T80 |
1 |
|
T39 |
13 |
|
T129 |
11 |
| others[1] |
214 |
1 |
|
T11 |
1 |
|
T78 |
1 |
|
T80 |
1 |
| others[2] |
203 |
1 |
|
T2 |
1 |
|
T39 |
8 |
|
T191 |
1 |
| others[3] |
387 |
1 |
|
T17 |
1 |
|
T39 |
23 |
|
T192 |
1 |
| false |
87 |
1 |
|
T39 |
1 |
|
T129 |
6 |
|
T142 |
1 |
| true |
5529 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1184 |
1 |
|
T63 |
3 |
|
T64 |
3 |
|
T9 |
1 |
| others[1] |
1228 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T25 |
1 |
| others[2] |
1187 |
1 |
|
T11 |
1 |
|
T22 |
1 |
|
T64 |
9 |
| others[3] |
2064 |
1 |
|
T8 |
1 |
|
T63 |
3 |
|
T64 |
12 |
| false |
680 |
1 |
|
T5 |
1 |
|
T64 |
2 |
|
T39 |
16 |
| true |
323 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1232 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T64 |
8 |
| others[1] |
1229 |
1 |
|
T76 |
1 |
|
T64 |
6 |
|
T12 |
1 |
| others[2] |
1236 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T8 |
1 |
| others[3] |
2049 |
1 |
|
T25 |
1 |
|
T63 |
2 |
|
T64 |
9 |
| false |
628 |
1 |
|
T17 |
1 |
|
T63 |
2 |
|
T64 |
7 |
| true |
292 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
98 |
1 |
|
T78 |
1 |
|
T39 |
2 |
|
T129 |
3 |
| others[1] |
101 |
1 |
|
T31 |
1 |
|
T67 |
1 |
|
T39 |
6 |
| others[2] |
105 |
1 |
|
T11 |
1 |
|
T30 |
1 |
|
T80 |
1 |
| others[3] |
162 |
1 |
|
T11 |
1 |
|
T18 |
1 |
|
T67 |
1 |
| false |
44 |
1 |
|
T39 |
1 |
|
T192 |
2 |
|
T142 |
2 |
| true |
6156 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
231 |
1 |
|
T6 |
1 |
|
T39 |
10 |
|
T192 |
1 |
| others[1] |
217 |
1 |
|
T30 |
1 |
|
T39 |
9 |
|
T129 |
12 |
| others[2] |
238 |
1 |
|
T39 |
9 |
|
T129 |
14 |
|
T193 |
2 |
| others[3] |
367 |
1 |
|
T80 |
1 |
|
T39 |
19 |
|
T191 |
1 |
| false |
122 |
1 |
|
T31 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| true |
5491 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1063 |
1 |
|
T22 |
1 |
|
T25 |
1 |
|
T63 |
3 |
| others[1] |
1043 |
1 |
|
T6 |
1 |
|
T8 |
1 |
|
T63 |
1 |
| others[2] |
1049 |
1 |
|
T63 |
2 |
|
T64 |
8 |
|
T68 |
1 |
| others[3] |
1683 |
1 |
|
T5 |
1 |
|
T11 |
2 |
|
T56 |
1 |
| false |
521 |
1 |
|
T18 |
1 |
|
T64 |
4 |
|
T39 |
14 |
| true |
1307 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T39 |
9 |
|
T129 |
13 |
|
T142 |
9 |
| others[1] |
223 |
1 |
|
T6 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| others[2] |
234 |
1 |
|
T11 |
1 |
|
T78 |
1 |
|
T18 |
1 |
| others[3] |
361 |
1 |
|
T39 |
14 |
|
T129 |
16 |
|
T142 |
17 |
| false |
108 |
1 |
|
T39 |
5 |
|
T129 |
5 |
|
T142 |
4 |
| true |
5503 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
225 |
1 |
|
T6 |
1 |
|
T31 |
1 |
|
T80 |
1 |
| others[1] |
226 |
1 |
|
T78 |
1 |
|
T39 |
11 |
|
T192 |
1 |
| others[2] |
227 |
1 |
|
T39 |
10 |
|
T129 |
9 |
|
T142 |
12 |
| others[3] |
354 |
1 |
|
T11 |
1 |
|
T30 |
1 |
|
T67 |
2 |
| false |
117 |
1 |
|
T2 |
1 |
|
T11 |
1 |
|
T39 |
6 |
| true |
5517 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1247 |
1 |
|
T8 |
1 |
|
T64 |
6 |
|
T68 |
1 |
| others[1] |
1244 |
1 |
|
T11 |
1 |
|
T25 |
1 |
|
T63 |
1 |
| others[2] |
1206 |
1 |
|
T63 |
1 |
|
T64 |
7 |
|
T67 |
1 |
| others[3] |
2019 |
1 |
|
T6 |
1 |
|
T63 |
4 |
|
T64 |
7 |
| false |
635 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T63 |
1 |
| true |
315 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1246 |
1 |
|
T8 |
1 |
|
T63 |
3 |
|
T64 |
7 |
| others[1] |
1246 |
1 |
|
T63 |
2 |
|
T64 |
7 |
|
T68 |
1 |
| others[2] |
1243 |
1 |
|
T6 |
1 |
|
T5 |
1 |
|
T11 |
1 |
| others[3] |
2012 |
1 |
|
T11 |
1 |
|
T76 |
1 |
|
T25 |
1 |
| false |
621 |
1 |
|
T64 |
2 |
|
T39 |
10 |
|
T120 |
2 |
| true |
298 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
109 |
1 |
|
T39 |
4 |
|
T191 |
1 |
|
T129 |
5 |
| others[1] |
113 |
1 |
|
T18 |
1 |
|
T39 |
5 |
|
T129 |
3 |
| others[2] |
100 |
1 |
|
T11 |
1 |
|
T67 |
1 |
|
T80 |
1 |
| others[3] |
179 |
1 |
|
T67 |
1 |
|
T80 |
1 |
|
T39 |
3 |
| false |
53 |
1 |
|
T11 |
1 |
|
T39 |
3 |
|
T129 |
3 |
| true |
6112 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
215 |
1 |
|
T11 |
1 |
|
T31 |
1 |
|
T80 |
1 |
| others[1] |
221 |
1 |
|
T18 |
1 |
|
T39 |
13 |
|
T192 |
1 |
| others[2] |
220 |
1 |
|
T39 |
8 |
|
T129 |
13 |
|
T142 |
11 |
| others[3] |
403 |
1 |
|
T2 |
1 |
|
T11 |
1 |
|
T39 |
12 |
| false |
114 |
1 |
|
T39 |
4 |
|
T129 |
2 |
|
T142 |
1 |
| true |
5493 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1036 |
1 |
|
T17 |
1 |
|
T8 |
1 |
|
T63 |
3 |
| others[1] |
1035 |
1 |
|
T6 |
1 |
|
T11 |
1 |
|
T76 |
1 |
| others[2] |
998 |
1 |
|
T4 |
1 |
|
T11 |
1 |
|
T30 |
1 |
| others[3] |
1718 |
1 |
|
T5 |
1 |
|
T22 |
1 |
|
T78 |
1 |
| false |
519 |
1 |
|
T64 |
4 |
|
T67 |
1 |
|
T39 |
5 |
| true |
1360 |
1 |
|
T2 |
1 |
|
T56 |
1 |
|
T25 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
215 |
1 |
|
T39 |
9 |
|
T129 |
12 |
|
T193 |
1 |
| others[1] |
216 |
1 |
|
T39 |
14 |
|
T129 |
9 |
|
T142 |
6 |
| others[2] |
243 |
1 |
|
T39 |
5 |
|
T129 |
16 |
|
T43 |
1 |
| others[3] |
360 |
1 |
|
T39 |
18 |
|
T191 |
1 |
|
T129 |
20 |
| false |
144 |
1 |
|
T2 |
1 |
|
T17 |
1 |
|
T78 |
1 |
| true |
5488 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
212 |
1 |
|
T11 |
1 |
|
T17 |
1 |
|
T67 |
1 |
| others[1] |
218 |
1 |
|
T39 |
10 |
|
T192 |
1 |
|
T129 |
6 |
| others[2] |
225 |
1 |
|
T11 |
1 |
|
T39 |
15 |
|
T129 |
13 |
| others[3] |
357 |
1 |
|
T31 |
1 |
|
T67 |
1 |
|
T39 |
18 |
| false |
97 |
1 |
|
T39 |
4 |
|
T129 |
6 |
|
T142 |
7 |
| true |
5557 |
1 |
|
T2 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1244 |
1 |
|
T5 |
1 |
|
T11 |
1 |
|
T25 |
1 |
| others[1] |
1223 |
1 |
|
T11 |
1 |
|
T64 |
6 |
|
T67 |
1 |
| others[2] |
1231 |
1 |
|
T63 |
1 |
|
T64 |
5 |
|
T39 |
16 |
| others[3] |
2018 |
1 |
|
T6 |
1 |
|
T76 |
1 |
|
T63 |
3 |
| false |
635 |
1 |
|
T63 |
1 |
|
T64 |
4 |
|
T39 |
14 |
| true |
315 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T17 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |